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authoryiancar <yiangosyiangou@cytanet.com.cy>2020-08-16 01:07:21 +0100
committerGitHub <noreply@github.com>2020-08-15 17:07:21 -0700
commitbdb53e4c043d089279d9891b68bea77614cb97ee (patch)
treee9a7ba50a29ae7f45c941d89f2578981cee6a0f4 /usbdrv/usbdrvasm.S
parent9a42d205eb60faca494ff4eabce8d59f0ec0fc7f (diff)
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Added 3rd endpoint (#1)HEADmaster
* Added 3rd endpoint - Added 3rd endpoint check in asmcommon. This adds 2 extra cycles to the USB routine when enabled. With 16MHz clock (most if not all qmk build use that) the routine is still within spec. - Updated prototype.h file to add additional options. - Simulatanius changes in QMK to follow soon * Update usbdrv/usbdrv.c * Update usbdrv/usbdrv.c * Update usbdrv/usbdrv.c * Update usbdrv/usbdrv.c * Update usbdrv/usbdrvasm.S Accepted to keep changes minimal * Update usbdrv/usbdrvasm.S Accepted to keep changes minimal * Update usbdrv/usbdrvasm.S Accepted to keep changes minimal * Update usbdrv/usbdrvasm.S Accepted to keep changes minimal
Diffstat (limited to 'usbdrv/usbdrvasm.S')
-rw-r--r--usbdrv/usbdrvasm.S4
1 files changed, 3 insertions, 1 deletions
diff --git a/usbdrv/usbdrvasm.S b/usbdrv/usbdrvasm.S
index 3bda63c..91a7abb 100644
--- a/usbdrv/usbdrvasm.S
+++ b/usbdrv/usbdrvasm.S
@@ -35,7 +35,7 @@ the file appropriate for the given clock rate.
#ifdef __IAR_SYSTEMS_ASM__
extern usbRxBuf, usbDeviceAddr, usbNewDeviceAddr, usbInputBufOffset
extern usbCurrentTok, usbRxLen, usbRxToken, usbTxLen
- extern usbTxBuf, usbTxStatus1, usbTxStatus3
+ extern usbTxBuf, usbTxStatus1, usbTxStatus3, usbTxStatus4
# if USB_COUNT_SOF
extern usbSofCount
# endif
@@ -82,6 +82,8 @@ the file appropriate for the given clock rate.
#define usbTxBuf1 (usbTxStatus1 + 1)
#define usbTxLen3 usbTxStatus3
#define usbTxBuf3 (usbTxStatus3 + 1)
+#define usbTxLen4 usbTxStatus4
+#define usbTxBuf4 (usbTxStatus4 + 1)
;----------------------------------------------------------------------------