aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gdisp/SSD2119
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gdisp/SSD2119')
-rw-r--r--drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h14
-rw-r--r--drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h5
2 files changed, 16 insertions, 3 deletions
diff --git a/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h
index 66f205c5..495c5fc9 100644
--- a/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h
+++ b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h
@@ -40,6 +40,20 @@
#define SET_RST palSetPad(GPIOD, 3);
#define CLR_RST palClearPad(GPIOD, 3);
+/* PWM configuration structure. We use timer 4 channel 2 (orange LED on board). */
+static const PWMConfig pwmcfg = {
+ 1000000, /* 1 MHz PWM clock frequency. */
+ 100, /* PWM period is 100 cycles. */
+ NULL,
+ {
+ {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+ {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+ {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+ {PWM_OUTPUT_ACTIVE_HIGH, NULL}
+ },
+ 0
+};
+
/**
* @brief Initialise the board for the display.
* @notes This board definition uses GPIO and assumes exclusive access to these GPIO pins
diff --git a/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h
index a3813f04..c6e11493 100644
--- a/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h
+++ b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h
@@ -38,8 +38,8 @@
/* PWM configuration structure. We use timer 4 channel 2 (orange LED on board). */
static const PWMConfig pwmcfg = {
- 100000, /* 100kHz PWM clock frequency. */
- 100, /* PWM period is 128 cycles. */
+ 1000000, /* 1 MHz PWM clock frequency. */
+ 100, /* PWM period is 100 cycles. */
NULL,
{
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
@@ -47,7 +47,6 @@ static const PWMConfig pwmcfg = {
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL}
},
- /* HW dependent part.*/
0
};