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author | Joel Bodenmann <joel.bodenmann@hevs.ch> | 2012-10-24 16:38:43 +0200 |
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committer | Joel Bodenmann <joel.bodenmann@hevs.ch> | 2012-10-24 16:38:43 +0200 |
commit | e0c8011553db0129039d7c8101e4906fa9677fcf (patch) | |
tree | 3241b154105416193048762f585863ed1e0be2cd /drivers | |
parent | 6005051ac7a795cc48f6bf48ff9097dd7275ced3 (diff) | |
download | uGFX-e0c8011553db0129039d7c8101e4906fa9677fcf.tar.gz uGFX-e0c8011553db0129039d7c8101e4906fa9677fcf.tar.bz2 uGFX-e0c8011553db0129039d7c8101e4906fa9677fcf.zip |
graph grid drawing fix
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gdisp/S6D1121/gdisp_lld.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gdisp/S6D1121/gdisp_lld.c b/drivers/gdisp/S6D1121/gdisp_lld.c index bf2e60f5..e199f58f 100644 --- a/drivers/gdisp/S6D1121/gdisp_lld.c +++ b/drivers/gdisp/S6D1121/gdisp_lld.c @@ -105,7 +105,7 @@ bool_t GDISP_LLD(init)(void) { int FSMC_Bank = 0;
/* FSMC timing */
- FSMC_Bank1->BTCR[FSMC_Bank+1] = (10) | (10 << 8) | (10 << 16);
+ FSMC_Bank1->BTCR[FSMC_Bank+1] = (6) | (10 << 8) | (10 << 16);
/* Bank1 NOR/SRAM control register configuration */
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
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