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authorJoel Bodenmann <joel@seriouslyembedded.com>2015-07-24 14:02:05 +0200
committerJoel Bodenmann <joel@seriouslyembedded.com>2015-07-24 14:02:05 +0200
commitc72c20179ee36634bd7267c12ee73e4ba6d57909 (patch)
tree614ae58f444a25d392cce991ee52f087e0327f4e /drivers
parent8b60b516231dee99f9e5df6b3398b4279568f6bb (diff)
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Fixing STM32LTDC driver for STM32F4 series
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gdisp/STM32LTDC/gdisp_lld_STM32LTDC.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gdisp/STM32LTDC/gdisp_lld_STM32LTDC.c b/drivers/gdisp/STM32LTDC/gdisp_lld_STM32LTDC.c
index c4569949..ba656eb0 100644
--- a/drivers/gdisp/STM32LTDC/gdisp_lld_STM32LTDC.c
+++ b/drivers/gdisp/STM32LTDC/gdisp_lld_STM32LTDC.c
@@ -157,14 +157,20 @@ static void LTDC_Init(void)
// Set up the display scanning
uint32_t hacc, vacc;
- // Reset the LTDC hardware module
+ // Reset the LTDC peripheral
RCC->APB2RSTR |= RCC_APB2RSTR_LTDCRST;
RCC->APB2RSTR = 0;
// Enable the LTDC clock
- RCC->DCKCFGR1 = (RCC->DCKCFGR1 & ~RCC_DCKCFGR1_PLLSAIDIVR) | (1 << 16); /* /4 */
+ #if defined(STM32F4)
+ RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | (1 << 16);
+ #elif defined(STM32F7)
+ RCC->DCKCFGR1 = (RCC->DCKCFGR1 & ~RCC_DCKCFGR1_PLLSAIDIVR) | (1 << 16);
+ #else
+ #error STM32LTDC driver not implemented for your platform
+ #endif
- // Enable the module
+ // Enable the peripheral
RCC->APB2ENR |= RCC_APB2ENR_LTDCEN;
// Turn off the controller and its interrupts