aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gdisp
diff options
context:
space:
mode:
authorresset <silentdemon@gmail.com>2013-02-07 01:44:00 +0100
committerresset <silentdemon@gmail.com>2013-02-07 01:44:00 +0100
commit2de39e3302b1c7ec8b00ca10fb24f4af6ade55f7 (patch)
tree78d2de0d78cbb273a9087a162fd45eb051515873 /drivers/gdisp
parente09742633855c6d033f008aba0ee8e30f1384a87 (diff)
downloaduGFX-2de39e3302b1c7ec8b00ca10fb24f4af6ade55f7.tar.gz
uGFX-2de39e3302b1c7ec8b00ca10fb24f4af6ade55f7.tar.bz2
uGFX-2de39e3302b1c7ec8b00ca10fb24f4af6ade55f7.zip
SSD2119: reorganization of files
- Added FSMC board file (_fsmc suffix) - working. - Added GPIO board file (no suffix) - not working. - Removed unneeded files.
Diffstat (limited to 'drivers/gdisp')
-rw-r--r--drivers/gdisp/SSD2119/gdisp_lld.c25
-rw-r--r--drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h146
-rw-r--r--drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h (renamed from drivers/gdisp/SSD2119/gdisp_lld_board_firebullstm32f103.h)97
-rw-r--r--drivers/gdisp/SSD2119/gdisp_lld_board_example.h125
-rw-r--r--drivers/gdisp/SSD2119/gdisp_lld_board_example_fsmc.h164
5 files changed, 184 insertions, 373 deletions
diff --git a/drivers/gdisp/SSD2119/gdisp_lld.c b/drivers/gdisp/SSD2119/gdisp_lld.c
index f430d669..3b726d4f 100644
--- a/drivers/gdisp/SSD2119/gdisp_lld.c
+++ b/drivers/gdisp/SSD2119/gdisp_lld.c
@@ -58,6 +58,8 @@
#if defined(GDISP_USE_CUSTOM_BOARD) && GDISP_USE_CUSTOM_BOARD
/* Include the user supplied board definitions */
#include "gdisp_lld_board.h"
+#elif defined(BOARD_EMBEST_DMSTF4BB_FSMC)
+ #include "gdisp_lld_board_embest_dmstf4bb_fsmc.h"
#elif defined(BOARD_EMBEST_DMSTF4BB)
#include "gdisp_lld_board_embest_dmstf4bb.h"
#else
@@ -172,30 +174,49 @@ bool_t GDISP_LLD(init)(void) {
// Get the bus for the following initialisation commands
acquire_bus();
+ // Enter sleep mode (if we are not already there).
write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0001);
delay(5);
+
+ // Set initial power parameters.
write_reg(SSD2119_REG_PWR_CTRL_5, 0x00B2);
delay(5);
write_reg(SSD2119_REG_VCOM_OTP_1, 0x0006);
delay(5);
+
+ // Start the oscillator.
write_reg(SSD2119_REG_OSC_START, 0x0001);
delay(5);
+
+ // Set pixel format and basic display orientation (scanning direction).
write_reg(SSD2119_REG_OUTPUT_CTRL, 0x30EF);
delay(5);
write_reg(SSD2119_REG_LCD_DRIVE_AC_CTRL, 0x0600);
delay(5);
+
+ // Exit sleep mode.
write_reg(SSD2119_REG_SLEEP_MODE_1, 0x0000);
delay(5);
+
+ // Configure pixel color format and MCU interface parameters.
write_reg(SSD2119_REG_ENTRY_MODE, 0x6830); // ENTRY_MODE_DEFAULT
delay(5);
+
+ // Set analog parameters.
write_reg(SSD2119_REG_SLEEP_MODE_2, 0x0999);
delay(5);
write_reg(SSD2119_REG_ANALOG_SET, 0x3800);
delay(5);
+
+ // Enable the display.
write_reg(SSD2119_REG_DISPLAY_CTRL, 0x0033);
delay(5);
+
+ // Set VCIX2 voltage to 6.1V.
write_reg(SSD2119_REG_PWR_CTRL_2, 0x0005);
delay(5);
+
+ // Configure gamma correction.
write_reg(SSD2119_REG_GAMMA_CTRL_1, 0x0000);
delay(5);
write_reg(SSD2119_REG_GAMMA_CTRL_2, 0x0303);
@@ -216,10 +237,14 @@ bool_t GDISP_LLD(init)(void) {
delay(5);
write_reg(SSD2119_REG_GAMMA_CTRL_10, 0x1000);
delay(5);
+
+ // Configure Vlcd63 and VCOMl.
write_reg(SSD2119_REG_PWR_CTRL_3, 0x000A);
delay(5);
write_reg(SSD2119_REG_PWR_CTRL_4, 0x2E00);
delay(5);
+
+ // Set the display size and ensure that the GRAM window is set to allow access to the full display buffer.
write_reg(SSD2119_REG_V_RAM_POS, (GDISP_SCREEN_HEIGHT - 1) << 8);
delay(5);
write_reg(SSD2119_REG_H_RAM_START, 0x0000);
diff --git a/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h
index 630000fe..6be134b4 100644
--- a/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h
+++ b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h
@@ -29,10 +29,14 @@
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
-/* Using FSMC A19 (PE3) as DC */
-#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* DC = 0 */
-#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* DC = 1 */
-
+#define SET_CS palSetPad(GPIOD, 7);
+#define CLR_CS palClearPad(GPIOD, 7);
+#define SET_DC palSetPad(GPIOE, 3);
+#define CLR_DC palClearPad(GPIOE, 3);
+#define SET_WR palSetPad(GPIOD, 5);
+#define CLR_WR palClearPad(GPIOD, 5);
+#define SET_RD palSetPad(GPIOD, 4);
+#define CLR_RD palClearPad(GPIOD, 4);
#define SET_RST palSetPad(GPIOD, 3);
#define CLR_RST palClearPad(GPIOD, 3);
@@ -43,34 +47,45 @@
* @notapi
*/
static __inline void init_board(void) {
- unsigned char FSMC_Bank;
-
- /* STM32F2-F4 FSMC init */
- rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
-
- /* set pins to FSMC mode */
- IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
- (1 << 9) | (1 << 10) | (1 << 14) | (1 << 15), 0};
-
- IOBus busE = {GPIOE, (1 << 3) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
- (1 << 13) | (1 << 14) | (1 << 15), 0};
-
- /* FSMC is an alternate function 12 (AF12). */
- palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
- palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
- FSMC_Bank = 0;
-
- /* FSMC timing */
- FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
- | (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
- | (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
-
- /* Bank1 NOR/SRAM control register configuration
- * This is actually not needed as already set by default after reset */
- FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
-
- /* Display backlight always on. */
+ // D0 - D15
+ palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOD, 15, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOD, 0, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOD, 1, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 7, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 8, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 9, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 10, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 11, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 12, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 13, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 14, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOE, 15, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOD, 8, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOD, 9, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOD, 10, PAL_MODE_OUTPUT_PUSHPULL);
+
+ // RST
+ palSetPadMode(GPIOD, 3, PAL_MODE_OUTPUT_PUSHPULL);
+
+ // CS
+ palSetPadMode(GPIOD, 7, PAL_MODE_OUTPUT_PUSHPULL);
+ // DC
+ palSetPadMode(GPIOE, 3, PAL_MODE_OUTPUT_PUSHPULL);
+ // RD
+ palSetPadMode(GPIOD, 4, PAL_MODE_OUTPUT_PUSHPULL);
+ // WR
+ palSetPadMode(GPIOD, 5, PAL_MODE_OUTPUT_PUSHPULL);
+
+ /* Configure the pins to a well know state */
+ SET_DC;
+ SET_RD;
+ SET_WR;
+ CLR_CS;
+ //SET_RST;
+
+ /* Display backlight always on */
palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(GPIOD, 13);
}
@@ -79,7 +94,7 @@ static __inline void init_board(void) {
* @brief Set or clear the lcd reset pin.
*
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
- *
+ *
* @notapi
*/
static __inline void setpin_reset(bool_t state) {
@@ -94,7 +109,7 @@ static __inline void setpin_reset(bool_t state) {
* @brief Set the lcd back-light level.
*
* @param[in] percent 0 to 100%
- *
+ *
* @notapi
*/
static __inline void set_backlight(uint8_t percent) {
@@ -104,7 +119,6 @@ static __inline void set_backlight(uint8_t percent) {
/**
* @brief Take exclusive control of the bus
- * @note Not needed, not implemented
*
* @notapi
*/
@@ -114,7 +128,6 @@ static __inline void acquire_bus(void) {
/**
* @brief Release exclusive control of the bus
- * @note Not needed, not implemented
*
* @notapi
*/
@@ -130,18 +143,58 @@ static __inline void release_bus(void) {
* @notapi
*/
static __inline void write_index(uint16_t index) {
- GDISP_REG = index;
+
+ // D0 - D15
+ palWritePad(GPIOD, 14, index & 1);
+ palWritePad(GPIOD, 15, (index >> 1) & 1);
+ palWritePad(GPIOD, 0, (index >> 2) & 1);
+ palWritePad(GPIOD, 1, (index >> 3) & 1);
+ palWritePad(GPIOE, 7, (index >> 4) & 1);
+ palWritePad(GPIOE, 8, (index >> 5) & 1);
+ palWritePad(GPIOE, 9, (index >> 6) & 1);
+ palWritePad(GPIOE, 10, (index >> 7) & 1);
+ palWritePad(GPIOE, 11, (index >> 8) & 1);
+ palWritePad(GPIOE, 12, (index >> 9) & 1);
+ palWritePad(GPIOE, 13, (index >> 10) & 1);
+ palWritePad(GPIOE, 14, (index >> 11) & 1);
+ palWritePad(GPIOE, 15, (index >> 12) & 1);
+ palWritePad(GPIOD, 8, (index >> 13) & 1);
+ palWritePad(GPIOD, 9, (index >> 14) & 1);
+ palWritePad(GPIOD, 10, (index >> 15) & 1);
+
+ /* Control lines */
+ CLR_DC; CLR_WR; SET_WR; SET_DC;
}
/**
* @brief Send data to the lcd.
*
* @param[in] data The data to send
- *
+ *
* @notapi
*/
static __inline void write_data(uint16_t data) {
- GDISP_RAM = data;
+
+ // D0 - D15
+ palWritePad(GPIOD, 14, data & 1);
+ palWritePad(GPIOD, 15, (data >> 1) & 1);
+ palWritePad(GPIOD, 0, (data >> 2) & 1);
+ palWritePad(GPIOD, 1, (data >> 3) & 1);
+ palWritePad(GPIOE, 7, (data >> 4) & 1);
+ palWritePad(GPIOE, 8, (data >> 5) & 1);
+ palWritePad(GPIOE, 9, (data >> 6) & 1);
+ palWritePad(GPIOE, 10, (data >> 7) & 1);
+ palWritePad(GPIOE, 11, (data >> 8) & 1);
+ palWritePad(GPIOE, 12, (data >> 9) & 1);
+ palWritePad(GPIOE, 13, (data >> 10) & 1);
+ palWritePad(GPIOE, 14, (data >> 11) & 1);
+ palWritePad(GPIOE, 15, (data >> 12) & 1);
+ palWritePad(GPIOD, 8, (data >> 13) & 1);
+ palWritePad(GPIOD, 9, (data >> 14) & 1);
+ palWritePad(GPIOD, 10, (data >> 15) & 1);
+
+ /* Control lines */
+ CLR_WR; SET_WR;
}
#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
@@ -151,11 +204,24 @@ static __inline void write_data(uint16_t data) {
* @return The data from the lcd
* @note The chip select may need to be asserted/de-asserted
* around the actual spi read
- *
+ *
* @notapi
*/
static __inline uint16_t read_data(void) {
- return GDISP_RAM;
+ uint16_t value;
+/*
+ // change pin mode to digital input
+ palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
+
+ CLR_RD;
+ value = palReadPort(GPIOE);
+ value = palReadPort(GPIOE);
+ SET_RD;
+
+ // change pin mode back to digital output
+ palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
+*/
+ return value;
}
#endif
diff --git a/drivers/gdisp/SSD2119/gdisp_lld_board_firebullstm32f103.h b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h
index feb095bd..90a8ec8a 100644
--- a/drivers/gdisp/SSD2119/gdisp_lld_board_firebullstm32f103.h
+++ b/drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb_fsmc.h
@@ -19,7 +19,7 @@
*/
/**
- * @file drivers/gdisp/SSD2119/gdisp_lld_board_firebullstm32f103.h
+ * @file drivers/gdisp/SSD2119/gdisp_lld_board_embest_dmstf4bb.h
* @brief GDISP Graphic Driver subsystem board interface for the SSD2119 display.
*
* @addtogroup GDISP
@@ -29,14 +29,12 @@
#ifndef _GDISP_LLD_BOARD_H
#define _GDISP_LLD_BOARD_H
-#define SET_CS palSetPad(GPIOD, 12);
-#define CLR_CS palClearPad(GPIOD, 12);
-#define SET_RS palSetPad(GPIOD, 13);
-#define CLR_RS palClearPad(GPIOD, 13);
-#define SET_WR palSetPad(GPIOD, 14);
-#define CLR_WR palClearPad(GPIOD, 14);
-#define SET_RD palSetPad(GPIOD, 15);
-#define CLR_RD palClearPad(GPIOD, 15);
+/* Using FSMC A19 (PE3) as DC */
+#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* DC = 0 */
+#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* DC = 1 */
+
+#define SET_RST palSetPad(GPIOD, 3);
+#define CLR_RST palClearPad(GPIOD, 3);
/**
* @brief Initialise the board for the display.
@@ -45,37 +43,61 @@
* @notapi
*/
static __inline void init_board(void) {
- palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
- palSetPadMode(GPIOD, 12, PAL_MODE_OUTPUT_PUSHPULL);
+ unsigned char FSMC_Bank;
+
+ /* STM32F4 FSMC init */
+ rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
+
+ /* Group pins */
+ IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
+ (1 << 9) | (1 << 10) | (1 << 14) | (1 << 15), 0};
+
+ IOBus busE = {GPIOE, (1 << 3) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
+ (1 << 13) | (1 << 14) | (1 << 15), 0};
+
+ /* FSMC is an alternate function 12 (AF12) */
+ palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
+ palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
+
+ FSMC_Bank = 0;
+
+ /* FSMC timing */
+ FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
+ | (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
+ | (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
+
+ /* Bank1 NOR/SRAM control register configuration
+ * This is actually not needed as already set by default after reset */
+ FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
+
+ /* Display backlight always on */
palSetPadMode(GPIOD, 13, PAL_MODE_OUTPUT_PUSHPULL);
- palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL);
- palSetPadMode(GPIOD, 15, PAL_MODE_OUTPUT_PUSHPULL);
-
- // Configure the pins to a well know state
- SET_RS;
- SET_RD;
- SET_WR;
- CLR_CS;
-}
+ palSetPad(GPIOD, 13);
+ /* TIM4 is an alternate function 2 (AF2) */
+ //palSetPadMode(GPIOD, 13, PAL_MODE_ALTERNATE(2));
+}
/**
* @brief Set or clear the lcd reset pin.
*
* @param[in] state TRUE = lcd in reset, FALSE = normal operation
- *
+ *
* @notapi
*/
static __inline void setpin_reset(bool_t state) {
- (void) state;
- /* Nothing to do here - reset pin tied to Vcc */
+ if (state) {
+ CLR_RST;
+ } else {
+ SET_RST;
+ }
}
/**
* @brief Set the lcd back-light level.
*
* @param[in] percent 0 to 100%
- *
+ *
* @notapi
*/
static __inline void set_backlight(uint8_t percent) {
@@ -85,6 +107,7 @@ static __inline void set_backlight(uint8_t percent) {
/**
* @brief Take exclusive control of the bus
+ * @note Not needed, not implemented
*
* @notapi
*/
@@ -94,6 +117,7 @@ static __inline void acquire_bus(void) {
/**
* @brief Release exclusive control of the bus
+ * @note Not needed, not implemented
*
* @notapi
*/
@@ -109,20 +133,18 @@ static __inline void release_bus(void) {
* @notapi
*/
static __inline void write_index(uint16_t index) {
- palWritePort(GPIOE, index);
- CLR_RS; CLR_WR; SET_WR; SET_RS;
+ GDISP_REG = index;
}
/**
* @brief Send data to the lcd.
*
* @param[in] data The data to send
- *
+ *
* @notapi
*/
static __inline void write_data(uint16_t data) {
- palWritePort(GPIOE, data);
- CLR_WR; SET_WR;
+ GDISP_RAM = data;
}
#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
@@ -132,24 +154,11 @@ static __inline void write_data(uint16_t data) {
* @return The data from the lcd
* @note The chip select may need to be asserted/de-asserted
* around the actual spi read
- *
+ *
* @notapi
*/
static __inline uint16_t read_data(void) {
- uint16_t value;
-
- // change pin mode to digital input
- palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_INPUT);
-
- CLR_RD;
- value = palReadPort(GPIOE);
- value = palReadPort(GPIOE);
- SET_RD;
-
- // change pin mode back to digital output
- palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
-
- return value;
+ return GDISP_RAM;
}
#endif
diff --git a/drivers/gdisp/SSD2119/gdisp_lld_board_example.h b/drivers/gdisp/SSD2119/gdisp_lld_board_example.h
deleted file mode 100644
index 242b0887..00000000
--- a/drivers/gdisp/SSD2119/gdisp_lld_board_example.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- ChibiOS/GFX - Copyright (C) 2012
- Joel Bodenmann aka Tectu <joel@unormal.org>
-
- This file is part of ChibiOS/GFX.
-
- ChibiOS/GFX is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/GFX is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file drivers/gdisp/SSD2119/gdisp_lld_board_example.h
- * @brief GDISP Graphic Driver subsystem board interface for the SSD2119 display.
- *
- * @addtogroup GDISP
- * @{
- */
-
-#ifndef _GDISP_LLD_BOARD_H
-#define _GDISP_LLD_BOARD_H
-
-/**
- * @brief Initialise the board for the display.
- *
- * @notapi
- */
-static __inline void init_board(void) {
- /* Code here */
-#error "SSD2119: You must supply a definition for init_board for your board"
-}
-
-/**
- * @brief Set or clear the lcd reset pin.
- *
- * @param[in] state TRUE = lcd in reset, FALSE = normal operation
- *
- * @notapi
- */
-static __inline void setpin_reset(bool_t state) {
- /* Code here */
-#error "SSD2119: You must supply a definition for setpin_reset for your board"
-}
-
-/**
- * @brief Set the lcd back-light level.
- *
- * @param[in] percent 0 to 100%
- *
- * @notapi
- */
-static __inline void set_backlight(uint8_t percent) {
- /* Code here */
-#error "SSD2119: You must supply a definition for set_backlight for your board"
-}
-
-/**
- * @brief Take exclusive control of the bus
- *
- * @notapi
- */
-static __inline void acquire_bus(void) {
-#error "SSD2119: You must supply a definition for acquire_bus for your board"
-}
-
-/**
- * @brief Release exclusive control of the bus
- *
- * @notapi
- */
-static __inline void release_bus(void) {
-#error "SSD2119: You must supply a definition for release_bus for your board"
-}
-
-/**
- * @brief Send data to the index register.
- *
- * @param[in] index The index register to set
- *
- * @notapi
- */
-static __inline void write_index(uint16_t index) {
- /* Code here */
-#error "SSD2119: You must supply a definition for write_index for your board"
-}
-
-/**
- * @brief Send data to the lcd.
- *
- * @param[in] data The data to send
- *
- * @notapi
- */
-static __inline void write_data(uint16_t data) {
- /* Code here */
-#error "SSD2119: You must supply a definition for write_data for your board"
-}
-
-#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
-/**
- * @brief Read data from the lcd.
- *
- * @return The data from the lcd
- * @note The chip select may need to be asserted/de-asserted
- * around the actual spi read
- *
- * @notapi
- */
-static __inline uint16_t read_data(void) {
- /* Code here */
-#error "SSD2119: You must supply a definition for read_data for your board"
-}
-#endif
-
-#endif /* _GDISP_LLD_BOARD_H */
-/** @} */
diff --git a/drivers/gdisp/SSD2119/gdisp_lld_board_example_fsmc.h b/drivers/gdisp/SSD2119/gdisp_lld_board_example_fsmc.h
deleted file mode 100644
index 88b30a58..00000000
--- a/drivers/gdisp/SSD2119/gdisp_lld_board_example_fsmc.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- ChibiOS/GFX - Copyright (C) 2012
- Joel Bodenmann aka Tectu <joel@unormal.org>
-
- This file is part of ChibiOS/GFX.
-
- ChibiOS/GFX is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/GFX is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file drivers/gdisp/SSD2119/gdisp_lld_board_example_fsmc.h
- * @brief GDISP Graphic Driver subsystem board interface for the SSD2119 display.
- *
- * @addtogroup GDISP
- * @{
- */
-
-#ifndef _GDISP_LLD_BOARD_H
-#define _GDISP_LLD_BOARD_H
-
-#define GDISP_REG ((volatile uint16_t *) 0x60000000)[0] /* RS = 0 */
-#define GDISP_RAM ((volatile uint16_t *) 0x60020000)[0] /* RS = 1 */
-
-/**
- * @brief Initialise the board for the display.
- * @notes Performs the following functions:
- * 1. initialise the io port used by your display
- * 2. initialise the reset pin (initial state not-in-reset)
- * 3. initialise the chip select pin (initial state not-active)
- * 4. initialise the backlight pin (initial state back-light off)
- *
- * @notapi
- */
-static __inline void init_board(void) {
- const unsigned char FSMC_Bank;
-
- #if defined(STM32F1XX) || defined(STM32F3XX)
- /* FSMC setup for F1/F3 */
- rccEnableAHB(RCC_AHBENR_FSMCEN, 0);
-
- #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
- #error "DMA not implemented for F1/F3 Devices"
- #endif
- #elif defined(STM32F4XX) || defined(STM32F2XX)
- /* STM32F2-F4 FSMC init */
- rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
-
- #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
- if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) chSysHalt();
- dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
- dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M);
- #endif
- #else
- #error "FSMC not implemented for this device"
- #endif
-
- /* set pins to FSMC mode */
- IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
- (1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
-
- IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
- (1 << 13) | (1 << 14) | (1 << 15), 0};
-
- palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
- palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
-
- FSMC_Bank = 0;
-
- /* FSMC timing */
- FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
- | (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
- | (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;
-
- /* Bank1 NOR/SRAM control register configuration
- * This is actually not needed as already set by default after reset */
- FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
-}
-
-/**
- * @brief Set or clear the lcd reset pin.
- *
- * @param[in] state TRUE = lcd in reset, FALSE = normal operation
- *
- * @notapi
- */
-static __inline void setpin_reset(bool_t state) {
- (void) state;
- /* Nothing to do here */
-}
-
-/**
- * @brief Set the lcd back-light level.
- *
- * @param[in] percent 0 to 100%
- *
- * @notapi
- */
-static __inline void set_backlight(uint8_t percent) {
- (void) percent;
- /* Nothing to do here */
-}
-
-/**
- * @brief Take exclusive control of the bus
- *
- * @notapi
- */
-static __inline void acquire_bus(void) {
- /* Nothing to do here */
-}
-
-/**
- * @brief Release exclusive control of the bus
- *
- * @notapi
- */
-static __inline void release_bus(void) {
- /* Nothing to do here */
-}
-
-/**
- * @brief Send data to the index register.
- *
- * @param[in] index The index register to set
- *
- * @notapi
- */
-static __inline void write_index(uint16_t index) { GDISP_REG = index; }
-
-/**
- * @brief Send data to the lcd.
- *
- * @param[in] data The data to send
- *
- * @notapi
- */
-static __inline void write_data(uint16_t data) { GDISP_RAM = data; }
-
-#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
-/**
- * @brief Read data from the lcd.
- *
- * @return The data from the lcd
- * @note The chip select may need to be asserted/de-asserted
- * around the actual spi read
- *
- * @notapi
- */
-static __inline uint16_t read_data(void) { return GDISP_RAM; }
-#endif
-
-#endif /* _GDISP_LLD_BOARD_H */
-/** @} */