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| author | inmarket <andrewh@inmarket.com.au> | 2015-05-09 23:38:47 +1000 |
|---|---|---|
| committer | inmarket <andrewh@inmarket.com.au> | 2015-05-09 23:38:47 +1000 |
| commit | 201172ab699243e04595f8e03b49de62c4149409 (patch) | |
| tree | 4c60fd1bb6d0339b8f62a59c1e3628b40880bcdb /boards | |
| parent | 734416a840c50b4857249f50c0c716f6c26faaf8 (diff) | |
| download | uGFX-201172ab699243e04595f8e03b49de62c4149409.tar.gz uGFX-201172ab699243e04595f8e03b49de62c4149409.tar.bz2 uGFX-201172ab699243e04595f8e03b49de62c4149409.zip | |
Improve the UEXT bus descriptor file
Diffstat (limited to 'boards')
| -rw-r--r-- | boards/base/Olimex-SAM7EX256-GE8/board_uext.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/boards/base/Olimex-SAM7EX256-GE8/board_uext.h b/boards/base/Olimex-SAM7EX256-GE8/board_uext.h index f82eedc8..f59ff46d 100644 --- a/boards/base/Olimex-SAM7EX256-GE8/board_uext.h +++ b/boards/base/Olimex-SAM7EX256-GE8/board_uext.h @@ -13,6 +13,21 @@ #ifndef _BOARD_UEXT_H #define _BOARD_UEXT_H +/* + * The UEXT official pin definitions + * + * +-------+ + * 3.3V 1 | + + | 2 GND + * TX 3 | + + | 4 RX + * SCL 5 + + | 6 SDA + * MISO 7 | + + | 8 MOSI + * SCK 9 | + + | 10 SSEL/CS + * +-------+ + * + * Note many small displays using SPI will incorrectly use the SCL/SDA terminology on their pins. + * They should be connected to SCK/MOSI respectively + */ + // These definitions match the physical arrangement of the UEXT on your board #define UEXT_PORT_PIN3 AT91C_BASE_PIOA #define UEXT_PORTPIN_PIN3 6 @@ -31,11 +46,12 @@ #define UEXT_PORT_PIN10 AT91C_BASE_PIOA #define UEXT_PORTPIN_PIN10 21 - +// The ports that the various serial devices use for UEXT on your board #define UEXT_SERIAL (&SD2) // TX = UEXT PIN 3, RX = UEXT PIN 4 #define UEXT_SPI (&SPID2) // MISO = UEXT PIN 7, MOSI = UEXT PIN 8, SCK = UEXT PIN 9, CS = UEXT PIN 10 -#define UEXT_I2C (&I2CD1) // TWCK = UEXT PIN 5, TWD = UEXT PIN 6 +#define UEXT_I2C (&I2CD1) // SCL/TWCK = UEXT PIN 5, SDA/TWD = UEXT PIN 6 +// We now define generic names for the UEXT pins #define UEXT_SPI_MISO_PORT UEXT_PORT_PIN7 #define UEXT_SPI_MISO_PORTPIN UEXT_PORTPIN_PIN7 #define UEXT_SPI_MOSI_PORT UEXT_PORT_PIN8 |