diff options
author | inmarket <andrewh@inmarket.com.au> | 2015-10-06 01:13:11 +1000 |
---|---|---|
committer | inmarket <andrewh@inmarket.com.au> | 2015-10-06 01:13:11 +1000 |
commit | 470868f51a9a937f0a045ca2081e4183bc76ec0c (patch) | |
tree | 900f3e79a330fb722793b508edfbbccf7733a726 /boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.h | |
parent | d4ef20f47ece19d3a6072d708b9ce316497e00e0 (diff) | |
download | uGFX-470868f51a9a937f0a045ca2081e4183bc76ec0c.tar.gz uGFX-470868f51a9a937f0a045ca2081e4183bc76ec0c.tar.bz2 uGFX-470868f51a9a937f0a045ca2081e4183bc76ec0c.zip |
More STM32F746-Discovery changes.
Diffstat (limited to 'boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.h')
-rw-r--r-- | boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.h | 118 |
1 files changed, 2 insertions, 116 deletions
diff --git a/boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.h b/boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.h index 5512f9d8..abf88291 100644 --- a/boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.h +++ b/boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.h @@ -44,127 +44,13 @@ extern "C" { #endif -/* Includes ------------------------------------------------------------------*/ -#include "stm32f7xx_hal_rcc.h" -#include "stm32f7xx_hal_rcc_ex.h" -#include "stm32f7xx_hal_dma.h" -#include "stm32f7xx_hal_gpio.h" -#include "stm32f7xx_hal_sdram.h" -#include "stm32f7xx_ll_fmc.h" - -/** @addtogroup BSP - * @{ - */ - -/** @addtogroup STM32746G_DISCOVERY - * @{ - */ - -/** @addtogroup STM32746G_DISCOVERY_SDRAM - * @{ - */ - -/** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Types STM32746G_DISCOVERY_SDRAM Exported Types - * @{ - */ - -/** - * @brief SDRAM status structure definition - */ -#define SDRAM_OK ((uint8_t)0x00) -#define SDRAM_ERROR ((uint8_t)0x01) - -/** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Constants STM32746G_DISCOVERY_SDRAM Exported Constants - * @{ - */ #define SDRAM_DEVICE_ADDR ((uint32_t)0xC0000000) #define SDRAM_DEVICE_SIZE ((uint32_t)0x800000) /* SDRAM device size in MBytes */ -/* #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_8 */ -#define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_16 - -#define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_2 -/* #define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_3 */ - -#define REFRESH_COUNT ((uint32_t)0x0603) /* SDRAM refresh counter (100Mhz SD clock) */ - -#define SDRAM_TIMEOUT ((uint32_t)0xFFFF) - -/* DMA definitions for SDRAM DMA transfer */ -#define __DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE -#define __DMAx_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE -#define SDRAM_DMAx_CHANNEL DMA_CHANNEL_0 -#define SDRAM_DMAx_STREAM DMA2_Stream0 -#define SDRAM_DMAx_IRQn DMA2_Stream0_IRQn -#define SDRAM_DMAx_IRQHandler DMA2_Stream0_IRQHandler -/** - * @} - */ - -/** - * @brief FMC SDRAM Mode definition register defines - */ -#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000) -#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001) -#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002) -#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004) -#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000) -#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008) -#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020) -#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030) -#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000) -#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) -#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200) -/** - * @} - */ - -/** @defgroup STM32746G_DISCOVERY_SDRAM_Exported_Macro STM32746G_DISCOVERY_SDRAM Exported Macro - * @{ - */ -/** - * @} - */ - -/** @addtogroup STM32746G_DISCOVERY_SDRAM_Exported_Functions - * @{ - */ -uint8_t BSP_SDRAM_Init(void); -uint8_t BSP_SDRAM_DeInit(void); -void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount); -uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); -uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); -uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); -uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); -uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd); -void BSP_SDRAM_DMA_IRQHandler(void); - -/* These functions can be modified in case the current settings (e.g. DMA stream) - need to be changed for specific application needs */ -void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params); -void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params); - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ +void BSP_SDRAM_Init(void); #ifdef __cplusplus } #endif -#endif /* __STM32746G_DISCOVERY_SDRAM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +#endif |