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| author | inmarket <andrewh@inmarket.com.au> | 2013-10-28 19:49:39 +1000 |
|---|---|---|
| committer | inmarket <andrewh@inmarket.com.au> | 2013-10-28 19:49:39 +1000 |
| commit | dc2d5be60625dc03f0982d61a55dd3ccf844fff5 (patch) | |
| tree | b9cf050cf50b77ed67fb36a50efbea9e4c937227 /boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board | |
| parent | 0fe4d3a037fd8989227604805a2f130eb67038de (diff) | |
| download | uGFX-dc2d5be60625dc03f0982d61a55dd3ccf844fff5.tar.gz uGFX-dc2d5be60625dc03f0982d61a55dd3ccf844fff5.tar.bz2 uGFX-dc2d5be60625dc03f0982d61a55dd3ccf844fff5.zip | |
uGFX board definition for the Mikromedia STM32 M4 board.
Includes the required ChibiOS board files and an example Makefile.
Diffstat (limited to 'boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board')
7 files changed, 4018 insertions, 0 deletions
diff --git a/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.c b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.c new file mode 100644 index 00000000..7dc6f285 --- /dev/null +++ b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.c @@ -0,0 +1,92 @@ +#include "ch.h" +#include "hal.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +const PALConfig pal_default_config = +{ + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, + VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, + VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, + VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, + VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, + VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, + VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, + VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, + VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} +}; +#endif + +/** + * @brief Early initialization code. + * @details This initialization must be performed just after stack setup + * and before any other initialization. + */ +void __early_init(void) { + + stm32_clock_init(); +} + +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return TRUE; +} + +/** + * @brief SDC card write protection detection. + */ +bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return FALSE; +} +#endif /* HAL_USE_SDC */ + +#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) +/** + * @brief MMC_SPI card detection. + */ +bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) { + + (void)mmcp; + return !palReadPad(GPIOD, GPIOD_SD_CD); +} + +/** + * @brief MMC_SPI card write protection detection. + */ +bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) { + + (void)mmcp; + /* Board has no write protection detection */ + return FALSE; +} +#endif + +/** + * @brief Board-specific initialization code. + * @todo Add your board-specific code, if any. + */ +void boardInit(void) { + +} diff --git a/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.h b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.h new file mode 100644 index 00000000..490c0307 --- /dev/null +++ b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.h @@ -0,0 +1,1299 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for mikromedia STM32-M4 board. + */ + +/* + * Board identifier. + */ +#define BOARD_MIKROE_MIKROMEDIA_M4 +#define BOARD_NAME "mikromedia STM32-M4" + + +/* + * Board oscillators-related settings. + */ +#if !defined(STM32_LSECLK) +#define STM32_LSECLK 32768 +#endif + +#if !defined(STM32_HSECLK) +#define STM32_HSECLK 16000000 +#endif + +/* + * Board voltages. + * Required for performance limits calculation. + */ +#define STM32_VDD 330 + +/* + * MCU type as defined in the ST header file stm32f4xx.h. + */ +#define STM32F4XX + +/* + * IO pins assignments. + */ +#define GPIOA_VSENSE 0 +#define GPIOA_PIN1 1 +#define GPIOA_PIN2 2 +#define GPIOA_PIN3 3 +#define GPIOA_PIN4 4 +#define GPIOA_PIN5 5 +#define GPIOA_PIN6 6 +#define GPIOA_PIN7 7 +#define GPIOA_PIN8 8 +#define GPIOA_VBUS_FS 9 +#define GPIOA_PIN10 10 +#define GPIOA_OTG_FS_DM 11 +#define GPIOA_OTG_FS_DP 12 +#define GPIOA_TMS 13 +#define GPIOA_TCK 14 +#define GPIOA_TDI 15 + +#define GPIOB_LCD_YD 0 +#define GPIOB_LCD_XL 1 +#define GPIOB_PIN2 2 +#define GPIOB_TDO 3 +#define GPIOB_TRST 4 +#define GPIOB_PIN5 5 +#define GPIOB_SCL1 6 +#define GPIOB_SDA1 7 +#define GPIOB_DRIVEA 8 +#define GPIOB_DRIVEB 9 +#define GPIOB_SCL2 10 +#define GPIOB_SDA2 11 +#define GPIOB_PIN12 12 +#define GPIOB_SCK2 13 +#define GPIOB_MISO2 14 +#define GPIOB_MOSI2 15 + +#define GPIOC_PIN0 0 +#define GPIOC_PIN1 1 +#define GPIOC_PIN2 2 +#define GPIOC_PIN3 3 +#define GPIOC_PIN4 4 +#define GPIOC_PIN5 5 +#define GPIOC_MP3_DREQ 6 +#define GPIOC_MP3_RST 7 +#define GPIOC_MP3_CS 8 +#define GPIOC_MP3_DCS 9 +#define GPIOC_SCK3 10 +#define GPIOC_MISO3 11 +#define GPIOC_MOSI3 12 +#define GPIOC_STAT 13 +#define GPIOC_PIN14 14 +#define GPIOC_PIN15 15 + +#define GPIOD_PIN0 0 +#define GPIOD_PIN1 1 +#define GPIOD_PIN2 2 +#define GPIOD_SD_CS 3 +#define GPIOD_PIN4 4 +#define GPIOD_TX2 5 +#define GPIOD_RX2 6 +#define GPIOD_FLASH_CS 7 +#define GPIOD_PIN8 8 +#define GPIOD_PIN9 9 +#define GPIOD_PIN10 10 +#define GPIOD_PIN11 11 +#define GPIOD_PIN12 12 +#define GPIOD_PIN13 13 +#define GPIOD_PIN14 14 +#define GPIOD_SD_CD 15 + +#define GPIOE_TD0 0 +#define GPIOE_TD1 1 +#define GPIOE_TD2 2 +#define GPIOE_TD3 3 +#define GPIOE_TD4 4 +#define GPIOE_TD5 5 +#define GPIOE_TD6 6 +#define GPIOE_TD7 7 +#define GPIOE_LCD_RST 8 +#define GPIOE_LCD_BLED 9 +#define GPIOE_PMRD 10 +#define GPIOE_PMWR 11 +#define GPIOE_LCD_RS 12 +#define GPIOE_PIN13 13 +#define GPIOE_PIN14 14 +#define GPIOE_LCD_CS 15 + +#define GPIOF_PIN0 0 +#define GPIOF_PIN1 1 +#define GPIOF_PIN2 2 +#define GPIOF_PIN3 3 +#define GPIOF_PIN4 4 +#define GPIOF_PIN5 5 +#define GPIOF_PIN6 6 +#define GPIOF_PIN7 7 +#define GPIOF_PIN8 8 +#define GPIOF_PIN9 9 +#define GPIOF_PIN10 10 +#define GPIOF_PIN11 11 +#define GPIOF_PIN12 12 +#define GPIOF_PIN13 13 +#define GPIOF_PIN14 14 +#define GPIOF_PIN15 15 + +#define GPIOG_PIN0 0 +#define GPIOG_PIN1 1 +#define GPIOG_PIN2 2 +#define GPIOG_PIN3 3 +#define GPIOG_PIN4 4 +#define GPIOG_PIN5 5 +#define GPIOG_PIN6 6 +#define GPIOG_PIN7 7 +#define GPIOG_PIN8 8 +#define GPIOG_PIN9 9 +#define GPIOG_PIN10 10 +#define GPIOG_PIN11 11 +#define GPIOG_PIN12 12 +#define GPIOG_PIN13 13 +#define GPIOG_PIN14 14 +#define GPIOG_PIN15 15 + +#define GPIOH_OSC_IN 0 +#define GPIOH_OSC_OUT 1 +#define GPIOH_PIN2 2 +#define GPIOH_PIN3 3 +#define GPIOH_PIN4 4 +#define GPIOH_PIN5 5 +#define GPIOH_PIN6 6 +#define GPIOH_PIN7 7 +#define GPIOH_PIN8 8 +#define GPIOH_PIN9 9 +#define GPIOH_PIN10 10 +#define GPIOH_PIN11 11 +#define GPIOH_PIN12 12 +#define GPIOH_PIN13 13 +#define GPIOH_PIN14 14 +#define GPIOH_PIN15 15 + +#define GPIOI_PIN0 0 +#define GPIOI_PIN1 1 +#define GPIOI_PIN2 2 +#define GPIOI_PIN3 3 +#define GPIOI_PIN4 4 +#define GPIOI_PIN5 5 +#define GPIOI_PIN6 6 +#define GPIOI_PIN7 7 +#define GPIOI_PIN8 8 +#define GPIOI_PIN9 9 +#define GPIOI_PIN10 10 +#define GPIOI_PIN11 11 +#define GPIOI_PIN12 12 +#define GPIOI_PIN13 13 +#define GPIOI_PIN14 14 +#define GPIOI_PIN15 15 + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the STM32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n) (0U << ((n) * 2)) +#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) +#define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) +#define PIN_ODR_LOW(n) (0U << (n)) +#define PIN_ODR_HIGH(n) (1U << (n)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_2M(n) (0U << ((n) * 2)) +#define PIN_OSPEED_25M(n) (1U << ((n) * 2)) +#define PIN_OSPEED_50M(n) (2U << ((n) * 2)) +#define PIN_OSPEED_100M(n) (3U << ((n) * 2)) +#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2)) +#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2)) +#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2)) +#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) + +/* + * GPIOA setup: + * + * PA0 - VSENSE (analog). + * PA1 - PIN1 (input pullup). + * PA2 - PIN2 (input pullup). + * PA3 - PIN3 (input pullup). + * PA4 - PIN4 (alternate 6). + * PA5 - PIN5 (alternate 5). + * PA6 - PIN6 (alternate 5). + * PA7 - PIN7 (alternate 5). + * PA8 - PIN8 (input pullup). + * PA9 - VBUS_FS (input floating). + * PA10 - PIN10 (input floating). + * PA11 - OTG_FS_DM (alternate 10). + * PA12 - OTG_FS_DP (alternate 10). + * PA13 - TMS (alternate 0). + * PA14 - TCK (alternate 0). + * PA15 - TDI (input pullup). + */ +#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(GPIOA_VSENSE) | \ + PIN_MODE_INPUT(GPIOA_PIN1) | \ + PIN_MODE_INPUT(GPIOA_PIN2) | \ + PIN_MODE_INPUT(GPIOA_PIN3) | \ + PIN_MODE_ALTERNATE(GPIOA_PIN4) | \ + PIN_MODE_ALTERNATE(GPIOA_PIN5) | \ + PIN_MODE_ALTERNATE(GPIOA_PIN6) | \ + PIN_MODE_ALTERNATE(GPIOA_PIN7) | \ + PIN_MODE_INPUT(GPIOA_PIN8) | \ + PIN_MODE_INPUT(GPIOA_VBUS_FS) | \ + PIN_MODE_INPUT(GPIOA_PIN10) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ + PIN_MODE_ALTERNATE(GPIOA_TMS) | \ + PIN_MODE_ALTERNATE(GPIOA_TCK) | \ + PIN_MODE_INPUT(GPIOA_TDI)) +#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_VSENSE) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ + PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ + PIN_OTYPE_PUSHPULL(GPIOA_TMS) | \ + PIN_OTYPE_PUSHPULL(GPIOA_TCK) | \ + PIN_OTYPE_PUSHPULL(GPIOA_TDI)) +#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_VSENSE) | \ + PIN_OSPEED_100M(GPIOA_PIN1) | \ + PIN_OSPEED_100M(GPIOA_PIN2) | \ + PIN_OSPEED_100M(GPIOA_PIN3) | \ + PIN_OSPEED_100M(GPIOA_PIN4) | \ + PIN_OSPEED_50M(GPIOA_PIN5) | \ + PIN_OSPEED_50M(GPIOA_PIN6) | \ + PIN_OSPEED_50M(GPIOA_PIN7) | \ + PIN_OSPEED_100M(GPIOA_PIN8) | \ + PIN_OSPEED_100M(GPIOA_VBUS_FS) | \ + PIN_OSPEED_100M(GPIOA_PIN10) | \ + PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \ + PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \ + PIN_OSPEED_100M(GPIOA_TMS) | \ + PIN_OSPEED_100M(GPIOA_TCK) | \ + PIN_OSPEED_100M(GPIOA_TDI)) +#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_VSENSE) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ + PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ + PIN_PUPDR_FLOATING(GPIOA_TMS) | \ + PIN_PUPDR_FLOATING(GPIOA_TCK) | \ + PIN_PUPDR_PULLUP(GPIOA_TDI)) +#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_VSENSE) | \ + PIN_ODR_HIGH(GPIOA_PIN1) | \ + PIN_ODR_HIGH(GPIOA_PIN2) | \ + PIN_ODR_HIGH(GPIOA_PIN3) | \ + PIN_ODR_HIGH(GPIOA_PIN4) | \ + PIN_ODR_HIGH(GPIOA_PIN5) | \ + PIN_ODR_HIGH(GPIOA_PIN6) | \ + PIN_ODR_HIGH(GPIOA_PIN7) | \ + PIN_ODR_HIGH(GPIOA_PIN8) | \ + PIN_ODR_HIGH(GPIOA_VBUS_FS) | \ + PIN_ODR_HIGH(GPIOA_PIN10) | \ + PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ + PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ + PIN_ODR_HIGH(GPIOA_TMS) | \ + PIN_ODR_HIGH(GPIOA_TCK) | \ + PIN_ODR_HIGH(GPIOA_TDI)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_VSENSE, 0) | \ + PIN_AFIO_AF(GPIOA_PIN1, 0) | \ + PIN_AFIO_AF(GPIOA_PIN2, 0) | \ + PIN_AFIO_AF(GPIOA_PIN3, 0) | \ + PIN_AFIO_AF(GPIOA_PIN4, 6) | \ + PIN_AFIO_AF(GPIOA_PIN5, 5) | \ + PIN_AFIO_AF(GPIOA_PIN6, 5) | \ + PIN_AFIO_AF(GPIOA_PIN7, 5)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ + PIN_AFIO_AF(GPIOA_VBUS_FS, 0) | \ + PIN_AFIO_AF(GPIOA_PIN10, 0) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \ + PIN_AFIO_AF(GPIOA_TMS, 0) | \ + PIN_AFIO_AF(GPIOA_TCK, 0) | \ + PIN_AFIO_AF(GPIOA_TDI, 0)) + +/* + * GPIOB setup: + * + * PB0 - LCD_YD (analog). + * PB1 - LCD_XL (analog). + * PB2 - PIN2 (input pullup). + * PB3 - TDO (alternate 0). + * PB4 - TRST (input pullup). + * PB5 - PIN5 (input pullup). + * PB6 - SCL1 (alternate 4). + * PB7 - SDA1 (input pullup). + * PB8 - DRIVEA (output pushpull maximum). + * PB9 - DRIVEB (output opendrain maximum). + * PB10 - SCL2 (input pullup). + * PB11 - SDA2 (input pullup). + * PB12 - PIN12 (input pullup). + * PB13 - SCK2 (input pullup). + * PB14 - MISO2 (input pullup). + * PB15 - MOSI2 (input pullup). + */ +#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_LCD_YD) | \ + PIN_MODE_ANALOG(GPIOB_LCD_XL) | \ + PIN_MODE_INPUT(GPIOB_PIN2) | \ + PIN_MODE_ALTERNATE(GPIOB_TDO) | \ + PIN_MODE_INPUT(GPIOB_TRST) | \ + PIN_MODE_INPUT(GPIOB_PIN5) | \ + PIN_MODE_ALTERNATE(GPIOB_SCL1) | \ + PIN_MODE_INPUT(GPIOB_SDA1) | \ + PIN_MODE_OUTPUT(GPIOB_DRIVEA) | \ + PIN_MODE_OUTPUT(GPIOB_DRIVEB) | \ + PIN_MODE_INPUT(GPIOB_SCL2) | \ + PIN_MODE_INPUT(GPIOB_SDA2) | \ + PIN_MODE_INPUT(GPIOB_PIN12) | \ + PIN_MODE_INPUT(GPIOB_SCK2) | \ + PIN_MODE_INPUT(GPIOB_MISO2) | \ + PIN_MODE_INPUT(GPIOB_MOSI2)) +#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_LCD_YD) | \ + PIN_OTYPE_PUSHPULL(GPIOB_LCD_XL) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_TDO) | \ + PIN_OTYPE_PUSHPULL(GPIOB_TRST) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_SCL1) | \ + PIN_OTYPE_PUSHPULL(GPIOB_SDA1) | \ + PIN_OTYPE_PUSHPULL(GPIOB_DRIVEA) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_DRIVEB) | \ + PIN_OTYPE_PUSHPULL(GPIOB_SCL2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_SDA2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOB_SCK2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_MISO2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_MOSI2)) +#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_LCD_YD) | \ + PIN_OSPEED_100M(GPIOB_LCD_XL) | \ + PIN_OSPEED_100M(GPIOB_PIN2) | \ + PIN_OSPEED_100M(GPIOB_TDO) | \ + PIN_OSPEED_100M(GPIOB_TRST) | \ + PIN_OSPEED_100M(GPIOB_PIN5) | \ + PIN_OSPEED_100M(GPIOB_SCL1) | \ + PIN_OSPEED_100M(GPIOB_SDA1) | \ + PIN_OSPEED_100M(GPIOB_DRIVEA) | \ + PIN_OSPEED_100M(GPIOB_DRIVEB) | \ + PIN_OSPEED_100M(GPIOB_SCL2) | \ + PIN_OSPEED_100M(GPIOB_SDA2) | \ + PIN_OSPEED_100M(GPIOB_PIN12) | \ + PIN_OSPEED_100M(GPIOB_SCK2) | \ + PIN_OSPEED_100M(GPIOB_MISO2) | \ + PIN_OSPEED_100M(GPIOB_MOSI2)) +#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_LCD_YD) | \ + PIN_PUPDR_FLOATING(GPIOB_LCD_XL) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOB_TDO) | \ + PIN_PUPDR_PULLUP(GPIOB_TRST) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOB_SCL1) | \ + PIN_PUPDR_PULLUP(GPIOB_SDA1) | \ + PIN_PUPDR_FLOATING(GPIOB_DRIVEA) | \ + PIN_PUPDR_FLOATING(GPIOB_DRIVEB) | \ + PIN_PUPDR_PULLUP(GPIOB_SCL2) | \ + PIN_PUPDR_PULLUP(GPIOB_SDA2) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOB_SCK2) | \ + PIN_PUPDR_PULLUP(GPIOB_MISO2) | \ + PIN_PUPDR_PULLUP(GPIOB_MOSI2)) +#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_LCD_YD) | \ + PIN_ODR_HIGH(GPIOB_LCD_XL) | \ + PIN_ODR_HIGH(GPIOB_PIN2) | \ + PIN_ODR_HIGH(GPIOB_TDO) | \ + PIN_ODR_HIGH(GPIOB_TRST) | \ + PIN_ODR_HIGH(GPIOB_PIN5) | \ + PIN_ODR_HIGH(GPIOB_SCL1) | \ + PIN_ODR_HIGH(GPIOB_SDA1) | \ + PIN_ODR_HIGH(GPIOB_DRIVEA) | \ + PIN_ODR_HIGH(GPIOB_DRIVEB) | \ + PIN_ODR_HIGH(GPIOB_SCL2) | \ + PIN_ODR_HIGH(GPIOB_SDA2) | \ + PIN_ODR_HIGH(GPIOB_PIN12) | \ + PIN_ODR_HIGH(GPIOB_SCK2) | \ + PIN_ODR_HIGH(GPIOB_MISO2) | \ + PIN_ODR_HIGH(GPIOB_MOSI2)) +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_LCD_YD, 0) | \ + PIN_AFIO_AF(GPIOB_LCD_XL, 0) | \ + PIN_AFIO_AF(GPIOB_PIN2, 0) | \ + PIN_AFIO_AF(GPIOB_TDO, 0) | \ + PIN_AFIO_AF(GPIOB_TRST, 0) | \ + PIN_AFIO_AF(GPIOB_PIN5, 0) | \ + PIN_AFIO_AF(GPIOB_SCL1, 4) | \ + PIN_AFIO_AF(GPIOB_SDA1, 4)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_DRIVEA, 0) | \ + PIN_AFIO_AF(GPIOB_DRIVEB, 0) | \ + PIN_AFIO_AF(GPIOB_SCL2, 0) | \ + PIN_AFIO_AF(GPIOB_SDA2, 0) | \ + PIN_AFIO_AF(GPIOB_PIN12, 0) | \ + PIN_AFIO_AF(GPIOB_SCK2, 0) | \ + PIN_AFIO_AF(GPIOB_MISO2, 0) | \ + PIN_AFIO_AF(GPIOB_MOSI2, 0)) + +/* + * GPIOC setup: + * + * PC0 - PIN0 (output pushpull maximum). + * PC1 - PIN1 (input pullup). + * PC2 - PIN2 (input pullup). + * PC3 - PIN3 (input pullup). + * PC4 - PIN4 (input pullup). + * PC5 - PIN5 (input pullup). + * PC6 - MP3_DREQ (input pullup). + * PC7 - MP3_RST (alternate 6). + * PC8 - MP3_CS (output pushpull maximum). + * PC9 - MP3_DCS (input pullup). + * PC10 - SCK3 (alternate 6). + * PC11 - MISO3 (alternate 6). + * PC12 - MOSI3 (alternate 6). + * PC13 - STAT (input pullup). + * PC14 - PIN14 (input pullup). + * PC15 - PIN15 (input pullup). + */ +#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_PIN0) | \ + PIN_MODE_INPUT(GPIOC_PIN1) | \ + PIN_MODE_INPUT(GPIOC_PIN2) | \ + PIN_MODE_INPUT(GPIOC_PIN3) | \ + PIN_MODE_INPUT(GPIOC_PIN4) | \ + PIN_MODE_INPUT(GPIOC_PIN5) | \ + PIN_MODE_INPUT(GPIOC_MP3_DREQ) | \ + PIN_MODE_ALTERNATE(GPIOC_MP3_RST) | \ + PIN_MODE_OUTPUT(GPIOC_MP3_CS) | \ + PIN_MODE_INPUT(GPIOC_MP3_DCS) | \ + PIN_MODE_ALTERNATE(GPIOC_SCK3) | \ + PIN_MODE_ALTERNATE(GPIOC_MISO3) | \ + PIN_MODE_ALTERNATE(GPIOC_MOSI3) | \ + PIN_MODE_INPUT(GPIOC_STAT) | \ + PIN_MODE_INPUT(GPIOC_PIN14) | \ + PIN_MODE_INPUT(GPIOC_PIN15)) +#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOC_MP3_DREQ) | \ + PIN_OTYPE_PUSHPULL(GPIOC_MP3_RST) | \ + PIN_OTYPE_PUSHPULL(GPIOC_MP3_CS) | \ + PIN_OTYPE_PUSHPULL(GPIOC_MP3_DCS) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SCK3) | \ + PIN_OTYPE_PUSHPULL(GPIOC_MISO3) | \ + PIN_OTYPE_PUSHPULL(GPIOC_MOSI3) | \ + PIN_OTYPE_PUSHPULL(GPIOC_STAT) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) +#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_PIN0) | \ + PIN_OSPEED_100M(GPIOC_PIN1) | \ + PIN_OSPEED_100M(GPIOC_PIN2) | \ + PIN_OSPEED_100M(GPIOC_PIN3) | \ + PIN_OSPEED_100M(GPIOC_PIN4) | \ + PIN_OSPEED_100M(GPIOC_PIN5) | \ + PIN_OSPEED_100M(GPIOC_MP3_DREQ) | \ + PIN_OSPEED_100M(GPIOC_MP3_RST) | \ + PIN_OSPEED_100M(GPIOC_MP3_CS) | \ + PIN_OSPEED_100M(GPIOC_MP3_DCS) | \ + PIN_OSPEED_100M(GPIOC_SCK3) | \ + PIN_OSPEED_100M(GPIOC_MISO3) | \ + PIN_OSPEED_100M(GPIOC_MOSI3) | \ + PIN_OSPEED_100M(GPIOC_STAT) | \ + PIN_OSPEED_100M(GPIOC_PIN14) | \ + PIN_OSPEED_100M(GPIOC_PIN15)) +#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOC_MP3_DREQ) | \ + PIN_PUPDR_FLOATING(GPIOC_MP3_RST) | \ + PIN_PUPDR_PULLUP(GPIOC_MP3_CS) | \ + PIN_PUPDR_PULLUP(GPIOC_MP3_DCS) | \ + PIN_PUPDR_FLOATING(GPIOC_SCK3) | \ + PIN_PUPDR_FLOATING(GPIOC_MISO3) | \ + PIN_PUPDR_FLOATING(GPIOC_MOSI3) | \ + PIN_PUPDR_PULLUP(GPIOC_STAT) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN15)) +#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ + PIN_ODR_HIGH(GPIOC_PIN1) | \ + PIN_ODR_HIGH(GPIOC_PIN2) | \ + PIN_ODR_HIGH(GPIOC_PIN3) | \ + PIN_ODR_HIGH(GPIOC_PIN4) | \ + PIN_ODR_HIGH(GPIOC_PIN5) | \ + PIN_ODR_HIGH(GPIOC_MP3_DREQ) | \ + PIN_ODR_HIGH(GPIOC_MP3_RST) | \ + PIN_ODR_HIGH(GPIOC_MP3_CS) | \ + PIN_ODR_HIGH(GPIOC_MP3_DCS) | \ + PIN_ODR_HIGH(GPIOC_SCK3) | \ + PIN_ODR_HIGH(GPIOC_MISO3) | \ + PIN_ODR_HIGH(GPIOC_MOSI3) | \ + PIN_ODR_HIGH(GPIOC_STAT) | \ + PIN_ODR_HIGH(GPIOC_PIN14) | \ + PIN_ODR_HIGH(GPIOC_PIN15)) +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \ + PIN_AFIO_AF(GPIOC_PIN1, 0) | \ + PIN_AFIO_AF(GPIOC_PIN2, 0) | \ + PIN_AFIO_AF(GPIOC_PIN3, 0) | \ + PIN_AFIO_AF(GPIOC_PIN4, 0) | \ + PIN_AFIO_AF(GPIOC_PIN5, 0) | \ + PIN_AFIO_AF(GPIOC_MP3_DREQ, 0) | \ + PIN_AFIO_AF(GPIOC_MP3_RST, 6)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_MP3_CS, 0) | \ + PIN_AFIO_AF(GPIOC_MP3_DCS, 0) | \ + PIN_AFIO_AF(GPIOC_SCK3, 6) | \ + PIN_AFIO_AF(GPIOC_MISO3, 6) | \ + PIN_AFIO_AF(GPIOC_MOSI3, 6) | \ + PIN_AFIO_AF(GPIOC_STAT, 0) | \ + PIN_AFIO_AF(GPIOC_PIN14, 0) | \ + PIN_AFIO_AF(GPIOC_PIN15, 0)) + +/* + * GPIOD setup: + * + * PD0 - PIN0 (input pullup). + * PD1 - PIN1 (input pullup). + * PD2 - PIN2 (input pullup). + * PD3 - SD_CS (output pushpull maximum). + * PD4 - PIN4 (output pushpull maximum). + * PD5 - TX2 (alternate 7). + * PD6 - RX2 (alternate 7). + * PD7 - FLASH_CS (output pushpull maximum). + * PD8 - PIN8 (input pullup). + * PD9 - PIN9 (input pullup). + * PD10 - PIN10 (input pullup). + * PD11 - PIN11 (input pullup). + * PD12 - PIN12 (output pushpull maximum). + * PD13 - PIN13 (output pushpull maximum). + * PD14 - PIN14 (output pushpull maximum). + * PD15 - SD_CD (output pushpull maximum). + */ +#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ + PIN_MODE_INPUT(GPIOD_PIN1) | \ + PIN_MODE_INPUT(GPIOD_PIN2) | \ + PIN_MODE_OUTPUT(GPIOD_SD_CS) | \ + PIN_MODE_OUTPUT(GPIOD_PIN4) | \ + PIN_MODE_ALTERNATE(GPIOD_TX2) | \ + PIN_MODE_ALTERNATE(GPIOD_RX2) | \ + PIN_MODE_OUTPUT(GPIOD_FLASH_CS) | \ + PIN_MODE_INPUT(GPIOD_PIN8) | \ + PIN_MODE_INPUT(GPIOD_PIN9) | \ + PIN_MODE_INPUT(GPIOD_PIN10) | \ + PIN_MODE_INPUT(GPIOD_PIN11) | \ + PIN_MODE_OUTPUT(GPIOD_PIN12) | \ + PIN_MODE_OUTPUT(GPIOD_PIN13) | \ + PIN_MODE_OUTPUT(GPIOD_PIN14) | \ + PIN_MODE_INPUT(GPIOD_SD_CD)) +#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOD_SD_CS) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOD_TX2) | \ + PIN_OTYPE_PUSHPULL(GPIOD_RX2) | \ + PIN_OTYPE_PUSHPULL(GPIOD_FLASH_CS) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOD_SD_CD)) +#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_PIN0) | \ + PIN_OSPEED_100M(GPIOD_PIN1) | \ + PIN_OSPEED_100M(GPIOD_PIN2) | \ + PIN_OSPEED_100M(GPIOD_SD_CS) | \ + PIN_OSPEED_100M(GPIOD_PIN4) | \ + PIN_OSPEED_100M(GPIOD_TX2) | \ + PIN_OSPEED_100M(GPIOD_RX2) | \ + PIN_OSPEED_100M(GPIOD_FLASH_CS) | \ + PIN_OSPEED_100M(GPIOD_PIN8) | \ + PIN_OSPEED_100M(GPIOD_PIN9) | \ + PIN_OSPEED_100M(GPIOD_PIN10) | \ + PIN_OSPEED_100M(GPIOD_PIN11) | \ + PIN_OSPEED_100M(GPIOD_PIN12) | \ + PIN_OSPEED_100M(GPIOD_PIN13) | \ + PIN_OSPEED_100M(GPIOD_PIN14) | \ + PIN_OSPEED_100M(GPIOD_SD_CD)) +#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOD_SD_CS) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOD_TX2) | \ + PIN_PUPDR_PULLUP(GPIOD_RX2) | \ + PIN_PUPDR_PULLUP(GPIOD_FLASH_CS) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOD_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOD_SD_CD)) +#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ + PIN_ODR_HIGH(GPIOD_PIN1) | \ + PIN_ODR_HIGH(GPIOD_PIN2) | \ + PIN_ODR_HIGH(GPIOD_SD_CS) | \ + PIN_ODR_HIGH(GPIOD_PIN4) | \ + PIN_ODR_HIGH(GPIOD_TX2) | \ + PIN_ODR_HIGH(GPIOD_RX2) | \ + PIN_ODR_HIGH(GPIOD_FLASH_CS) | \ + PIN_ODR_HIGH(GPIOD_PIN8) | \ + PIN_ODR_HIGH(GPIOD_PIN9) | \ + PIN_ODR_HIGH(GPIOD_PIN10) | \ + PIN_ODR_HIGH(GPIOD_PIN11) | \ + PIN_ODR_LOW(GPIOD_PIN12) | \ + PIN_ODR_LOW(GPIOD_PIN13) | \ + PIN_ODR_LOW(GPIOD_PIN14) | \ + PIN_ODR_LOW(GPIOD_SD_CD)) +#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \ + PIN_AFIO_AF(GPIOD_PIN1, 0) | \ + PIN_AFIO_AF(GPIOD_PIN2, 0) | \ + PIN_AFIO_AF(GPIOD_SD_CS, 0) | \ + PIN_AFIO_AF(GPIOD_PIN4, 0) | \ + PIN_AFIO_AF(GPIOD_TX2, 7) | \ + PIN_AFIO_AF(GPIOD_RX2, 7) | \ + PIN_AFIO_AF(GPIOD_FLASH_CS, 0)) +#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ + PIN_AFIO_AF(GPIOD_PIN9, 0) | \ + PIN_AFIO_AF(GPIOD_PIN10, 0) | \ + PIN_AFIO_AF(GPIOD_PIN11, 0) | \ + PIN_AFIO_AF(GPIOD_PIN12, 0) | \ + PIN_AFIO_AF(GPIOD_PIN13, 0) | \ + PIN_AFIO_AF(GPIOD_PIN14, 0) | \ + PIN_AFIO_AF(GPIOD_SD_CD, 0)) + +/* + * GPIOE setup: + * + * PE0 - TD0 (output pushpull maximum). + * PE1 - TD1 (output pushpull maximum). + * PE2 - TD2 (output pushpull maximum). + * PE3 - TD3 (output pushpull maximum). + * PE4 - TD4 (output pushpull maximum). + * PE5 - TD5 (output pushpull maximum). + * PE6 - TD6 (output pushpull maximum). + * PE7 - TD7 (output pushpull maximum). + * PE8 - LCD_RST (output pushpull maximum). + * PE9 - LCD_BLED (output pushpull maximum). + * PE10 - PMRD (output pushpull maximum). + * PE11 - PMWR (output pushpull maximum). + * PE12 - LCD_RS (output pushpull maximum). + * PE13 - PIN13 (input floating). + * PE14 - PIN14 (input floating). + * PE15 - LCD_CS (output pushpull maximum). + */ +#define VAL_GPIOE_MODER (PIN_MODE_OUTPUT(GPIOE_TD0) | \ + PIN_MODE_OUTPUT(GPIOE_TD1) | \ + PIN_MODE_OUTPUT(GPIOE_TD2) | \ + PIN_MODE_OUTPUT(GPIOE_TD3) | \ + PIN_MODE_OUTPUT(GPIOE_TD4) | \ + PIN_MODE_OUTPUT(GPIOE_TD5) | \ + PIN_MODE_OUTPUT(GPIOE_TD6) | \ + PIN_MODE_OUTPUT(GPIOE_TD7) | \ + PIN_MODE_OUTPUT(GPIOE_LCD_RST) | \ + PIN_MODE_OUTPUT(GPIOE_LCD_BLED) | \ + PIN_MODE_OUTPUT(GPIOE_PMRD) | \ + PIN_MODE_OUTPUT(GPIOE_PMWR) | \ + PIN_MODE_OUTPUT(GPIOE_LCD_RS) | \ + PIN_MODE_INPUT(GPIOE_PIN13) | \ + PIN_MODE_INPUT(GPIOE_PIN14) | \ + PIN_MODE_OUTPUT(GPIOE_LCD_CS)) +#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_TD0) | \ + PIN_OTYPE_PUSHPULL(GPIOE_TD1) | \ + PIN_OTYPE_PUSHPULL(GPIOE_TD2) | \ + PIN_OTYPE_PUSHPULL(GPIOE_TD3) | \ + PIN_OTYPE_PUSHPULL(GPIOE_TD4) | \ + PIN_OTYPE_PUSHPULL(GPIOE_TD5) | \ + PIN_OTYPE_PUSHPULL(GPIOE_TD6) | \ + PIN_OTYPE_PUSHPULL(GPIOE_TD7) | \ + PIN_OTYPE_PUSHPULL(GPIOE_LCD_RST) | \ + PIN_OTYPE_PUSHPULL(GPIOE_LCD_BLED) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PMRD) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PMWR) | \ + PIN_OTYPE_PUSHPULL(GPIOE_LCD_RS) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOE_LCD_CS)) +#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_TD0) | \ + PIN_OSPEED_100M(GPIOE_TD1) | \ + PIN_OSPEED_100M(GPIOE_TD2) | \ + PIN_OSPEED_100M(GPIOE_TD3) | \ + PIN_OSPEED_100M(GPIOE_TD4) | \ + PIN_OSPEED_100M(GPIOE_TD5) | \ + PIN_OSPEED_100M(GPIOE_TD6) | \ + PIN_OSPEED_100M(GPIOE_TD7) | \ + PIN_OSPEED_100M(GPIOE_LCD_RST) | \ + PIN_OSPEED_100M(GPIOE_LCD_BLED) | \ + PIN_OSPEED_100M(GPIOE_PMRD) | \ + PIN_OSPEED_100M(GPIOE_PMWR) | \ + PIN_OSPEED_100M(GPIOE_LCD_RS) | \ + PIN_OSPEED_100M(GPIOE_PIN13) | \ + PIN_OSPEED_100M(GPIOE_PIN14) | \ + PIN_OSPEED_100M(GPIOE_LCD_CS)) +#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_TD0) | \ + PIN_PUPDR_FLOATING(GPIOE_TD1) | \ + PIN_PUPDR_FLOATING(GPIOE_TD2) | \ + PIN_PUPDR_FLOATING(GPIOE_TD3) | \ + PIN_PUPDR_FLOATING(GPIOE_TD4) | \ + PIN_PUPDR_FLOATING(GPIOE_TD5) | \ + PIN_PUPDR_FLOATING(GPIOE_TD6) | \ + PIN_PUPDR_FLOATING(GPIOE_TD7) | \ + PIN_PUPDR_FLOATING(GPIOE_LCD_RST) | \ + PIN_PUPDR_FLOATING(GPIOE_LCD_BLED) | \ + PIN_PUPDR_FLOATING(GPIOE_PMRD) | \ + PIN_PUPDR_FLOATING(GPIOE_PMWR) | \ + PIN_PUPDR_FLOATING(GPIOE_LCD_RS) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOE_LCD_CS)) +#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_TD0) | \ + PIN_ODR_HIGH(GPIOE_TD1) | \ + PIN_ODR_HIGH(GPIOE_TD2) | \ + PIN_ODR_HIGH(GPIOE_TD3) | \ + PIN_ODR_HIGH(GPIOE_TD4) | \ + PIN_ODR_HIGH(GPIOE_TD5) | \ + PIN_ODR_HIGH(GPIOE_TD6) | \ + PIN_ODR_HIGH(GPIOE_TD7) | \ + PIN_ODR_HIGH(GPIOE_LCD_RST) | \ + PIN_ODR_LOW(GPIOE_LCD_BLED) | \ + PIN_ODR_HIGH(GPIOE_PMRD) | \ + PIN_ODR_HIGH(GPIOE_PMWR) | \ + PIN_ODR_HIGH(GPIOE_LCD_RS) | \ + PIN_ODR_HIGH(GPIOE_PIN13) | \ + PIN_ODR_HIGH(GPIOE_PIN14) | \ + PIN_ODR_LOW(GPIOE_LCD_CS)) +#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_TD0, 0) | \ + PIN_AFIO_AF(GPIOE_TD1, 0) | \ + PIN_AFIO_AF(GPIOE_TD2, 0) | \ + PIN_AFIO_AF(GPIOE_TD3, 0) | \ + PIN_AFIO_AF(GPIOE_TD4, 0) | \ + PIN_AFIO_AF(GPIOE_TD5, 0) | \ + PIN_AFIO_AF(GPIOE_TD6, 0) | \ + PIN_AFIO_AF(GPIOE_TD7, 0)) +#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_LCD_RST, 0) | \ + PIN_AFIO_AF(GPIOE_LCD_BLED, 0) | \ + PIN_AFIO_AF(GPIOE_PMRD, 0) | \ + PIN_AFIO_AF(GPIOE_PMWR, 0) | \ + PIN_AFIO_AF(GPIOE_LCD_RS, 0) | \ + PIN_AFIO_AF(GPIOE_PIN13, 0) | \ + PIN_AFIO_AF(GPIOE_PIN14, 0) | \ + PIN_AFIO_AF(GPIOE_LCD_CS, 0)) + +/* + * GPIOF setup: + * + * PF0 - PIN0 (input floating). + * PF1 - PIN1 (input floating). + * PF2 - PIN2 (input floating). + * PF3 - PIN3 (input floating). + * PF4 - PIN4 (input floating). + * PF5 - PIN5 (input floating). + * PF6 - PIN6 (input floating). + * PF7 - PIN7 (input floating). + * PF8 - PIN8 (input floating). + * PF9 - PIN9 (input floating). + * PF10 - PIN10 (input floating). + * PF11 - PIN11 (input floating). + * PF12 - PIN12 (input floating). + * PF13 - PIN13 (input floating). + * PF14 - PIN14 (input floating). + * PF15 - PIN15 (input floating). + */ +#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ + PIN_MODE_INPUT(GPIOF_PIN1) | \ + PIN_MODE_INPUT(GPIOF_PIN2) | \ + PIN_MODE_INPUT(GPIOF_PIN3) | \ + PIN_MODE_INPUT(GPIOF_PIN4) | \ + PIN_MODE_INPUT(GPIOF_PIN5) | \ + PIN_MODE_INPUT(GPIOF_PIN6) | \ + PIN_MODE_INPUT(GPIOF_PIN7) | \ + PIN_MODE_INPUT(GPIOF_PIN8) | \ + PIN_MODE_INPUT(GPIOF_PIN9) | \ + PIN_MODE_INPUT(GPIOF_PIN10) | \ + PIN_MODE_INPUT(GPIOF_PIN11) | \ + PIN_MODE_INPUT(GPIOF_PIN12) | \ + PIN_MODE_INPUT(GPIOF_PIN13) | \ + PIN_MODE_INPUT(GPIOF_PIN14) | \ + PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) +#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_100M(GPIOF_PIN0) | \ + PIN_OSPEED_100M(GPIOF_PIN1) | \ + PIN_OSPEED_100M(GPIOF_PIN2) | \ + PIN_OSPEED_100M(GPIOF_PIN3) | \ + PIN_OSPEED_100M(GPIOF_PIN4) | \ + PIN_OSPEED_100M(GPIOF_PIN5) | \ + PIN_OSPEED_100M(GPIOF_PIN6) | \ + PIN_OSPEED_100M(GPIOF_PIN7) | \ + PIN_OSPEED_100M(GPIOF_PIN8) | \ + PIN_OSPEED_100M(GPIOF_PIN9) | \ + PIN_OSPEED_100M(GPIOF_PIN10) | \ + PIN_OSPEED_100M(GPIOF_PIN11) | \ + PIN_OSPEED_100M(GPIOF_PIN12) | \ + PIN_OSPEED_100M(GPIOF_PIN13) | \ + PIN_OSPEED_100M(GPIOF_PIN14) | \ + PIN_OSPEED_100M(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN15)) +#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ + PIN_ODR_HIGH(GPIOF_PIN1) | \ + PIN_ODR_HIGH(GPIOF_PIN2) | \ + PIN_ODR_HIGH(GPIOF_PIN3) | \ + PIN_ODR_HIGH(GPIOF_PIN4) | \ + PIN_ODR_HIGH(GPIOF_PIN5) | \ + PIN_ODR_HIGH(GPIOF_PIN6) | \ + PIN_ODR_HIGH(GPIOF_PIN7) | \ + PIN_ODR_HIGH(GPIOF_PIN8) | \ + PIN_ODR_HIGH(GPIOF_PIN9) | \ + PIN_ODR_HIGH(GPIOF_PIN10) | \ + PIN_ODR_HIGH(GPIOF_PIN11) | \ + PIN_ODR_HIGH(GPIOF_PIN12) | \ + PIN_ODR_HIGH(GPIOF_PIN13) | \ + PIN_ODR_HIGH(GPIOF_PIN14) | \ + PIN_ODR_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0) | \ + PIN_AFIO_AF(GPIOF_PIN1, 0) | \ + PIN_AFIO_AF(GPIOF_PIN2, 0) | \ + PIN_AFIO_AF(GPIOF_PIN3, 0) | \ + PIN_AFIO_AF(GPIOF_PIN4, 0) | \ + PIN_AFIO_AF(GPIOF_PIN5, 0) | \ + PIN_AFIO_AF(GPIOF_PIN6, 0) | \ + PIN_AFIO_AF(GPIOF_PIN7, 0)) +#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ + PIN_AFIO_AF(GPIOF_PIN9, 0) | \ + PIN_AFIO_AF(GPIOF_PIN10, 0) | \ + PIN_AFIO_AF(GPIOF_PIN11, 0) | \ + PIN_AFIO_AF(GPIOF_PIN12, 0) | \ + PIN_AFIO_AF(GPIOF_PIN13, 0) | \ + PIN_AFIO_AF(GPIOF_PIN14, 0) | \ + PIN_AFIO_AF(GPIOF_PIN15, 0)) + +/* + * GPIOG setup: + * + * PG0 - PIN0 (input floating). + * PG1 - PIN1 (input floating). + * PG2 - PIN2 (input floating). + * PG3 - PIN3 (input floating). + * PG4 - PIN4 (input floating). + * PG5 - PIN5 (input floating). + * PG6 - PIN6 (input floating). + * PG7 - PIN7 (input floating). + * PG8 - PIN8 (input floating). + * PG9 - PIN9 (input floating). + * PG10 - PIN10 (input floating). + * PG11 - PIN11 (input floating). + * PG12 - PIN12 (input floating). + * PG13 - PIN13 (input floating). + * PG14 - PIN14 (input floating). + * PG15 - PIN15 (input floating). + */ +#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ + PIN_MODE_INPUT(GPIOG_PIN1) | \ + PIN_MODE_INPUT(GPIOG_PIN2) | \ + PIN_MODE_INPUT(GPIOG_PIN3) | \ + PIN_MODE_INPUT(GPIOG_PIN4) | \ + PIN_MODE_INPUT(GPIOG_PIN5) | \ + PIN_MODE_INPUT(GPIOG_PIN6) | \ + PIN_MODE_INPUT(GPIOG_PIN7) | \ + PIN_MODE_INPUT(GPIOG_PIN8) | \ + PIN_MODE_INPUT(GPIOG_PIN9) | \ + PIN_MODE_INPUT(GPIOG_PIN10) | \ + PIN_MODE_INPUT(GPIOG_PIN11) | \ + PIN_MODE_INPUT(GPIOG_PIN12) | \ + PIN_MODE_INPUT(GPIOG_PIN13) | \ + PIN_MODE_INPUT(GPIOG_PIN14) | \ + PIN_MODE_INPUT(GPIOG_PIN15)) +#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) +#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_100M(GPIOG_PIN0) | \ + PIN_OSPEED_100M(GPIOG_PIN1) | \ + PIN_OSPEED_100M(GPIOG_PIN2) | \ + PIN_OSPEED_100M(GPIOG_PIN3) | \ + PIN_OSPEED_100M(GPIOG_PIN4) | \ + PIN_OSPEED_100M(GPIOG_PIN5) | \ + PIN_OSPEED_100M(GPIOG_PIN6) | \ + PIN_OSPEED_100M(GPIOG_PIN7) | \ + PIN_OSPEED_100M(GPIOG_PIN8) | \ + PIN_OSPEED_100M(GPIOG_PIN9) | \ + PIN_OSPEED_100M(GPIOG_PIN10) | \ + PIN_OSPEED_100M(GPIOG_PIN11) | \ + PIN_OSPEED_100M(GPIOG_PIN12) | \ + PIN_OSPEED_100M(GPIOG_PIN13) | \ + PIN_OSPEED_100M(GPIOG_PIN14) | \ + PIN_OSPEED_100M(GPIOG_PIN15)) +#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN15)) +#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ + PIN_ODR_HIGH(GPIOG_PIN1) | \ + PIN_ODR_HIGH(GPIOG_PIN2) | \ + PIN_ODR_HIGH(GPIOG_PIN3) | \ + PIN_ODR_HIGH(GPIOG_PIN4) | \ + PIN_ODR_HIGH(GPIOG_PIN5) | \ + PIN_ODR_HIGH(GPIOG_PIN6) | \ + PIN_ODR_HIGH(GPIOG_PIN7) | \ + PIN_ODR_HIGH(GPIOG_PIN8) | \ + PIN_ODR_HIGH(GPIOG_PIN9) | \ + PIN_ODR_HIGH(GPIOG_PIN10) | \ + PIN_ODR_HIGH(GPIOG_PIN11) | \ + PIN_ODR_HIGH(GPIOG_PIN12) | \ + PIN_ODR_HIGH(GPIOG_PIN13) | \ + PIN_ODR_HIGH(GPIOG_PIN14) | \ + PIN_ODR_HIGH(GPIOG_PIN15)) +#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ + PIN_AFIO_AF(GPIOG_PIN1, 0) | \ + PIN_AFIO_AF(GPIOG_PIN2, 0) | \ + PIN_AFIO_AF(GPIOG_PIN3, 0) | \ + PIN_AFIO_AF(GPIOG_PIN4, 0) | \ + PIN_AFIO_AF(GPIOG_PIN5, 0) | \ + PIN_AFIO_AF(GPIOG_PIN6, 0) | \ + PIN_AFIO_AF(GPIOG_PIN7, 0)) +#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ + PIN_AFIO_AF(GPIOG_PIN9, 0) | \ + PIN_AFIO_AF(GPIOG_PIN10, 0) | \ + PIN_AFIO_AF(GPIOG_PIN11, 0) | \ + PIN_AFIO_AF(GPIOG_PIN12, 0) | \ + PIN_AFIO_AF(GPIOG_PIN13, 0) | \ + PIN_AFIO_AF(GPIOG_PIN14, 0) | \ + PIN_AFIO_AF(GPIOG_PIN15, 0)) + +/* + * GPIOH setup: + * + * PH0 - OSC_IN (input floating). + * PH1 - OSC_OUT (input floating). + * PH2 - PIN2 (input floating). + * PH3 - PIN3 (input floating). + * PH4 - PIN4 (input floating). + * PH5 - PIN5 (input floating). + * PH6 - PIN6 (input floating). + * PH7 - PIN7 (input floating). + * PH8 - PIN8 (input floating). + * PH9 - PIN9 (input floating). + * PH10 - PIN10 (input floating). + * PH11 - PIN11 (input floating). + * PH12 - PIN12 (input floating). + * PH13 - PIN13 (input floating). + * PH14 - PIN14 (input floating). + * PH15 - PIN15 (input floating). + */ +#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ + PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ + PIN_MODE_INPUT(GPIOH_PIN2) | \ + PIN_MODE_INPUT(GPIOH_PIN3) | \ + PIN_MODE_INPUT(GPIOH_PIN4) | \ + PIN_MODE_INPUT(GPIOH_PIN5) | \ + PIN_MODE_INPUT(GPIOH_PIN6) | \ + PIN_MODE_INPUT(GPIOH_PIN7) | \ + PIN_MODE_INPUT(GPIOH_PIN8) | \ + PIN_MODE_INPUT(GPIOH_PIN9) | \ + PIN_MODE_INPUT(GPIOH_PIN10) | \ + PIN_MODE_INPUT(GPIOH_PIN11) | \ + PIN_MODE_INPUT(GPIOH_PIN12) | \ + PIN_MODE_INPUT(GPIOH_PIN13) | \ + PIN_MODE_INPUT(GPIOH_PIN14) | \ + PIN_MODE_INPUT(GPIOH_PIN15)) +#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ + PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) +#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \ + PIN_OSPEED_100M(GPIOH_OSC_OUT) | \ + PIN_OSPEED_100M(GPIOH_PIN2) | \ + PIN_OSPEED_100M(GPIOH_PIN3) | \ + PIN_OSPEED_100M(GPIOH_PIN4) | \ + PIN_OSPEED_100M(GPIOH_PIN5) | \ + PIN_OSPEED_100M(GPIOH_PIN6) | \ + PIN_OSPEED_100M(GPIOH_PIN7) | \ + PIN_OSPEED_100M(GPIOH_PIN8) | \ + PIN_OSPEED_100M(GPIOH_PIN9) | \ + PIN_OSPEED_100M(GPIOH_PIN10) | \ + PIN_OSPEED_100M(GPIOH_PIN11) | \ + PIN_OSPEED_100M(GPIOH_PIN12) | \ + PIN_OSPEED_100M(GPIOH_PIN13) | \ + PIN_OSPEED_100M(GPIOH_PIN14) | \ + PIN_OSPEED_100M(GPIOH_PIN15)) +#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ + PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN15)) +#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ + PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ + PIN_ODR_HIGH(GPIOH_PIN2) | \ + PIN_ODR_HIGH(GPIOH_PIN3) | \ + PIN_ODR_HIGH(GPIOH_PIN4) | \ + PIN_ODR_HIGH(GPIOH_PIN5) | \ + PIN_ODR_HIGH(GPIOH_PIN6) | \ + PIN_ODR_HIGH(GPIOH_PIN7) | \ + PIN_ODR_HIGH(GPIOH_PIN8) | \ + PIN_ODR_HIGH(GPIOH_PIN9) | \ + PIN_ODR_HIGH(GPIOH_PIN10) | \ + PIN_ODR_HIGH(GPIOH_PIN11) | \ + PIN_ODR_HIGH(GPIOH_PIN12) | \ + PIN_ODR_HIGH(GPIOH_PIN13) | \ + PIN_ODR_HIGH(GPIOH_PIN14) | \ + PIN_ODR_HIGH(GPIOH_PIN15)) +#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \ + PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \ + PIN_AFIO_AF(GPIOH_PIN2, 0) | \ + PIN_AFIO_AF(GPIOH_PIN3, 0) | \ + PIN_AFIO_AF(GPIOH_PIN4, 0) | \ + PIN_AFIO_AF(GPIOH_PIN5, 0) | \ + PIN_AFIO_AF(GPIOH_PIN6, 0) | \ + PIN_AFIO_AF(GPIOH_PIN7, 0)) +#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ + PIN_AFIO_AF(GPIOH_PIN9, 0) | \ + PIN_AFIO_AF(GPIOH_PIN10, 0) | \ + PIN_AFIO_AF(GPIOH_PIN11, 0) | \ + PIN_AFIO_AF(GPIOH_PIN12, 0) | \ + PIN_AFIO_AF(GPIOH_PIN13, 0) | \ + PIN_AFIO_AF(GPIOH_PIN14, 0) | \ + PIN_AFIO_AF(GPIOH_PIN15, 0)) + +/* + * GPIOI setup: + * + * PI0 - PIN0 (input floating). + * PI1 - PIN1 (input floating). + * PI2 - PIN2 (input floating). + * PI3 - PIN3 (input floating). + * PI4 - PIN4 (input floating). + * PI5 - PIN5 (input floating). + * PI6 - PIN6 (input floating). + * PI7 - PIN7 (input floating). + * PI8 - PIN8 (input floating). + * PI9 - PIN9 (input floating). + * PI10 - PIN10 (input floating). + * PI11 - PIN11 (input floating). + * PI12 - PIN12 (input floating). + * PI13 - PIN13 (input floating). + * PI14 - PIN14 (input floating). + * PI15 - PIN15 (input floating). + */ +#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ + PIN_MODE_INPUT(GPIOI_PIN1) | \ + PIN_MODE_INPUT(GPIOI_PIN2) | \ + PIN_MODE_INPUT(GPIOI_PIN3) | \ + PIN_MODE_INPUT(GPIOI_PIN4) | \ + PIN_MODE_INPUT(GPIOI_PIN5) | \ + PIN_MODE_INPUT(GPIOI_PIN6) | \ + PIN_MODE_INPUT(GPIOI_PIN7) | \ + PIN_MODE_INPUT(GPIOI_PIN8) | \ + PIN_MODE_INPUT(GPIOI_PIN9) | \ + PIN_MODE_INPUT(GPIOI_PIN10) | \ + PIN_MODE_INPUT(GPIOI_PIN11) | \ + PIN_MODE_INPUT(GPIOI_PIN12) | \ + PIN_MODE_INPUT(GPIOI_PIN13) | \ + PIN_MODE_INPUT(GPIOI_PIN14) | \ + PIN_MODE_INPUT(GPIOI_PIN15)) +#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) +#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_100M(GPIOI_PIN0) | \ + PIN_OSPEED_100M(GPIOI_PIN1) | \ + PIN_OSPEED_100M(GPIOI_PIN2) | \ + PIN_OSPEED_100M(GPIOI_PIN3) | \ + PIN_OSPEED_100M(GPIOI_PIN4) | \ + PIN_OSPEED_100M(GPIOI_PIN5) | \ + PIN_OSPEED_100M(GPIOI_PIN6) | \ + PIN_OSPEED_100M(GPIOI_PIN7) | \ + PIN_OSPEED_100M(GPIOI_PIN8) | \ + PIN_OSPEED_100M(GPIOI_PIN9) | \ + PIN_OSPEED_100M(GPIOI_PIN10) | \ + PIN_OSPEED_100M(GPIOI_PIN11) | \ + PIN_OSPEED_100M(GPIOI_PIN12) | \ + PIN_OSPEED_100M(GPIOI_PIN13) | \ + PIN_OSPEED_100M(GPIOI_PIN14) | \ + PIN_OSPEED_100M(GPIOI_PIN15)) +#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN15)) +#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ + PIN_ODR_HIGH(GPIOI_PIN1) | \ + PIN_ODR_HIGH(GPIOI_PIN2) | \ + PIN_ODR_HIGH(GPIOI_PIN3) | \ + PIN_ODR_HIGH(GPIOI_PIN4) | \ + PIN_ODR_HIGH(GPIOI_PIN5) | \ + PIN_ODR_HIGH(GPIOI_PIN6) | \ + PIN_ODR_HIGH(GPIOI_PIN7) | \ + PIN_ODR_HIGH(GPIOI_PIN8) | \ + PIN_ODR_HIGH(GPIOI_PIN9) | \ + PIN_ODR_HIGH(GPIOI_PIN10) | \ + PIN_ODR_HIGH(GPIOI_PIN11) | \ + PIN_ODR_HIGH(GPIOI_PIN12) | \ + PIN_ODR_HIGH(GPIOI_PIN13) | \ + PIN_ODR_HIGH(GPIOI_PIN14) | \ + PIN_ODR_HIGH(GPIOI_PIN15)) +#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0) | \ + PIN_AFIO_AF(GPIOI_PIN1, 0) | \ + PIN_AFIO_AF(GPIOI_PIN2, 0) | \ + PIN_AFIO_AF(GPIOI_PIN3, 0) | \ + PIN_AFIO_AF(GPIOI_PIN4, 0) | \ + PIN_AFIO_AF(GPIOI_PIN5, 0) | \ + PIN_AFIO_AF(GPIOI_PIN6, 0) | \ + PIN_AFIO_AF(GPIOI_PIN7, 0)) +#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0) | \ + PIN_AFIO_AF(GPIOI_PIN9, 0) | \ + PIN_AFIO_AF(GPIOI_PIN10, 0) | \ + PIN_AFIO_AF(GPIOI_PIN11, 0) | \ + PIN_AFIO_AF(GPIOI_PIN12, 0) | \ + PIN_AFIO_AF(GPIOI_PIN13, 0) | \ + PIN_AFIO_AF(GPIOI_PIN14, 0) | \ + PIN_AFIO_AF(GPIOI_PIN15, 0)) + + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.mk b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.mk new file mode 100644 index 00000000..d6a45638 --- /dev/null +++ b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board.mk @@ -0,0 +1,7 @@ +# Required include directories +BOARDINC = $(GFXLIB)/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board + +# List of all the board related files. +BOARDSRC = $(BOARDINC)/board.c \ + $(BOARDINC)/flash_memory.c + diff --git a/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board_orig.h b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board_orig.h new file mode 100644 index 00000000..e4d2c31f --- /dev/null +++ b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/board_orig.h @@ -0,0 +1,1303 @@ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for Mikroe mikromedia STM32-M4. + */ + +/* + * Board identifier. + */ +#define BOARD_MIKROMEDIA_STM32_M4 +#define BOARD_NAME "mikromedia STM32-M4" + + +/* + * Board oscillators-related settings. + * NOTE: LSE not fitted. + */ +#if !defined(STM32_LSECLK) +#define STM32_LSECLK 32768 +#endif + +#if !defined(STM32_HSECLK) +#define STM32_HSECLK 16000000 +#endif + + +/* + * Board voltages. + * Required for performance limits calculation. + */ +#define STM32_VDD 330 + +/* + * MCU type as defined in the ST header file stm32f4xx.h. + */ +#define STM32F4XX + +/* + * IO pins assignments. + */ +#define GPIOA_VSENSE 0 +#define GPIOA_PIN1 1 +#define GPIOA_PIN2 2 +#define GPIOA_PIN3 3 +#define GPIOA_PIN4 4 +#define GPIOA_PIN5 5 +#define GPIOA_PIN6 6 +#define GPIOA_PIN7 7 +#define GPIOA_PIN8 8 +#define GPIOA_VBUS_FS 9 +#define GPIOA_PIN10 10 +#define GPIOA_OTG_FS_DM 11 +#define GPIOA_OTG_FS_DP 12 +#define GPIOA_TMS 13 +#define GPIOA_TCK 14 +#define GPIOA_TDI 15 + +#define GPIOB_LCD_YD 0 +#define GPIOB_LCD_XL 1 +#define GPIOB_PIN2 2 +#define GPIOB_TDO 3 +#define GPIOB_TRST 4 +#define GPIOB_PIN5 5 +#define GPIOB_SCL1 6 +#define GPIOB_SDA1 7 +#define GPIOB_DRIVEA 8 +#define GPIOB_DRIVEB 9 +#define GPIOB_SCL2 10 +#define GPIOB_SDA2 11 +#define GPIOB_PIN12 12 +#define GPIOB_SCK2 13 +#define GPIOB_MISO2 14 +#define GPIOB_MOSI2 15 + +#define GPIOC_PIN0 0 +#define GPIOC_PIN1 1 +#define GPIOC_PIN2 2 +#define GPIOC_PIN3 3 +#define GPIOC_PIN4 4 +#define GPIOC_PIN5 5 +#define GPIOC_MP3_DREQ 6 +#define GPIOC_MP3_RST 7 +#define GPIOC_MP3_CS 8 +#define GPIOC_MP3_DCS 9 +#define GPIOC_SCL3 10 +#define GPIOC_MISO3 11 +#define GPIOC_MOSI3 12 +#define GPIOC_STAT 13 +#define GPIOC_OSC32_IN 14 +#define GPIOC_OSC32_OUT 15 + +#define GPIOD_PIN0 0 +#define GPIOD_PIN1 1 +#define GPIOD_PIN2 2 +#define GPIOD_SD_CS 3 +#define GPIOD_PIN4 4 +#define GPIOD_TX2 5 +#define GPIOD_RX2 6 +#define GPIOD_FLASH_CS 7 +#define GPIOD_PIN8 8 +#define GPIOD_PIN9 9 +#define GPIOD_PIN10 10 +#define GPIOD_PIN11 11 +#define GPIOD_PIN12 12 +#define GPIOD_PIN13 13 +#define GPIOD_PIN14 14 +#define GPIOD_SD_CD 15 + +// DONE TO HERE + +#define GPIOE_TD0 0 +#define GPIOE_TD1 1 +#define GPIOE_TD2 2 +#define GPIOE_TD3 3 +#define GPIOE_TD4 4 +#define GPIOE_TD5 5 +#define GPIOE_TD6 6 +#define GPIOE_TD7 7 +#define GPIOE_LCD_RST 8 +#define GPIOE_LCD_BLED 9 +#define GPIOE_PMRD 10 +#define GPIOE_PMWR 11 +#define GPIOE_LCD_RS 12 +#define GPIOE_PIN13 13 +#define GPIOE_PIN14 14 +#define GPIOE_LCD_CS 15 + +#define GPIOF_PIN0 0 +#define GPIOF_PIN1 1 +#define GPIOF_PIN2 2 +#define GPIOF_PIN3 3 +#define GPIOF_PIN4 4 +#define GPIOF_PIN5 5 +#define GPIOF_PIN6 6 +#define GPIOF_PIN7 7 +#define GPIOF_PIN8 8 +#define GPIOF_PIN9 9 +#define GPIOF_PIN10 10 +#define GPIOF_PIN11 11 +#define GPIOF_PIN12 12 +#define GPIOF_PIN13 13 +#define GPIOF_PIN14 14 +#define GPIOF_PIN15 15 + +#define GPIOG_PIN0 0 +#define GPIOG_PIN1 1 +#define GPIOG_PIN2 2 +#define GPIOG_PIN3 3 +#define GPIOG_PIN4 4 +#define GPIOG_PIN5 5 +#define GPIOG_PIN6 6 +#define GPIOG_PIN7 7 +#define GPIOG_PIN8 8 +#define GPIOG_PIN9 9 +#define GPIOG_PIN10 10 +#define GPIOG_PIN11 11 +#define GPIOG_PIN12 12 +#define GPIOG_PIN13 13 +#define GPIOG_PIN14 14 +#define GPIOG_PIN15 15 + +#define GPIOH_OSC_IN 0 +#define GPIOH_OSC_OUT 1 +#define GPIOH_PIN2 2 +#define GPIOH_PIN3 3 +#define GPIOH_PIN4 4 +#define GPIOH_PIN5 5 +#define GPIOH_PIN6 6 +#define GPIOH_PIN7 7 +#define GPIOH_PIN8 8 +#define GPIOH_PIN9 9 +#define GPIOH_PIN10 10 +#define GPIOH_PIN11 11 +#define GPIOH_PIN12 12 +#define GPIOH_PIN13 13 +#define GPIOH_PIN14 14 +#define GPIOH_PIN15 15 + +#define GPIOI_PIN0 0 +#define GPIOI_PIN1 1 +#define GPIOI_PIN2 2 +#define GPIOI_PIN3 3 +#define GPIOI_PIN4 4 +#define GPIOI_PIN5 5 +#define GPIOI_PIN6 6 +#define GPIOI_PIN7 7 +#define GPIOI_PIN8 8 +#define GPIOI_PIN9 9 +#define GPIOI_PIN10 10 +#define GPIOI_PIN11 11 +#define GPIOI_PIN12 12 +#define GPIOI_PIN13 13 +#define GPIOI_PIN14 14 +#define GPIOI_PIN15 15 + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the STM32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n) (0U << ((n) * 2)) +#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) +#define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) +#define PIN_ODR_LOW(n) (0U << (n)) +#define PIN_ODR_HIGH(n) (1U << (n)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_2M(n) (0U << ((n) * 2)) +#define PIN_OSPEED_25M(n) (1U << ((n) * 2)) +#define PIN_OSPEED_50M(n) (2U << ((n) * 2)) +#define PIN_OSPEED_100M(n) (3U << ((n) * 2)) +#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2)) +#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2)) +#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2)) +#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) + +/* + * GPIOA setup: + * + * PA0 - Battery Voltage Sense (Analog) + * PA0 - BUTTON (input floating). +#define GPIOA_VSENSE 0 +#define GPIOA_PIN1 1 +#define GPIOA_PIN2 2 +#define GPIOA_PIN3 3 +#define GPIOA_PIN4 4 +#define GPIOA_PIN5 5 +#define GPIOA_PIN6 6 +#define GPIOA_PIN7 7 +#define GPIOA_PIN8 8 +#define GPIOA_VBUS_FS 9 +#define GPIOA_PIN10 10 +#define GPIOA_OTG_FS_DM 11 +#define GPIOA_OTG_FS_DP 12 +#define GPIOA_TMS 13 +#define GPIOA_TCK 14 +#define GPIOA_TDI 15 + */ +#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(GPIOA_VSENSE) | \ + PIN_MODE_INPUT(GPIOA_PIN1) | \ + PIN_MODE_INPUT(GPIOA_PIN2) | \ + PIN_MODE_INPUT(GPIOA_PIN3) | \ + PIN_MODE_INPUT(GPIOA_PIN4) | \ + PIN_MODE_INPUT(GPIOA_PIN5) | \ + PIN_MODE_INPUT(GPIOA_PIN6) | \ + PIN_MODE_INPUT(GPIOA_PIN7) | \ + PIN_MODE_INPUT(GPIOA_PIN8) | \ + PIN_MODE_INPUT(GPIOA_VBUS_FS) | \ + PIN_MODE_INPUT(GPIOA_PIN10) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ + PIN_MODE_ALTERNATE(GPIOA_TMS) | \ + PIN_MODE_ALTERNATE(GPIOA_TCK) | \ + PIN_MODE_ALTERNATE(GPIOA_TDI)) +#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_VSENSE) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ + PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ + PIN_OTYPE_PUSHPULL(GPIOA_TMS) | \ + PIN_OTYPE_PUSHPULL(GPIOA_TCK) | \ + PIN_OTYPE_PUSHPULL(GPIOA_TDI)) +#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_VSENSE) | \ + PIN_OSPEED_100M(GPIOA_PIN1) | \ + PIN_OSPEED_100M(GPIOA_PIN2) | \ + PIN_OSPEED_100M(GPIOA_PIN3) | \ + PIN_OSPEED_100M(GPIOA_PIN4) | \ + PIN_OSPEED_100M(GPIOA_PIN5) | \ + PIN_OSPEED_100M(GPIOA_PIN6) | \ + PIN_OSPEED_100M(GPIOA_PIN7) | \ + PIN_OSPEED_100M(GPIOA_PIN8) | \ + PIN_OSPEED_100M(GPIOA_VBUS_FS) | \ + PIN_OSPEED_100M(GPIOA_PIN10) | \ + PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \ + PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \ + PIN_OSPEED_100M(GPIOA_TMS) | \ + PIN_OSPEED_100M(GPIOA_TCK) | \ + PIN_OSPEED_100M(GPIOA_TDI)) +#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_VSENSE) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ + PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ + PIN_PUPDR_FLOATING(GPIOA_TMS) | \ + PIN_PUPDR_FLOATING(GPIOA_TCK) | \ + PIN_PUPDR_FLOATING(GPIOA_TDI)) +#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_VSENSE) | \ + PIN_ODR_HIGH(GPIOA_PIN1) | \ + PIN_ODR_HIGH(GPIOA_PIN2) | \ + PIN_ODR_HIGH(GPIOA_PIN3) | \ + PIN_ODR_HIGH(GPIOA_PIN4) | \ + PIN_ODR_HIGH(GPIOA_PIN5) | \ + PIN_ODR_HIGH(GPIOA_PIN6) | \ + PIN_ODR_HIGH(GPIOA_PIN7) | \ + PIN_ODR_HIGH(GPIOA_PIN8) | \ + PIN_ODR_HIGH(GPIOA_VBUS_FS) | \ + PIN_ODR_HIGH(GPIOA_PIN10) | \ + PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ + PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ + PIN_ODR_HIGH(GPIOA_TMS) | \ + PIN_ODR_HIGH(GPIOA_TCK) | \ + PIN_ODR_HIGH(GPIOA_TDI)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_VSENSE, 0) | \ + PIN_AFIO_AF(GPIOA_PIN1, 0) | \ + PIN_AFIO_AF(GPIOA_PIN2, 0) | \ + PIN_AFIO_AF(GPIOA_PIN3, 0) | \ + PIN_AFIO_AF(GPIOA_PIN4, 0) | \ + PIN_AFIO_AF(GPIOA_PIN5, 0) | \ + PIN_AFIO_AF(GPIOA_PIN6, 0) | \ + PIN_AFIO_AF(GPIOA_PIN7, 0)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ + PIN_AFIO_AF(GPIOA_VBUS_FS, 0) | \ + PIN_AFIO_AF(GPIOA_PIN10, 0) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \ + PIN_AFIO_AF(GPIOA_TMS, 0) | \ + PIN_AFIO_AF(GPIOA_TCK, 0) | \ + PIN_AFIO_AF(GPIOA_TDI, 0)) +// DONE TO HERE +/* + * GPIOB setup: + * + * PB0 - PIN0 (input pullup). + * PB1 - PIN1 (input pullup). + * PB2 - PIN2 (input pullup). + * PB3 - SWO (alternate 0). + * PB4 - PIN4 (input pullup). + * PB5 - PIN5 (input pullup). + * PB6 - SCL (alternate 4). + * PB7 - PIN7 (input pullup). + * PB8 - PIN8 (input pullup). + * PB9 - SDA (alternate 4). + * PB10 - CLK_IN (input pullup). + * PB11 - PIN11 (input pullup). + * PB12 - PIN12 (input pullup). + * PB13 - PIN13 (input pullup). + * PB14 - PIN14 (input pullup). + * PB15 - PIN15 (input pullup). + +#define GPIOB_LCD_YD 0 +#define GPIOB_LCD_XL 1 + +#define GPIOB_TDO 3 +#define GPIOB_TRST 4 +#define GPIOB_PIN5 5 +#define GPIOB_SCL1 6 +#define GPIOB_SDA1 7 +#define GPIOB_DRIVEA 8 +#define GPIOB_DRIVEB 9 +#define GPIOB_SCL2 10 +#define GPIOB_SDA2 11 +#define GPIOB_PIN12 12 +#define GPIOB_SCK2 13 +#define GPIOB_MISO2 14 +#define GPIOB_MOSI2 15 + */ +#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_LCD_YD) | \ + PIN_MODE_INPUT(GPIOB_LCD_XL) | \ + PIN_MODE_INPUT(GPIOB_PIN2) | \ + PIN_MODE_ALTERNATE(GPIOB_TDO) | \ + PIN_MODE_ALTERNATE(GPIOB_TRST) | \ + PIN_MODE_INPUT(GPIOB_PIN5) | \ + PIN_MODE_ALTERNATE(GPIOB_SCL1) | \ + PIN_MODE_ALTERNATE(GPIOB_SDA1) | \ + PIN_MODE_INPUT(GPIOB_DRIVEA) | \ + PIN_MODE_INPUT(GPIOB_DRIVEB) | \ + PIN_MODE_ALTERNATE(GPIOB_SCL2) | \ + PIN_MODE_ALTERNATE(GPIOB_SDA2) | \ + PIN_MODE_INPUT(GPIOB_PIN12) | \ + PIN_MODE_ALTERNATE(GPIOB_SCK2) | \ + PIN_MODE_ALTERNATE(GPIOB_MISO2) | \ + PIN_MODE_ALTERNATE(GPIOB_MOSI2)) +#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_LCD_YD) | \ + PIN_OTYPE_PUSHPULL(GPIOB_LCD_XL) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_TDO) | \ + PIN_OTYPE_PUSHPULL(GPIOB_TRST) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_SCL1) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_SDA1) | \ + PIN_OTYPE_PUSHPULL(GPIOB_DRIVEA) | \ + PIN_OTYPE_PUSHPULL(GPIOB_DRIVEB) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_SCL2) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_SDA2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOB_SCK2 ) | \ + PIN_OTYPE_PUSHPULL(GPIOB_MISO2) | \ + PIN_OTYPE_PUSHPULL(GPIOB_MOSI2)) +#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_PIN0) | \ + PIN_OSPEED_100M(GPIOB_PIN1) | \ + PIN_OSPEED_100M(GPIOB_PIN2) | \ + PIN_OSPEED_100M(GPIOB_SWO) | \ + PIN_OSPEED_100M(GPIOB_PIN4) | \ + PIN_OSPEED_100M(GPIOB_PIN5) | \ + PIN_OSPEED_100M(GPIOB_SCL) | \ + PIN_OSPEED_100M(GPIOB_PIN7) | \ + PIN_OSPEED_100M(GPIOB_PIN8) | \ + PIN_OSPEED_100M(GPIOB_SDA) | \ + PIN_OSPEED_100M(GPIOB_CLK_IN) | \ + PIN_OSPEED_100M(GPIOB_PIN11) | \ + PIN_OSPEED_100M(GPIOB_PIN12) | \ + PIN_OSPEED_100M(GPIOB_PIN13) | \ + PIN_OSPEED_100M(GPIOB_PIN14) | \ + PIN_OSPEED_100M(GPIOB_PIN15)) +#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOB_SWO) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOB_SCL) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOB_SDA) | \ + PIN_PUPDR_PULLUP(GPIOB_CLK_IN) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN15)) +#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ + PIN_ODR_HIGH(GPIOB_PIN1) | \ + PIN_ODR_HIGH(GPIOB_PIN2) | \ + PIN_ODR_HIGH(GPIOB_SWO) | \ + PIN_ODR_HIGH(GPIOB_PIN4) | \ + PIN_ODR_HIGH(GPIOB_PIN5) | \ + PIN_ODR_HIGH(GPIOB_SCL) | \ + PIN_ODR_HIGH(GPIOB_PIN7) | \ + PIN_ODR_HIGH(GPIOB_PIN8) | \ + PIN_ODR_HIGH(GPIOB_SDA) | \ + PIN_ODR_HIGH(GPIOB_CLK_IN) | \ + PIN_ODR_HIGH(GPIOB_PIN11) | \ + PIN_ODR_HIGH(GPIOB_PIN12) | \ + PIN_ODR_HIGH(GPIOB_PIN13) | \ + PIN_ODR_HIGH(GPIOB_PIN14) | \ + PIN_ODR_HIGH(GPIOB_PIN15)) +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \ + PIN_AFIO_AF(GPIOB_PIN1, 0) | \ + PIN_AFIO_AF(GPIOB_PIN2, 0) | \ + PIN_AFIO_AF(GPIOB_SWO, 0) | \ + PIN_AFIO_AF(GPIOB_PIN4, 0) | \ + PIN_AFIO_AF(GPIOB_PIN5, 0) | \ + PIN_AFIO_AF(GPIOB_SCL, 4) | \ + PIN_AFIO_AF(GPIOB_PIN7, 0)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ + PIN_AFIO_AF(GPIOB_SDA, 4) | \ + PIN_AFIO_AF(GPIOB_CLK_IN, 0) | \ + PIN_AFIO_AF(GPIOB_PIN11, 0) | \ + PIN_AFIO_AF(GPIOB_PIN12, 0) | \ + PIN_AFIO_AF(GPIOB_PIN13, 0) | \ + PIN_AFIO_AF(GPIOB_PIN14, 0) | \ + PIN_AFIO_AF(GPIOB_PIN15, 0)) + +/* + * GPIOC setup: + * + * PC0 - OTG_FS_POWER_ON (output pushpull maximum). + * PC1 - PIN1 (input pullup). + * PC2 - PIN2 (input pullup). + * PC3 - PDM_OUT (input pullup). + * PC4 - PIN4 (input pullup). + * PC5 - PIN5 (input pullup). + * PC6 - PIN6 (input pullup). + * PC7 - MCLK (alternate 6). + * PC8 - PIN8 (input pullup). + * PC9 - PIN9 (input pullup). + * PC10 - SCLK (alternate 6). + * PC11 - PIN11 (input pullup). + * PC12 - SDIN (alternate 6). + * PC13 - PIN13 (input pullup). + * PC14 - PIN14 (input pullup). + * PC15 - PIN15 (input pullup). + */ +#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\ + PIN_MODE_INPUT(GPIOC_PIN1) | \ + PIN_MODE_INPUT(GPIOC_PIN2) | \ + PIN_MODE_INPUT(GPIOC_PDM_OUT) | \ + PIN_MODE_INPUT(GPIOC_PIN4) | \ + PIN_MODE_INPUT(GPIOC_PIN5) | \ + PIN_MODE_INPUT(GPIOC_PIN6) | \ + PIN_MODE_ALTERNATE(GPIOC_MCLK) | \ + PIN_MODE_INPUT(GPIOC_PIN8) | \ + PIN_MODE_INPUT(GPIOC_PIN9) | \ + PIN_MODE_ALTERNATE(GPIOC_SCLK) | \ + PIN_MODE_INPUT(GPIOC_PIN11) | \ + PIN_MODE_ALTERNATE(GPIOC_SDIN) | \ + PIN_MODE_INPUT(GPIOC_PIN13) | \ + PIN_MODE_INPUT(GPIOC_PIN14) | \ + PIN_MODE_INPUT(GPIOC_PIN15)) +#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) |\ + PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PDM_OUT) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOC_MCLK) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SCLK) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SDIN) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) +#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_OTG_FS_POWER_ON) |\ + PIN_OSPEED_100M(GPIOC_PIN1) | \ + PIN_OSPEED_100M(GPIOC_PIN2) | \ + PIN_OSPEED_100M(GPIOC_PDM_OUT) | \ + PIN_OSPEED_100M(GPIOC_PIN4) | \ + PIN_OSPEED_100M(GPIOC_PIN5) | \ + PIN_OSPEED_100M(GPIOC_PIN6) | \ + PIN_OSPEED_100M(GPIOC_MCLK) | \ + PIN_OSPEED_100M(GPIOC_PIN8) | \ + PIN_OSPEED_100M(GPIOC_PIN9) | \ + PIN_OSPEED_100M(GPIOC_SCLK) | \ + PIN_OSPEED_100M(GPIOC_PIN11) | \ + PIN_OSPEED_100M(GPIOC_SDIN) | \ + PIN_OSPEED_100M(GPIOC_PIN13) | \ + PIN_OSPEED_100M(GPIOC_PIN14) | \ + PIN_OSPEED_100M(GPIOC_PIN15)) +#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\ + PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOC_PDM_OUT) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOC_MCLK) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOC_SCLK) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOC_SDIN) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOC_PIN15)) +#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | \ + PIN_ODR_HIGH(GPIOC_PIN1) | \ + PIN_ODR_HIGH(GPIOC_PIN2) | \ + PIN_ODR_HIGH(GPIOC_PDM_OUT) | \ + PIN_ODR_HIGH(GPIOC_PIN4) | \ + PIN_ODR_HIGH(GPIOC_PIN5) | \ + PIN_ODR_HIGH(GPIOC_PIN6) | \ + PIN_ODR_HIGH(GPIOC_MCLK) | \ + PIN_ODR_HIGH(GPIOC_PIN8) | \ + PIN_ODR_HIGH(GPIOC_PIN9) | \ + PIN_ODR_HIGH(GPIOC_SCLK) | \ + PIN_ODR_HIGH(GPIOC_PIN11) | \ + PIN_ODR_HIGH(GPIOC_SDIN) | \ + PIN_ODR_HIGH(GPIOC_PIN13) | \ + PIN_ODR_HIGH(GPIOC_PIN14) | \ + PIN_ODR_HIGH(GPIOC_PIN15)) +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0) |\ + PIN_AFIO_AF(GPIOC_PIN1, 0) | \ + PIN_AFIO_AF(GPIOC_PIN2, 0) | \ + PIN_AFIO_AF(GPIOC_PDM_OUT, 0) | \ + PIN_AFIO_AF(GPIOC_PIN4, 0) | \ + PIN_AFIO_AF(GPIOC_PIN5, 0) | \ + PIN_AFIO_AF(GPIOC_PIN6, 0) | \ + PIN_AFIO_AF(GPIOC_MCLK, 6)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \ + PIN_AFIO_AF(GPIOC_PIN9, 0) | \ + PIN_AFIO_AF(GPIOC_SCLK, 6) | \ + PIN_AFIO_AF(GPIOC_PIN11, 0) | \ + PIN_AFIO_AF(GPIOC_SDIN, 6) | \ + PIN_AFIO_AF(GPIOC_PIN13, 0) | \ + PIN_AFIO_AF(GPIOC_PIN14, 0) | \ + PIN_AFIO_AF(GPIOC_PIN15, 0)) + +/* + * GPIOD setup: + * + * PD0 - PIN0 (input pullup). + * PD1 - PIN1 (input pullup). + * PD2 - PIN2 (input pullup). + * PD3 - PIN3 (input pullup). + * PD4 - RESET (output pushpull maximum). + * PD5 - OVER_CURRENT (input floating). + * PD6 - PIN6 (input pullup). + * PD7 - PIN7 (input pullup). + * PD8 - PIN8 (input pullup). + * PD9 - PIN9 (input pullup). + * PD10 - PIN10 (input pullup). + * PD11 - PIN11 (input pullup). + * PD12 - LED4 (output pushpull maximum). + * PD13 - LED3 (output pushpull maximum). + * PD14 - LED5 (output pushpull maximum). + * PD15 - LED6 (output pushpull maximum). + */ +#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ + PIN_MODE_INPUT(GPIOD_PIN1) | \ + PIN_MODE_INPUT(GPIOD_PIN2) | \ + PIN_MODE_INPUT(GPIOD_PIN3) | \ + PIN_MODE_OUTPUT(GPIOD_RESET) | \ + PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \ + PIN_MODE_INPUT(GPIOD_PIN6) | \ + PIN_MODE_INPUT(GPIOD_PIN7) | \ + PIN_MODE_INPUT(GPIOD_PIN8) | \ + PIN_MODE_INPUT(GPIOD_PIN9) | \ + PIN_MODE_INPUT(GPIOD_PIN10) | \ + PIN_MODE_INPUT(GPIOD_PIN11) | \ + PIN_MODE_OUTPUT(GPIOD_LED4) | \ + PIN_MODE_OUTPUT(GPIOD_LED3) | \ + PIN_MODE_OUTPUT(GPIOD_LED5) | \ + PIN_MODE_OUTPUT(GPIOD_LED6)) +#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOD_RESET) | \ + PIN_OTYPE_PUSHPULL(GPIOD_OVER_CURRENT) |\ + PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOD_LED4) | \ + PIN_OTYPE_PUSHPULL(GPIOD_LED3) | \ + PIN_OTYPE_PUSHPULL(GPIOD_LED5) | \ + PIN_OTYPE_PUSHPULL(GPIOD_LED6)) +#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_PIN0) | \ + PIN_OSPEED_100M(GPIOD_PIN1) | \ + PIN_OSPEED_100M(GPIOD_PIN2) | \ + PIN_OSPEED_100M(GPIOD_PIN3) | \ + PIN_OSPEED_100M(GPIOD_RESET) | \ + PIN_OSPEED_100M(GPIOD_OVER_CURRENT) | \ + PIN_OSPEED_100M(GPIOD_PIN6) | \ + PIN_OSPEED_100M(GPIOD_PIN7) | \ + PIN_OSPEED_100M(GPIOD_PIN8) | \ + PIN_OSPEED_100M(GPIOD_PIN9) | \ + PIN_OSPEED_100M(GPIOD_PIN10) | \ + PIN_OSPEED_100M(GPIOD_PIN11) | \ + PIN_OSPEED_100M(GPIOD_LED4) | \ + PIN_OSPEED_100M(GPIOD_LED3) | \ + PIN_OSPEED_100M(GPIOD_LED5) | \ + PIN_OSPEED_100M(GPIOD_LED6)) +#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOD_RESET) | \ + PIN_PUPDR_FLOATING(GPIOD_OVER_CURRENT) |\ + PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOD_LED4) | \ + PIN_PUPDR_FLOATING(GPIOD_LED3) | \ + PIN_PUPDR_FLOATING(GPIOD_LED5) | \ + PIN_PUPDR_FLOATING(GPIOD_LED6)) +#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ + PIN_ODR_HIGH(GPIOD_PIN1) | \ + PIN_ODR_HIGH(GPIOD_PIN2) | \ + PIN_ODR_HIGH(GPIOD_PIN3) | \ + PIN_ODR_HIGH(GPIOD_RESET) | \ + PIN_ODR_HIGH(GPIOD_OVER_CURRENT) | \ + PIN_ODR_HIGH(GPIOD_PIN6) | \ + PIN_ODR_HIGH(GPIOD_PIN7) | \ + PIN_ODR_HIGH(GPIOD_PIN8) | \ + PIN_ODR_HIGH(GPIOD_PIN9) | \ + PIN_ODR_HIGH(GPIOD_PIN10) | \ + PIN_ODR_HIGH(GPIOD_PIN11) | \ + PIN_ODR_LOW(GPIOD_LED4) | \ + PIN_ODR_LOW(GPIOD_LED3) | \ + PIN_ODR_LOW(GPIOD_LED5) | \ + PIN_ODR_LOW(GPIOD_LED6)) +#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \ + PIN_AFIO_AF(GPIOD_PIN1, 0) | \ + PIN_AFIO_AF(GPIOD_PIN2, 0) | \ + PIN_AFIO_AF(GPIOD_PIN3, 0) | \ + PIN_AFIO_AF(GPIOD_RESET, 0) | \ + PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0) | \ + PIN_AFIO_AF(GPIOD_PIN6, 0) | \ + PIN_AFIO_AF(GPIOD_PIN7, 0)) +#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ + PIN_AFIO_AF(GPIOD_PIN9, 0) | \ + PIN_AFIO_AF(GPIOD_PIN10, 0) | \ + PIN_AFIO_AF(GPIOD_PIN11, 0) | \ + PIN_AFIO_AF(GPIOD_LED4, 0) | \ + PIN_AFIO_AF(GPIOD_LED3, 0) | \ + PIN_AFIO_AF(GPIOD_LED5, 0) | \ + PIN_AFIO_AF(GPIOD_LED6, 0)) + +/* + * GPIOE setup: + * + * PE0 - INT1 (input floating). + * PE1 - INT2 (input floating). + * PE2 - PIN2 (input floating). + * PE3 - CS_SPI (output pushpull maximum). + * PE4 - PIN4 (input floating). + * PE5 - PIN5 (input floating). + * PE6 - PIN6 (input floating). + * PE7 - PIN7 (input floating). + * PE8 - PIN8 (input floating). + * PE9 - PIN9 (input floating). + * PE10 - PIN10 (input floating). + * PE11 - PIN11 (input floating). + * PE12 - PIN12 (input floating). + * PE13 - PIN13 (input floating). + * PE14 - PIN14 (input floating). + * PE15 - PIN15 (input floating). + */ +#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \ + PIN_MODE_INPUT(GPIOE_INT2) | \ + PIN_MODE_INPUT(GPIOE_PIN2) | \ + PIN_MODE_OUTPUT(GPIOE_CS_SPI) | \ + PIN_MODE_INPUT(GPIOE_PIN4) | \ + PIN_MODE_INPUT(GPIOE_PIN5) | \ + PIN_MODE_INPUT(GPIOE_PIN6) | \ + PIN_MODE_INPUT(GPIOE_PIN7) | \ + PIN_MODE_INPUT(GPIOE_PIN8) | \ + PIN_MODE_INPUT(GPIOE_PIN9) | \ + PIN_MODE_INPUT(GPIOE_PIN10) | \ + PIN_MODE_INPUT(GPIOE_PIN11) | \ + PIN_MODE_INPUT(GPIOE_PIN12) | \ + PIN_MODE_INPUT(GPIOE_PIN13) | \ + PIN_MODE_INPUT(GPIOE_PIN14) | \ + PIN_MODE_INPUT(GPIOE_PIN15)) +#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_INT1) | \ + PIN_OTYPE_PUSHPULL(GPIOE_INT2) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOE_CS_SPI) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) +#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_INT1) | \ + PIN_OSPEED_100M(GPIOE_INT2) | \ + PIN_OSPEED_100M(GPIOE_PIN2) | \ + PIN_OSPEED_100M(GPIOE_CS_SPI) | \ + PIN_OSPEED_100M(GPIOE_PIN4) | \ + PIN_OSPEED_100M(GPIOE_PIN5) | \ + PIN_OSPEED_100M(GPIOE_PIN6) | \ + PIN_OSPEED_100M(GPIOE_PIN7) | \ + PIN_OSPEED_100M(GPIOE_PIN8) | \ + PIN_OSPEED_100M(GPIOE_PIN9) | \ + PIN_OSPEED_100M(GPIOE_PIN10) | \ + PIN_OSPEED_100M(GPIOE_PIN11) | \ + PIN_OSPEED_100M(GPIOE_PIN12) | \ + PIN_OSPEED_100M(GPIOE_PIN13) | \ + PIN_OSPEED_100M(GPIOE_PIN14) | \ + PIN_OSPEED_100M(GPIOE_PIN15)) +#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_INT1) | \ + PIN_PUPDR_FLOATING(GPIOE_INT2) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOE_CS_SPI) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOE_PIN15)) +#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_INT1) | \ + PIN_ODR_HIGH(GPIOE_INT2) | \ + PIN_ODR_HIGH(GPIOE_PIN2) | \ + PIN_ODR_HIGH(GPIOE_CS_SPI) | \ + PIN_ODR_HIGH(GPIOE_PIN4) | \ + PIN_ODR_HIGH(GPIOE_PIN5) | \ + PIN_ODR_HIGH(GPIOE_PIN6) | \ + PIN_ODR_HIGH(GPIOE_PIN7) | \ + PIN_ODR_HIGH(GPIOE_PIN8) | \ + PIN_ODR_HIGH(GPIOE_PIN9) | \ + PIN_ODR_HIGH(GPIOE_PIN10) | \ + PIN_ODR_HIGH(GPIOE_PIN11) | \ + PIN_ODR_HIGH(GPIOE_PIN12) | \ + PIN_ODR_HIGH(GPIOE_PIN13) | \ + PIN_ODR_HIGH(GPIOE_PIN14) | \ + PIN_ODR_HIGH(GPIOE_PIN15)) +#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_INT1, 0) | \ + PIN_AFIO_AF(GPIOE_INT2, 0) | \ + PIN_AFIO_AF(GPIOE_PIN2, 0) | \ + PIN_AFIO_AF(GPIOE_CS_SPI, 0) | \ + PIN_AFIO_AF(GPIOE_PIN4, 0) | \ + PIN_AFIO_AF(GPIOE_PIN5, 0) | \ + PIN_AFIO_AF(GPIOE_PIN6, 0) | \ + PIN_AFIO_AF(GPIOE_PIN7, 0)) +#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \ + PIN_AFIO_AF(GPIOE_PIN9, 0) | \ + PIN_AFIO_AF(GPIOE_PIN10, 0) | \ + PIN_AFIO_AF(GPIOE_PIN11, 0) | \ + PIN_AFIO_AF(GPIOE_PIN12, 0) | \ + PIN_AFIO_AF(GPIOE_PIN13, 0) | \ + PIN_AFIO_AF(GPIOE_PIN14, 0) | \ + PIN_AFIO_AF(GPIOE_PIN15, 0)) + +/* + * GPIOF setup: + * + * PF0 - PIN0 (input floating). + * PF1 - PIN1 (input floating). + * PF2 - PIN2 (input floating). + * PF3 - PIN3 (input floating). + * PF4 - PIN4 (input floating). + * PF5 - PIN5 (input floating). + * PF6 - PIN6 (input floating). + * PF7 - PIN7 (input floating). + * PF8 - PIN8 (input floating). + * PF9 - PIN9 (input floating). + * PF10 - PIN10 (input floating). + * PF11 - PIN11 (input floating). + * PF12 - PIN12 (input floating). + * PF13 - PIN13 (input floating). + * PF14 - PIN14 (input floating). + * PF15 - PIN15 (input floating). + */ +#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ + PIN_MODE_INPUT(GPIOF_PIN1) | \ + PIN_MODE_INPUT(GPIOF_PIN2) | \ + PIN_MODE_INPUT(GPIOF_PIN3) | \ + PIN_MODE_INPUT(GPIOF_PIN4) | \ + PIN_MODE_INPUT(GPIOF_PIN5) | \ + PIN_MODE_INPUT(GPIOF_PIN6) | \ + PIN_MODE_INPUT(GPIOF_PIN7) | \ + PIN_MODE_INPUT(GPIOF_PIN8) | \ + PIN_MODE_INPUT(GPIOF_PIN9) | \ + PIN_MODE_INPUT(GPIOF_PIN10) | \ + PIN_MODE_INPUT(GPIOF_PIN11) | \ + PIN_MODE_INPUT(GPIOF_PIN12) | \ + PIN_MODE_INPUT(GPIOF_PIN13) | \ + PIN_MODE_INPUT(GPIOF_PIN14) | \ + PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) +#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_100M(GPIOF_PIN0) | \ + PIN_OSPEED_100M(GPIOF_PIN1) | \ + PIN_OSPEED_100M(GPIOF_PIN2) | \ + PIN_OSPEED_100M(GPIOF_PIN3) | \ + PIN_OSPEED_100M(GPIOF_PIN4) | \ + PIN_OSPEED_100M(GPIOF_PIN5) | \ + PIN_OSPEED_100M(GPIOF_PIN6) | \ + PIN_OSPEED_100M(GPIOF_PIN7) | \ + PIN_OSPEED_100M(GPIOF_PIN8) | \ + PIN_OSPEED_100M(GPIOF_PIN9) | \ + PIN_OSPEED_100M(GPIOF_PIN10) | \ + PIN_OSPEED_100M(GPIOF_PIN11) | \ + PIN_OSPEED_100M(GPIOF_PIN12) | \ + PIN_OSPEED_100M(GPIOF_PIN13) | \ + PIN_OSPEED_100M(GPIOF_PIN14) | \ + PIN_OSPEED_100M(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOF_PIN15)) +#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ + PIN_ODR_HIGH(GPIOF_PIN1) | \ + PIN_ODR_HIGH(GPIOF_PIN2) | \ + PIN_ODR_HIGH(GPIOF_PIN3) | \ + PIN_ODR_HIGH(GPIOF_PIN4) | \ + PIN_ODR_HIGH(GPIOF_PIN5) | \ + PIN_ODR_HIGH(GPIOF_PIN6) | \ + PIN_ODR_HIGH(GPIOF_PIN7) | \ + PIN_ODR_HIGH(GPIOF_PIN8) | \ + PIN_ODR_HIGH(GPIOF_PIN9) | \ + PIN_ODR_HIGH(GPIOF_PIN10) | \ + PIN_ODR_HIGH(GPIOF_PIN11) | \ + PIN_ODR_HIGH(GPIOF_PIN12) | \ + PIN_ODR_HIGH(GPIOF_PIN13) | \ + PIN_ODR_HIGH(GPIOF_PIN14) | \ + PIN_ODR_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0) | \ + PIN_AFIO_AF(GPIOF_PIN1, 0) | \ + PIN_AFIO_AF(GPIOF_PIN2, 0) | \ + PIN_AFIO_AF(GPIOF_PIN3, 0) | \ + PIN_AFIO_AF(GPIOF_PIN4, 0) | \ + PIN_AFIO_AF(GPIOF_PIN5, 0) | \ + PIN_AFIO_AF(GPIOF_PIN6, 0) | \ + PIN_AFIO_AF(GPIOF_PIN7, 0)) +#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ + PIN_AFIO_AF(GPIOF_PIN9, 0) | \ + PIN_AFIO_AF(GPIOF_PIN10, 0) | \ + PIN_AFIO_AF(GPIOF_PIN11, 0) | \ + PIN_AFIO_AF(GPIOF_PIN12, 0) | \ + PIN_AFIO_AF(GPIOF_PIN13, 0) | \ + PIN_AFIO_AF(GPIOF_PIN14, 0) | \ + PIN_AFIO_AF(GPIOF_PIN15, 0)) + +/* + * GPIOG setup: + * + * PG0 - PIN0 (input floating). + * PG1 - PIN1 (input floating). + * PG2 - PIN2 (input floating). + * PG3 - PIN3 (input floating). + * PG4 - PIN4 (input floating). + * PG5 - PIN5 (input floating). + * PG6 - PIN6 (input floating). + * PG7 - PIN7 (input floating). + * PG8 - PIN8 (input floating). + * PG9 - PIN9 (input floating). + * PG10 - PIN10 (input floating). + * PG11 - PIN11 (input floating). + * PG12 - PIN12 (input floating). + * PG13 - PIN13 (input floating). + * PG14 - PIN14 (input floating). + * PG15 - PIN15 (input floating). + */ +#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ + PIN_MODE_INPUT(GPIOG_PIN1) | \ + PIN_MODE_INPUT(GPIOG_PIN2) | \ + PIN_MODE_INPUT(GPIOG_PIN3) | \ + PIN_MODE_INPUT(GPIOG_PIN4) | \ + PIN_MODE_INPUT(GPIOG_PIN5) | \ + PIN_MODE_INPUT(GPIOG_PIN6) | \ + PIN_MODE_INPUT(GPIOG_PIN7) | \ + PIN_MODE_INPUT(GPIOG_PIN8) | \ + PIN_MODE_INPUT(GPIOG_PIN9) | \ + PIN_MODE_INPUT(GPIOG_PIN10) | \ + PIN_MODE_INPUT(GPIOG_PIN11) | \ + PIN_MODE_INPUT(GPIOG_PIN12) | \ + PIN_MODE_INPUT(GPIOG_PIN13) | \ + PIN_MODE_INPUT(GPIOG_PIN14) | \ + PIN_MODE_INPUT(GPIOG_PIN15)) +#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) +#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_100M(GPIOG_PIN0) | \ + PIN_OSPEED_100M(GPIOG_PIN1) | \ + PIN_OSPEED_100M(GPIOG_PIN2) | \ + PIN_OSPEED_100M(GPIOG_PIN3) | \ + PIN_OSPEED_100M(GPIOG_PIN4) | \ + PIN_OSPEED_100M(GPIOG_PIN5) | \ + PIN_OSPEED_100M(GPIOG_PIN6) | \ + PIN_OSPEED_100M(GPIOG_PIN7) | \ + PIN_OSPEED_100M(GPIOG_PIN8) | \ + PIN_OSPEED_100M(GPIOG_PIN9) | \ + PIN_OSPEED_100M(GPIOG_PIN10) | \ + PIN_OSPEED_100M(GPIOG_PIN11) | \ + PIN_OSPEED_100M(GPIOG_PIN12) | \ + PIN_OSPEED_100M(GPIOG_PIN13) | \ + PIN_OSPEED_100M(GPIOG_PIN14) | \ + PIN_OSPEED_100M(GPIOG_PIN15)) +#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOG_PIN15)) +#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ + PIN_ODR_HIGH(GPIOG_PIN1) | \ + PIN_ODR_HIGH(GPIOG_PIN2) | \ + PIN_ODR_HIGH(GPIOG_PIN3) | \ + PIN_ODR_HIGH(GPIOG_PIN4) | \ + PIN_ODR_HIGH(GPIOG_PIN5) | \ + PIN_ODR_HIGH(GPIOG_PIN6) | \ + PIN_ODR_HIGH(GPIOG_PIN7) | \ + PIN_ODR_HIGH(GPIOG_PIN8) | \ + PIN_ODR_HIGH(GPIOG_PIN9) | \ + PIN_ODR_HIGH(GPIOG_PIN10) | \ + PIN_ODR_HIGH(GPIOG_PIN11) | \ + PIN_ODR_HIGH(GPIOG_PIN12) | \ + PIN_ODR_HIGH(GPIOG_PIN13) | \ + PIN_ODR_HIGH(GPIOG_PIN14) | \ + PIN_ODR_HIGH(GPIOG_PIN15)) +#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ + PIN_AFIO_AF(GPIOG_PIN1, 0) | \ + PIN_AFIO_AF(GPIOG_PIN2, 0) | \ + PIN_AFIO_AF(GPIOG_PIN3, 0) | \ + PIN_AFIO_AF(GPIOG_PIN4, 0) | \ + PIN_AFIO_AF(GPIOG_PIN5, 0) | \ + PIN_AFIO_AF(GPIOG_PIN6, 0) | \ + PIN_AFIO_AF(GPIOG_PIN7, 0)) +#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ + PIN_AFIO_AF(GPIOG_PIN9, 0) | \ + PIN_AFIO_AF(GPIOG_PIN10, 0) | \ + PIN_AFIO_AF(GPIOG_PIN11, 0) | \ + PIN_AFIO_AF(GPIOG_PIN12, 0) | \ + PIN_AFIO_AF(GPIOG_PIN13, 0) | \ + PIN_AFIO_AF(GPIOG_PIN14, 0) | \ + PIN_AFIO_AF(GPIOG_PIN15, 0)) + +/* + * GPIOH setup: + * + * PH0 - OSC_IN (input floating). + * PH1 - OSC_OUT (input floating). + * PH2 - PIN2 (input floating). + * PH3 - PIN3 (input floating). + * PH4 - PIN4 (input floating). + * PH5 - PIN5 (input floating). + * PH6 - PIN6 (input floating). + * PH7 - PIN7 (input floating). + * PH8 - PIN8 (input floating). + * PH9 - PIN9 (input floating). + * PH10 - PIN10 (input floating). + * PH11 - PIN11 (input floating). + * PH12 - PIN12 (input floating). + * PH13 - PIN13 (input floating). + * PH14 - PIN14 (input floating). + * PH15 - PIN15 (input floating). + */ +#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ + PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ + PIN_MODE_INPUT(GPIOH_PIN2) | \ + PIN_MODE_INPUT(GPIOH_PIN3) | \ + PIN_MODE_INPUT(GPIOH_PIN4) | \ + PIN_MODE_INPUT(GPIOH_PIN5) | \ + PIN_MODE_INPUT(GPIOH_PIN6) | \ + PIN_MODE_INPUT(GPIOH_PIN7) | \ + PIN_MODE_INPUT(GPIOH_PIN8) | \ + PIN_MODE_INPUT(GPIOH_PIN9) | \ + PIN_MODE_INPUT(GPIOH_PIN10) | \ + PIN_MODE_INPUT(GPIOH_PIN11) | \ + PIN_MODE_INPUT(GPIOH_PIN12) | \ + PIN_MODE_INPUT(GPIOH_PIN13) | \ + PIN_MODE_INPUT(GPIOH_PIN14) | \ + PIN_MODE_INPUT(GPIOH_PIN15)) +#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ + PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) +#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \ + PIN_OSPEED_100M(GPIOH_OSC_OUT) | \ + PIN_OSPEED_100M(GPIOH_PIN2) | \ + PIN_OSPEED_100M(GPIOH_PIN3) | \ + PIN_OSPEED_100M(GPIOH_PIN4) | \ + PIN_OSPEED_100M(GPIOH_PIN5) | \ + PIN_OSPEED_100M(GPIOH_PIN6) | \ + PIN_OSPEED_100M(GPIOH_PIN7) | \ + PIN_OSPEED_100M(GPIOH_PIN8) | \ + PIN_OSPEED_100M(GPIOH_PIN9) | \ + PIN_OSPEED_100M(GPIOH_PIN10) | \ + PIN_OSPEED_100M(GPIOH_PIN11) | \ + PIN_OSPEED_100M(GPIOH_PIN12) | \ + PIN_OSPEED_100M(GPIOH_PIN13) | \ + PIN_OSPEED_100M(GPIOH_PIN14) | \ + PIN_OSPEED_100M(GPIOH_PIN15)) +#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ + PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOH_PIN15)) +#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ + PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ + PIN_ODR_HIGH(GPIOH_PIN2) | \ + PIN_ODR_HIGH(GPIOH_PIN3) | \ + PIN_ODR_HIGH(GPIOH_PIN4) | \ + PIN_ODR_HIGH(GPIOH_PIN5) | \ + PIN_ODR_HIGH(GPIOH_PIN6) | \ + PIN_ODR_HIGH(GPIOH_PIN7) | \ + PIN_ODR_HIGH(GPIOH_PIN8) | \ + PIN_ODR_HIGH(GPIOH_PIN9) | \ + PIN_ODR_HIGH(GPIOH_PIN10) | \ + PIN_ODR_HIGH(GPIOH_PIN11) | \ + PIN_ODR_HIGH(GPIOH_PIN12) | \ + PIN_ODR_HIGH(GPIOH_PIN13) | \ + PIN_ODR_HIGH(GPIOH_PIN14) | \ + PIN_ODR_HIGH(GPIOH_PIN15)) +#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \ + PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \ + PIN_AFIO_AF(GPIOH_PIN2, 0) | \ + PIN_AFIO_AF(GPIOH_PIN3, 0) | \ + PIN_AFIO_AF(GPIOH_PIN4, 0) | \ + PIN_AFIO_AF(GPIOH_PIN5, 0) | \ + PIN_AFIO_AF(GPIOH_PIN6, 0) | \ + PIN_AFIO_AF(GPIOH_PIN7, 0)) +#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ + PIN_AFIO_AF(GPIOH_PIN9, 0) | \ + PIN_AFIO_AF(GPIOH_PIN10, 0) | \ + PIN_AFIO_AF(GPIOH_PIN11, 0) | \ + PIN_AFIO_AF(GPIOH_PIN12, 0) | \ + PIN_AFIO_AF(GPIOH_PIN13, 0) | \ + PIN_AFIO_AF(GPIOH_PIN14, 0) | \ + PIN_AFIO_AF(GPIOH_PIN15, 0)) + +/* + * GPIOI setup: + * + * PI0 - PIN0 (input floating). + * PI1 - PIN1 (input floating). + * PI2 - PIN2 (input floating). + * PI3 - PIN3 (input floating). + * PI4 - PIN4 (input floating). + * PI5 - PIN5 (input floating). + * PI6 - PIN6 (input floating). + * PI7 - PIN7 (input floating). + * PI8 - PIN8 (input floating). + * PI9 - PIN9 (input floating). + * PI10 - PIN10 (input floating). + * PI11 - PIN11 (input floating). + * PI12 - PIN12 (input floating). + * PI13 - PIN13 (input floating). + * PI14 - PIN14 (input floating). + * PI15 - PIN15 (input floating). + */ +#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ + PIN_MODE_INPUT(GPIOI_PIN1) | \ + PIN_MODE_INPUT(GPIOI_PIN2) | \ + PIN_MODE_INPUT(GPIOI_PIN3) | \ + PIN_MODE_INPUT(GPIOI_PIN4) | \ + PIN_MODE_INPUT(GPIOI_PIN5) | \ + PIN_MODE_INPUT(GPIOI_PIN6) | \ + PIN_MODE_INPUT(GPIOI_PIN7) | \ + PIN_MODE_INPUT(GPIOI_PIN8) | \ + PIN_MODE_INPUT(GPIOI_PIN9) | \ + PIN_MODE_INPUT(GPIOI_PIN10) | \ + PIN_MODE_INPUT(GPIOI_PIN11) | \ + PIN_MODE_INPUT(GPIOI_PIN12) | \ + PIN_MODE_INPUT(GPIOI_PIN13) | \ + PIN_MODE_INPUT(GPIOI_PIN14) | \ + PIN_MODE_INPUT(GPIOI_PIN15)) +#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) +#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_100M(GPIOI_PIN0) | \ + PIN_OSPEED_100M(GPIOI_PIN1) | \ + PIN_OSPEED_100M(GPIOI_PIN2) | \ + PIN_OSPEED_100M(GPIOI_PIN3) | \ + PIN_OSPEED_100M(GPIOI_PIN4) | \ + PIN_OSPEED_100M(GPIOI_PIN5) | \ + PIN_OSPEED_100M(GPIOI_PIN6) | \ + PIN_OSPEED_100M(GPIOI_PIN7) | \ + PIN_OSPEED_100M(GPIOI_PIN8) | \ + PIN_OSPEED_100M(GPIOI_PIN9) | \ + PIN_OSPEED_100M(GPIOI_PIN10) | \ + PIN_OSPEED_100M(GPIOI_PIN11) | \ + PIN_OSPEED_100M(GPIOI_PIN12) | \ + PIN_OSPEED_100M(GPIOI_PIN13) | \ + PIN_OSPEED_100M(GPIOI_PIN14) | \ + PIN_OSPEED_100M(GPIOI_PIN15)) +#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ + PIN_PUPDR_FLOATING(GPIOI_PIN15)) +#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ + PIN_ODR_HIGH(GPIOI_PIN1) | \ + PIN_ODR_HIGH(GPIOI_PIN2) | \ + PIN_ODR_HIGH(GPIOI_PIN3) | \ + PIN_ODR_HIGH(GPIOI_PIN4) | \ + PIN_ODR_HIGH(GPIOI_PIN5) | \ + PIN_ODR_HIGH(GPIOI_PIN6) | \ + PIN_ODR_HIGH(GPIOI_PIN7) | \ + PIN_ODR_HIGH(GPIOI_PIN8) | \ + PIN_ODR_HIGH(GPIOI_PIN9) | \ + PIN_ODR_HIGH(GPIOI_PIN10) | \ + PIN_ODR_HIGH(GPIOI_PIN11) | \ + PIN_ODR_HIGH(GPIOI_PIN12) | \ + PIN_ODR_HIGH(GPIOI_PIN13) | \ + PIN_ODR_HIGH(GPIOI_PIN14) | \ + PIN_ODR_HIGH(GPIOI_PIN15)) +#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0) | \ + PIN_AFIO_AF(GPIOI_PIN1, 0) | \ + PIN_AFIO_AF(GPIOI_PIN2, 0) | \ + PIN_AFIO_AF(GPIOI_PIN3, 0) | \ + PIN_AFIO_AF(GPIOI_PIN4, 0) | \ + PIN_AFIO_AF(GPIOI_PIN5, 0) | \ + PIN_AFIO_AF(GPIOI_PIN6, 0) | \ + PIN_AFIO_AF(GPIOI_PIN7, 0)) +#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0) | \ + PIN_AFIO_AF(GPIOI_PIN9, 0) | \ + PIN_AFIO_AF(GPIOI_PIN10, 0) | \ + PIN_AFIO_AF(GPIOI_PIN11, 0) | \ + PIN_AFIO_AF(GPIOI_PIN12, 0) | \ + PIN_AFIO_AF(GPIOI_PIN13, 0) | \ + PIN_AFIO_AF(GPIOI_PIN14, 0) | \ + PIN_AFIO_AF(GPIOI_PIN15, 0)) + + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/cfg/board.chcfg b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/cfg/board.chcfg new file mode 100644 index 00000000..a5593446 --- /dev/null +++ b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/cfg/board.chcfg @@ -0,0 +1,1186 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!--mikromedia STM32F4--> +<board + xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" + xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f4xx_board.xsd"> + <configuration_settings> + <templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path> + <output_path>..</output_path> + </configuration_settings> + <board_name>mikromedia STM32-M4</board_name> + <board_id>MIKROE_MIKROMEDIA_M4</board_id> + <board_functions></board_functions> + <clocks HSEFrequency="16000000" HSEBypass="false" LSEFrequency="32768" VDD="330" /> + <ports> + <GPIOA> + <pin0 + ID="VSENSE" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Analog" + Alternate="0" /> + <pin1 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin2 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin3 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin4 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="6" /> + <pin5 + ID="" + Type="PushPull" + Level="High" + Speed="High" + Resistor="Floating" + Mode="Alternate" + Alternate="5" /> + <pin6 + ID="" + Type="PushPull" + Level="High" + Speed="High" + Resistor="Floating" + Mode="Alternate" + Alternate="5" /> + <pin7 + ID="" + Type="PushPull" + Level="High" + Speed="High" + Resistor="Floating" + Mode="Alternate" + Alternate="5" /> + <pin8 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" ></pin8> + <pin9 + ID="VBUS_FS" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin10 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin11 + ID="OTG_FS_DM" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="10" /> + <pin12 + ID="OTG_FS_DP" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="10" /> + <pin13 + ID="TMS" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="0" /> + <pin14 + ID="TCK" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="0" /> + <pin15 + ID="TDI" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + </GPIOA> + <GPIOB> + <pin0 + ID="LCD_YD" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Analog" + Alternate="0" /> + <pin1 + ID="LCD_XL" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Analog" + Alternate="0" /> + <pin2 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin3 + ID="TDO" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="0" ></pin3> + <pin4 + ID="TRST" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin5 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin6 + ID="SCL1" + Type="OpenDrain" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="4" /> + <pin7 + ID="SDA1" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="4" /> + <pin8 + ID="DRIVEA" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin9 + ID="DRIVEB" + Type="OpenDrain" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" ></pin9> + <pin10 + ID="SCL2" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin11 + ID="SDA2" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin12 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin13 + ID="SCK2" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin14 + ID="MISO2" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin15 + ID="MOSI2" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + </GPIOB> + <GPIOC> + <pin0 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin1 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin2 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin3 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" ></pin3> + <pin4 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin5 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin6 + ID="MP3_DREQ" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin7 + ID="MP3_RST" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="6" /> + <pin8 + ID="MP3_CS" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Output" + Alternate="0" /> + <pin9 + ID="MP3_DCS" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin10 + ID="SCK3" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="6" /> + <pin11 + ID="MISO3" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="6" /> + <pin12 + ID="MOSI3" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="6" /> + <pin13 + ID="STAT" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin14 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin15 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + </GPIOC> + <GPIOD> + <pin0 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin1 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin2 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin3 + ID="SD_CS" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin4 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin5 + ID="TX2" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Alternate" + Alternate="7" ></pin5> + <pin6 + ID="RX2" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Alternate" + Alternate="7" /> + <pin7 + ID="FLASH_CS" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Output" + Alternate="0" /> + <pin8 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin9 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin10 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin11 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + <pin12 + ID="" + Type="PushPull" + Level="Low" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin13 + ID="" + Type="PushPull" + Level="Low" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin14 + ID="" + Type="PushPull" + Level="Low" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" ></pin14> + <pin15 + ID="SD_CD" + Type="PushPull" + Level="Low" + Speed="Maximum" + Resistor="PullUp" + Mode="Input" + Alternate="0" /> + </GPIOD> + <GPIOE> + <pin0 + ID="TD0" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin1 + ID="TD1" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin2 + ID="TD2" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin3 + ID="TD3" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin4 + ID="TD4" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin5 + ID="TD5" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin6 + ID="TD6" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin7 + ID="TD7" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin8 + ID="LCD_RST" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin9 + ID="LCD_BLED" + Type="PushPull" + Level="Low" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin10 + ID="PMRD" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin11 + ID="PMWR" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin12 + ID="LCD_RS" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + <pin13 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin14 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin15 + ID="LCD_CS" + Type="PushPull" + Level="Low" + Speed="Maximum" + Resistor="Floating" + Mode="Output" + Alternate="0" /> + </GPIOE> + <GPIOF> + <pin0 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin1 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin2 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin3 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin4 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin5 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin6 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin7 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin8 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin9 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin10 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin11 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin12 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin13 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin14 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin15 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + </GPIOF> + <GPIOG> + <pin0 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin1 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin2 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin3 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin4 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin5 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin6 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin7 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin8 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin9 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin10 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin11 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin12 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin13 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin14 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin15 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + </GPIOG> + <GPIOH> + <pin0 + ID="OSC_IN" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin1 + ID="OSC_OUT" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin2 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" ></pin2> + <pin3 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin4 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin5 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin6 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin7 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin8 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin9 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin10 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin11 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin12 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin13 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin14 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin15 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + </GPIOH> + <GPIOI> + <pin0 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin1 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin2 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin3 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin4 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin5 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin6 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin7 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin8 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin9 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin10 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin11 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin12 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin13 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin14 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + <pin15 + ID="" + Type="PushPull" + Level="High" + Speed="Maximum" + Resistor="Floating" + Mode="Input" + Alternate="0" /> + </GPIOI> + </ports> +</board> diff --git a/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/flash_memory.c b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/flash_memory.c new file mode 100644 index 00000000..1965ba35 --- /dev/null +++ b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/flash_memory.c @@ -0,0 +1,125 @@ +#include "hal.h" +#include "flash_memory.h" + +static const unsigned short _SERIAL_FLASH_CMD_RDID = 0x9F; // 25P80 +static const unsigned short _SERIAL_FLASH_CMD_READ = 0x03; +static const unsigned short _SERIAL_FLASH_CMD_WRITE = 0x02; +static const unsigned short _SERIAL_FLASH_CMD_WREN = 0x06; +static const unsigned short _SERIAL_FLASH_CMD_RDSR = 0x05; +static const unsigned short _SERIAL_FLASH_CMD_ERASE = 0xC7; // 25P80 +static const unsigned short _SERIAL_FLASH_CMD_EWSR = 0x06; // 25P80 +static const unsigned short _SERIAL_FLASH_CMD_WRSR = 0x01; +static const unsigned short _SERIAL_FLASH_CMD_SER = 0xD8; //25P80 + +static const SPIConfig flash_spicfg = { + NULL, + GPIOD, + GPIOD_FLASH_CS, + 0 +}; + +bool flash_is_write_busy(void) { + static uint8_t is_write_busy_cmd[1]; + is_write_busy_cmd[0] = _SERIAL_FLASH_CMD_RDSR; + + uint8_t result[1]; + + spiAcquireBus(&SPID3); + spiStart(&SPID3, &flash_spicfg); + spiSelect(&SPID3); + spiSend(&SPID3, sizeof(is_write_busy_cmd), is_write_busy_cmd); + spiReceive(&SPID3, sizeof(result), result); + spiUnselect(&SPID3); + spiReleaseBus(&SPID3); + + return result[0]&0x01; +} + +void flash_write_enable(void) { + spiAcquireBus(&SPID3); + spiStart(&SPID3, &flash_spicfg); + spiSelect(&SPID3); + spiSend(&SPID3, 1, &_SERIAL_FLASH_CMD_WREN); + spiUnselect(&SPID3); + spiReleaseBus(&SPID3); +} + +void flash_sector_erase(uint32_t sector) { + flash_write_enable(); + static uint8_t sector_erase_cmd[4]; + sector_erase_cmd[0] = _SERIAL_FLASH_CMD_SER; + sector_erase_cmd[1] = (sector >> 16) & 0xFF; + sector_erase_cmd[2] = (sector >> 8) & 0xFF; + sector_erase_cmd[3] = sector & 0xFF; + + + spiAcquireBus(&SPID3); + spiStart(&SPID3, &flash_spicfg); + spiSelect(&SPID3); + spiSend(&SPID3, sizeof(sector_erase_cmd), sector_erase_cmd); + spiUnselect(&SPID3); + spiReleaseBus(&SPID3); + + /* wait for complete */ + while(flash_is_write_busy()); +} + +void flash_read(uint32_t address, size_t bytes, uint8_t *out) { + static uint8_t sector_read_cmd[4]; + sector_read_cmd[0] = _SERIAL_FLASH_CMD_READ; + sector_read_cmd[1] = (address >> 16) & 0xFF; + sector_read_cmd[2] = (address >> 8) & 0xFF; + sector_read_cmd[3] = address & 0xFF; + uint8_t dummy[1]; + + spiAcquireBus(&SPID3); + spiStart(&SPID3, &flash_spicfg); + spiSelect(&SPID3); + spiSend(&SPID3, sizeof(sector_read_cmd), sector_read_cmd); + spiReceive(&SPID3, bytes, out); + spiUnselect(&SPID3); + spiReleaseBus(&SPID3); +} + +void flash_write(uint32_t address, size_t bytes, uint8_t *data) { + static uint8_t flash_write_cmd[4]; + + flash_write_enable(); + + flash_write_cmd[0] = _SERIAL_FLASH_CMD_WRITE; + flash_write_cmd[1] = (address >> 16) & 0xFF; + flash_write_cmd[2] = (address >> 8) & 0xFF; + flash_write_cmd[3] = address & 0xFF; + uint8_t dummy[1]; + + spiAcquireBus(&SPID3); + spiStart(&SPID3, &flash_spicfg); + spiSelect(&SPID3); + spiSend(&SPID3, sizeof(flash_write_cmd), flash_write_cmd); + spiSend(&SPID3, bytes, data); + spiUnselect(&SPID3); + spiReleaseBus(&SPID3); + + /* wait for complete */ + while(flash_is_write_busy()); +} + +bool flash_tp_calibrated(void) { + uint8_t out[1]; + flash_read(0x0F0000, 1, out); + + return (out[0] == 0x01); +} + +void flash_tp_calibration_save(uint16_t instance, const uint8_t *calbuf, size_t sz) { + flash_sector_erase(0x0F0000); + uint8_t calibrated = 0x01; + flash_write(0x0F0000, 1, &calibrated); + flash_write(0x0F0001, sz, calbuf); +} +const char *flash_tp_calibration_load(uint16_t instance) { + static char foo[24]; + flash_read(0x0F0001, 24, foo); + + return foo; +}
\ No newline at end of file diff --git a/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/flash_memory.h b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/flash_memory.h new file mode 100644 index 00000000..5be7523f --- /dev/null +++ b/boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/flash_memory.h @@ -0,0 +1,6 @@ +void flash_sector_erase(uint32_t sector); +void flash_read(uint32_t address, size_t bytes, uint8_t *out); +void flash_write(uint32_t address, size_t bytes, uint8_t *data); +bool flash_tp_calibrated(void); +void flash_tp_calibration_save(uint16_t instance, const uint8_t *calbuf, size_t sz); +const char *flash_tp_calibration_load(uint16_t instance);
\ No newline at end of file |