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| author | inmarket <andrewh@inmarket.com.au> | 2017-10-02 13:33:38 +1000 |
|---|---|---|
| committer | inmarket <andrewh@inmarket.com.au> | 2017-10-02 13:33:38 +1000 |
| commit | fdaf636b5f0c7ff5280438f524a07c29a2f7eea6 (patch) | |
| tree | cebe56a3a673c90d64260b5c173b8a91abda00c0 | |
| parent | 7ef1fa156ce26ddc1410be9e5deb22531c3eed02 (diff) | |
| download | uGFX-fdaf636b5f0c7ff5280438f524a07c29a2f7eea6.tar.gz uGFX-fdaf636b5f0c7ff5280438f524a07c29a2f7eea6.tar.bz2 uGFX-fdaf636b5f0c7ff5280438f524a07c29a2f7eea6.zip | |
Fix: ChibiOS V2 doesn't support dma cache handling at all
| -rw-r--r-- | src/gfile/gfile_fatfs_diskio_chibios.c | 11 | ||||
| -rw-r--r-- | src/gfile/gfile_petitfs_diskio_chibios.c | 11 |
2 files changed, 16 insertions, 6 deletions
diff --git a/src/gfile/gfile_fatfs_diskio_chibios.c b/src/gfile/gfile_fatfs_diskio_chibios.c index 1f4638d5..13c7403d 100644 --- a/src/gfile/gfile_fatfs_diskio_chibios.c +++ b/src/gfile/gfile_fatfs_diskio_chibios.c @@ -40,9 +40,14 @@ // specified data structure is aligned on a cache line boundary - not a good assumption. // Solution: We increase the size provided to ChibiOS so that it does it properly. // This assumes of course that we know the size of the cpu cache line. -#define CPU_CACHE_LINE_SIZE 32 -#define CACHE_FLUSH(buf, sz) dmaBufferFlush((buf), (sz)+(CPU_CACHE_LINE_SIZE-1)) -#define CACHE_INVALIDATE(buf, sz) dmaBufferInvalidate((buf), (sz)+(CPU_CACHE_LINE_SIZE-1)) +#if CH_KERNEL_MAJOR > 2 + #define CPU_CACHE_LINE_SIZE 32 + #define CACHE_FLUSH(buf, sz) dmaBufferFlush((buf), (sz)+(CPU_CACHE_LINE_SIZE-1)) + #define CACHE_INVALIDATE(buf, sz) dmaBufferInvalidate((buf), (sz)+(CPU_CACHE_LINE_SIZE-1)) +#else + #define CACHE_FLUSH(buf, sz) + #define CACHE_INVALIDATE(buf, sz) +#endif /* Initialize a Drive */ DSTATUS disk_initialize ( diff --git a/src/gfile/gfile_petitfs_diskio_chibios.c b/src/gfile/gfile_petitfs_diskio_chibios.c index 61917ee5..bbaf0e4b 100644 --- a/src/gfile/gfile_petitfs_diskio_chibios.c +++ b/src/gfile/gfile_petitfs_diskio_chibios.c @@ -35,9 +35,14 @@ // specified data structure is aligned on a cache line boundary - not a good assumption. // Solution: We increase the size provided to ChibiOS so that it does it properly. // This assumes of course that we know the size of the cpu cache line. -#define CPU_CACHE_LINE_SIZE 32 -#define CACHE_FLUSH(buf, sz) dmaBufferFlush((buf), (sz)+(CPU_CACHE_LINE_SIZE-1)) -#define CACHE_INVALIDATE(buf, sz) dmaBufferInvalidate((buf), (sz)+(CPU_CACHE_LINE_SIZE-1)) +#if CH_KERNEL_MAJOR > 2 + #define CPU_CACHE_LINE_SIZE 32 + #define CACHE_FLUSH(buf, sz) dmaBufferFlush((buf), (sz)+(CPU_CACHE_LINE_SIZE-1)) + #define CACHE_INVALIDATE(buf, sz) dmaBufferInvalidate((buf), (sz)+(CPU_CACHE_LINE_SIZE-1)) +#else + #define CACHE_FLUSH(buf, sz) + #define CACHE_INVALIDATE(buf, sz) +#endif /*-----------------------------------------------------------------------*/ /* Initialize a Drive */ |