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/** \file
*
* This file contains special DoxyGen information for the generation of the main page and other special
* documentation pages. It is not a project source file.
*/
/** \mainpage AVRISP MKII Programmer Project
*
* \section SSec_Compat Project Compatibility:
*
* The following list indicates what microcontrollers are compatible with this project.
*
* - Series 7 USB AVRs
* - Series 6 USB AVRs
* - Series 4 USB AVRs
* - Series 2 USB AVRs (8KB versions with reduced features only)
*
* \section SSec_Info USB Information:
*
* The following table gives a rundown of the USB utilization of this project.
*
* <table>
* <tr>
* <td><b>USB Mode:</b></td>
* <td>Device</td>
* </tr>
* <tr>
* <td><b>USB Class:</b></td>
* <td>Vendor Specific Class</td>
* </tr>
* <tr>
* <td><b>USB Subclass:</b></td>
* <td>N/A</td>
* </tr>
* <tr>
* <td><b>Relevant Standards:</b></td>
* <td>Atmel AVRISP MKII Protocol Specification</td>
* </tr>
* <tr>
* <td><b>Usable Speeds:</b></td>
* <td>Full Speed Mode</td>
* </tr>
* </table>
*
* \section SSec_Description Project Description:
*
* Firmware for an AVRStudio compatible AVRISP-MKII clone programmer. This project will enable the USB AVR series of
* microcontrollers to act as a clone of the official Atmel AVRISP-MKII programmer, usable within AVRStudio. In its
* most basic form, it allows for the programming of 5V AVRs from within AVRStudio with no special hardware other than
* the USB AVR and the parts needed for the USB interface. If the user desires, more advanced circuits incorporating
* level conversion can be made to allow for the programming of 3.3V AVR designs.
*
* This device spoofs Atmel's official AVRISP-MKII device PID so that it remains compatible with Atmel's AVRISP-MKII
* drivers. When prompted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio.
*
* Note that this design currently has several limitations:
* - Minimum ISP target clock speed of 500KHz due to hardware SPI used
* - No reversed/shorted target connector detection and notification
*
* On AVR models with an ADC converter, AVCC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be
* set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models
* without an ADC converter, VTARGET will report at a fixed 5V level.
*
* When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the
* XPLAIN's XMEGA AVR, and will enable PDI only programming support (since ISP and TPI modes are not needed).
*
* While this application can be compiled for USB AVRs with as little as 8KB of FLASH, for full functionality 16KB or more
* of FLASH is required. On 8KB devices, ISP, PDI or TPI programming support can be disabled to reduce program size.
*
* \section Sec_ISP ISP Connections
* Connections to the device for SPI programming (when enabled):
*
* <table>
* <tr>
* <td><b>Programmer Pin:</b></td>
* <td><b>Target Device Pin:</b></td>
* <td><b>ISP 6 Pin Layout:</b></td>
* </tr>
* <tr>
* <td>MISO</td>
* <td>PDO</td>
* <td>1</td>
* </tr>
* <tr>
* <td>ADCx <b><sup>1</sup></b></td>
* <td>VTARGET</td>
* <td>2</td>
* </tr>
* <tr>
* <td>SCLK</td>
* <td>SCLK</td>
* <td>3</td>
* </tr>
* <tr>
* <td>MOSI</td>
* <td>PDI</td>
* <td>4</td>
* </tr>
* <tr>
* <td>PORTx.y <b><sup>2</sup></b></td>
* <td>/RESET</td>
* <td>5</td>
* </tr>
* <tr>
* <td>GND</td>
* <td>GND</td>
* <td>6</td>
* </tr>
* </table>
*
* <b><sup>1</sup></b> <i>Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only</i> \n
* <b><sup>2</sup></b> <i>See \ref SSec_Options section</i>
*
* \section Sec_PDI PDI Connections
* Connections to the device for PDI programming<b><sup>1</sup></b> (when enabled):
*
* <table>
* <tr>
* <td><b>Programmer Pin:</b></td>
* <td><b>Target Device Pin:</b></td>
* <td><b>PDI 6 Pin Layout:</b></td>
* </tr>
* <tr>
* <td>MISO</td>
* <td>DATA</td>
* <td>1</td>
* </tr>
* <tr>
* <td>ADCx <b><sup>1</sup></b></td>
* <td>VTARGET</td>
* <td>2</td>
* </tr>
* <tr>
* <td>N/A</td>
* <td>N/A</td>
* <td>3</td>
* </tr>
* <tr>
* <td>N/A</td>
* <td>N/A</td>
* <td>4</td>
* </tr>
* <tr>
* <td>PORTx.y <b><sup>2</sup></b></td>
* <td>CLOCK</td>
* <td>5</td>
* </tr>
* <tr>
* <td>GND</td>
* <td>GND</td>
* <td>6</td>
* </tr>
* </table>
*
* <b><sup>1</sup></b> <i>When XPROG_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together
* via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i>
*
* \section Sec_TPI TPI Connections
* Connections to the device for TPI programming<b><sup>1</sup></b> (when enabled):
*
* <table>
* <tr>
* <td><b>Programmer Pin:</b></td>
* <td><b>Target Device Pin:</b></td>
* <td><b>TPI 6 Pin Layout:</b></td>
* </tr>
* <tr>
* <td>MISO</td>
* <td>DATA</td>
* <td>1</td>
* </tr>
* <tr>
* <td>ADCx <b><sup>1</sup></b></td>
* <td>VTARGET</td>
* <td>2</td>
* </tr>
* <tr>
* <td>SCLK</td>
* <td>CLOCK</td>
* <td>3</td>
* </tr>
* <tr>
* <td>N/A</td>
* <td>N/A</td>
* <td>4</td>
* </tr>
* <tr>
* <td>PORTx.y <b><sup>2</sup></b></td>
* <td>/RESET</td>
* <td>5</td>
* </tr>
* <tr>
* <td>GND</td>
* <td>GND</td>
* <td>6</td>
* </tr>
* </table>
*
* <b><sup>1</sup></b> <i>When XPROG_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together
* via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i>
*
* \section SSec_Options Project Options
*
* The following defines can be found in this project, which can control the project behaviour when defined, or changed in value.
*
* <table>
* <tr>
* <td><b>Define Name:</b></td>
* <td><b>Location:</b></td>
* <td><b>Description:</b></td>
* </tr>
* <tr>
* <td>RESET_LINE_PORT</td>
* <td>Makefile CDEFS</td>
* <td>PORT register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
* </tr>
* <tr>
* <td>RESET_LINE_PIN</td>
* <td>Makefile CDEFS</td>
* <td>PIN register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
* </tr>
* <tr>
* <td>RESET_LINE_DDR</td>
* <td>Makefile CDEFS</td>
* <td>DDR register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
* </tr>
* <tr>
* <td>RESET_LINE_MASK</td>
* <td>Makefile CDEFS</td>
* <td>Mask for the programmer's target RESET line on the chosen port. <b>Must not be the AVR's /SS pin</b>, as the
* target pins are tri-stated when not in use, and low signals on the /SS pin will force SPI slave mode when the
* pin is configured as an input. When in PDI programming mode, this is the target clock pin.
* <i>Ignored when compiled for the XPLAIN board.</i></td>
* </tr>
* <tr>
* <td>VTARGET_ADC_CHANNEL</td>
* <td>Makefile CDEFS</td>
* <td>ADC channel number (on supported AVRs) to use for VTARGET level detection.</td>
* </tr>
* <tr>
* <td>ENABLE_ISP_PROTOCOL</td>
* <td>Makefile CDEFS</td>
* <td>Define to enable SPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>
* </tr>
* <tr>
* <td>ENABLE_XPROG_PROTOCOL</td>
* <td>Makefile CDEFS</td>
* <td>Define to enable PDI and TPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>
* </tr>
* <tr>
* <td>XPROG_VIA_HARDWARE_USART</td>
* <td>Makefile CDEFS</td>
* <td>Define to force the PDI and TPI protocols (when enabled) to use the much faster hardware USART instead of bit-banging to
* match the official AVRISP pinout. This breaks pinout compatibility with the official AVRISP MKII (and requires
* seperate ISP and PDI/TPI programming headers) but increases programming speed dramatically.
* <i>Ignored when compiled for the XPLAIN board.</i></td>
* </tr>
* </table>
*/
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