Seperate out XMEGA and TINY NVM routines into seperate files.

6 files changed, 348 insertions, 130 deletions

diff --git a/Projects/AVRISP/Lib/PDIProtocol.c b/Projects/AVRISP/Lib/PDIProtocol.c
index 43370c730..16ac209df 100644
--- a/Projects/AVRISP/Lib/PDIProtocol.c
+++ b/Projects/AVRISP/Lib/PDIProtocol.c
@@ -160,28 +160,28 @@ static void PDIProtocol_Erase(void)
 	Endpoint_ClearOUT();

 	Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);

 	

-	uint8_t EraseCommand = NVM_CMD_NOOP;

+	uint8_t EraseCommand = XMEGA_NVM_CMD_NOOP;

 	

 	/* Determine which NVM command to send to the device depending on the memory to erase */

 	if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_CHIP)

-	  EraseCommand = NVM_CMD_CHIPERASE;

+	  EraseCommand = XMEGA_NVM_CMD_CHIPERASE;

 	else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP)

-	  EraseCommand = NVM_CMD_ERASEAPPSEC;

+	  EraseCommand = XMEGA_NVM_CMD_ERASEAPPSEC;

 	else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_BOOT)

-	  EraseCommand = NVM_CMD_ERASEBOOTSEC;

+	  EraseCommand = XMEGA_NVM_CMD_ERASEBOOTSEC;

 	else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_EEPROM)

-	  EraseCommand = NVM_CMD_ERASEEEPROM;

+	  EraseCommand = XMEGA_NVM_CMD_ERASEEEPROM;

 	else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP_PAGE)

-	  EraseCommand = NVM_CMD_ERASEAPPSECPAGE;

+	  EraseCommand = XMEGA_NVM_CMD_ERASEAPPSECPAGE;

 	else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_BOOT_PAGE)

-	  EraseCommand = NVM_CMD_ERASEBOOTSECPAGE;

+	  EraseCommand = XMEGA_NVM_CMD_ERASEBOOTSECPAGE;

 	else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_EEPROM_PAGE)

-	  EraseCommand = NVM_CMD_ERASEEEPROMPAGE;

+	  EraseCommand = XMEGA_NVM_CMD_ERASEEEPROMPAGE;

 	else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_USERSIG)

-	  EraseCommand = NVM_CMD_ERASEUSERSIG;

+	  EraseCommand = XMEGA_NVM_CMD_ERASEUSERSIG;

 	

 	/* Erase the target memory, indicate timeout if ocurred */

-	if (!(NVMTarget_EraseMemory(EraseCommand, Erase_XPROG_Params.Address)))

+	if (!(XMEGANVM_EraseMemory(EraseCommand, Erase_XPROG_Params.Address)))

 	  ReturnStatus = XPRG_ERR_TIMEOUT;

 	

 	Endpoint_Write_Byte(CMD_XPROG);

@@ -214,47 +214,47 @@ static void PDIProtocol_WriteMemory(void)
 	Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);

 

 	/* Assume FLASH page programming by default, as it is the common case */

-	uint8_t WriteCommand     = NVM_CMD_WRITEFLASHPAGE;

-	uint8_t WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;

-	uint8_t EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;

+	uint8_t WriteCommand     = XMEGA_NVM_CMD_WRITEFLASHPAGE;

+	uint8_t WriteBuffCommand = XMEGA_NVM_CMD_LOADFLASHPAGEBUFF;

+	uint8_t EraseBuffCommand = XMEGA_NVM_CMD_ERASEFLASHPAGEBUFF;

 	bool    PagedMemory      = true;

 	

 	if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_APPL)

 	{

-		WriteCommand     = NVM_CMD_WRITEAPPSECPAGE;

+		WriteCommand     = XMEGA_NVM_CMD_WRITEAPPSECPAGE;

 	}

 	else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_BOOT)

 	{

-		WriteCommand     = NVM_CMD_WRITEBOOTSECPAGE;

+		WriteCommand     = XMEGA_NVM_CMD_WRITEBOOTSECPAGE;

 	}

 	else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_EEPROM)

 	{

-		WriteCommand     = NVM_CMD_WRITEEEPROMPAGE;

-		WriteBuffCommand = NVM_CMD_LOADEEPROMPAGEBUFF;

-		EraseBuffCommand = NVM_CMD_ERASEEEPROMPAGEBUFF;

+		WriteCommand     = XMEGA_NVM_CMD_WRITEEEPROMPAGE;

+		WriteBuffCommand = XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF;

+		EraseBuffCommand = XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF;

 	}

 	else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)

 	{

 		/* User signature is paged, but needs us to manually indicate the mode bits since the host doesn't set them */

 		WriteMemory_XPROG_Params.PageMode = (XPRG_PAGEMODE_ERASE | XPRG_PAGEMODE_WRITE);

-		WriteCommand     = NVM_CMD_WRITEUSERSIG;

+		WriteCommand     = XMEGA_NVM_CMD_WRITEUSERSIG;

 	}

 	else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_FUSE)

 	{

-		WriteCommand     = NVM_CMD_WRITEFUSE;

+		WriteCommand     = XMEGA_NVM_CMD_WRITEFUSE;

 		PagedMemory      = false;

 	}

 	else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_LOCKBITS)

 	{

-		WriteCommand     = NVM_CMD_WRITELOCK;

+		WriteCommand     = XMEGA_NVM_CMD_WRITELOCK;

 		PagedMemory      = false;

 	}

 	

 	/* Send the appropriate memory write commands to the device, indicate timeout if occurred */

-	if ((PagedMemory && !NVMTarget_WritePageMemory(WriteBuffCommand, EraseBuffCommand, WriteCommand, 

+	if ((PagedMemory && !XMEGANVM_WritePageMemory(WriteBuffCommand, EraseBuffCommand, WriteCommand, 

 		                                           WriteMemory_XPROG_Params.PageMode, WriteMemory_XPROG_Params.Address,

 		                                           WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length)) ||

-	   (!PagedMemory && !NVMTarget_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address,

+	   (!PagedMemory && !XMEGANVM_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address,

 	                                               WriteMemory_XPROG_Params.ProgData)))

 	{

 		ReturnStatus = XPRG_ERR_TIMEOUT;

@@ -290,7 +290,7 @@ static void PDIProtocol_ReadMemory(void)
 	uint8_t ReadBuffer[256];

 	

 	/* Read the target's memory, indicate timeout if occurred */

-	if (!(NVMTarget_ReadMemory(ReadMemory_XPROG_Params.Address, ReadBuffer, ReadMemory_XPROG_Params.Length)))

+	if (!(XMEGANVM_ReadMemory(ReadMemory_XPROG_Params.Address, ReadBuffer, ReadMemory_XPROG_Params.Length)))

 	  ReturnStatus = XPRG_ERR_TIMEOUT;

 

 	Endpoint_Write_Byte(CMD_XPROG);

@@ -319,19 +319,19 @@ static void PDIProtocol_ReadCRC(void)
 	Endpoint_ClearOUT();

 	Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);

 	

-	uint8_t  CRCCommand = NVM_CMD_NOOP;

+	uint8_t  CRCCommand = XMEGA_NVM_CMD_NOOP;

 	uint32_t MemoryCRC;

 

 	/* Determine which NVM command to send to the device depending on the memory to CRC */

 	if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_APP)

-	  CRCCommand = NVM_CMD_APPCRC;

+	  CRCCommand = XMEGA_NVM_CMD_APPCRC;

 	else if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_BOOT)

-	  CRCCommand = NVM_CMD_BOOTCRC;

+	  CRCCommand = XMEGA_NVM_CMD_BOOTCRC;

 	else

-	  CRCCommand = NVM_CMD_FLASHCRC;

+	  CRCCommand = XMEGA_NVM_CMD_FLASHCRC;

 	

 	/* Perform and retrieve the memory CRC, indicate timeout if occurred */

-	if (!(NVMTarget_GetMemoryCRC(CRCCommand, &MemoryCRC)))

+	if (!(XMEGANVM_GetMemoryCRC(CRCCommand, &MemoryCRC)))

 	  ReturnStatus = XPRG_ERR_TIMEOUT;

 	

 	Endpoint_Write_Byte(CMD_XPROG);

diff --git a/Projects/AVRISP/Lib/TINYNVM.c b/Projects/AVRISP/Lib/TINYNVM.c
new file mode 100644
index 000000000..515e11385
--- /dev/null
+++ b/Projects/AVRISP/Lib/TINYNVM.c
@@ -0,0 +1,144 @@
+/*

+             LUFA Library

+     Copyright (C) Dean Camera, 2009.

+              

+  dean [at] fourwalledcubicle [dot] com

+      www.fourwalledcubicle.com

+*/

+

+/*

+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)

+

+  Permission to use, copy, modify, and distribute this software

+  and its documentation for any purpose and without fee is hereby

+  granted, provided that the above copyright notice appear in all

+  copies and that both that the copyright notice and this

+  permission notice and warranty disclaimer appear in supporting

+  documentation, and that the name of the author not be used in

+  advertising or publicity pertaining to distribution of the

+  software without specific, written prior permission.

+

+  The author disclaim all warranties with regard to this

+  software, including all implied warranties of merchantability

+  and fitness.  In no event shall the author be liable for any

+  special, indirect or consequential damages or any damages

+  whatsoever resulting from loss of use, data or profits, whether

+  in an action of contract, negligence or other tortious action,

+  arising out of or in connection with the use or performance of

+  this software.

+*/

+

+/** \file

+ *

+ *  Target-related functions for the TINY target's NVM module.

+ */

+

+#define  INCLUDE_FROM_TINYNVM_C

+#include "TINYNVM.h"

+

+#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)

+

+/** Sends the given NVM register address to the target.

+ *

+ *  \param[in] Register  NVM register whose absolute address is to be sent

+ */

+void TINYNVM_SendNVMRegAddress(const uint8_t Register)

+{

+	// TODO

+}

+

+/** Sends the given 32-bit absolute address to the target.

+ *

+ *  \param[in] AbsoluteAddress  Absolute address to send to the target

+ */

+void TINYNVM_SendAddress(const uint32_t AbsoluteAddress)

+{

+	// TODO

+}

+

+/** Waits while the target's NVM controller is busy performing an operation, exiting if the

+ *  timeout period expires.

+ *

+ *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise

+ */

+bool TINYNVM_WaitWhileNVMControllerBusy(void)

+{

+	// TODO

+	return false;

+}

+

+/** Retrieves the CRC value of the given memory space.

+ *

+ *  \param[in]  CRCCommand  NVM CRC command to issue to the target

+ *  \param[out] CRCDest     CRC Destination when read from the target

+ *

+ *  \return Boolean true if the command sequence complete successfully

+ */

+bool TINYNVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)

+{

+	// TODO

+	return true;

+}

+

+/** Reads memory from the target's memory spaces.

+ *

+ *  \param[in]  ReadAddress  Start address to read from within the target's address space

+ *  \param[out] ReadBuffer   Buffer to store read data into

+ *  \param[in]  ReadSize     Number of bytes to read

+ *

+ *  \return Boolean true if the command sequence complete successfully

+ */

+bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)

+{

+	// TODO

+	return true;

+}

+

+/** Writes byte addressed memory to the target's memory spaces.

+ *

+ *  \param[in]  WriteCommand  Command to send to the device to write each memory byte

+ *  \param[in]  WriteAddress  Start address to write to within the target's address space

+ *  \param[in]  WriteBuffer   Buffer to source data from

+ *

+ *  \return Boolean true if the command sequence complete successfully

+ */

+bool TINYNVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)

+{

+	// TODO

+	return true;

+}

+

+/** Writes page addressed memory to the target's memory spaces.

+ *

+ *  \param[in]  WriteBuffCommand  Command to send to the device to write a byte to the memory page buffer

+ *  \param[in]  EraseBuffCommand  Command to send to the device to erase the memory page buffer

+ *  \param[in]  WritePageCommand  Command to send to the device to write the page buffer to the destination memory

+ *  \param[in]  PageMode          Bitfield indicating what operations need to be executed on the specified page

+ *  \param[in]  WriteAddress      Start address to write the page data to within the target's address space

+ *  \param[in]  WriteBuffer       Buffer to source data from

+ *  \param[in]  WriteSize         Number of bytes to write

+ *

+ *  \return Boolean true if the command sequence complete successfully

+ */

+bool TINYNVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,

+                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,

+                               const uint8_t* WriteBuffer, const uint16_t WriteSize)

+{

+	// TODO

+	return true;

+}

+

+/** Erases a specific memory space of the target.

+ *

+ *  \param[in] EraseCommand  NVM erase command to send to the device

+ *  \param[in] Address  Address inside the memory space to erase

+ *

+ *  \return Boolean true if the command sequence complete successfully

+ */

+bool TINYNVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)

+{

+	// TODO

+	return true;

+}

+

+#endif

diff --git a/Projects/AVRISP/Lib/TINYNVM.h b/Projects/AVRISP/Lib/TINYNVM.h
new file mode 100644
index 000000000..585fce8c9
--- /dev/null
+++ b/Projects/AVRISP/Lib/TINYNVM.h
@@ -0,0 +1,73 @@
+/*

+             LUFA Library

+     Copyright (C) Dean Camera, 2009.

+              

+  dean [at] fourwalledcubicle [dot] com

+      www.fourwalledcubicle.com

+*/

+

+/*

+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)

+

+  Permission to use, copy, modify, and distribute this software

+  and its documentation for any purpose and without fee is hereby

+  granted, provided that the above copyright notice appear in all

+  copies and that both that the copyright notice and this

+  permission notice and warranty disclaimer appear in supporting

+  documentation, and that the name of the author not be used in

+  advertising or publicity pertaining to distribution of the

+  software without specific, written prior permission.

+

+  The author disclaim all warranties with regard to this

+  software, including all implied warranties of merchantability

+  and fitness.  In no event shall the author be liable for any

+  special, indirect or consequential damages or any damages

+  whatsoever resulting from loss of use, data or profits, whether

+  in an action of contract, negligence or other tortious action,

+  arising out of or in connection with the use or performance of

+  this software.

+*/

+

+/** \file

+ *

+ *  Header file for TINYNVM.c.

+ */

+

+#ifndef _TINY_NVM_

+#define _TINY_NVM_

+

+	/* Includes: */

+		#include <avr/io.h>

+		#include <avr/interrupt.h>

+		#include <stdbool.h>

+		

+		#include <LUFA/Common/Common.h>

+		

+		#include "TPITarget.h"

+	

+	/* Preprocessor Checks: */

+		#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))

+			#undef ENABLE_ISP_PROTOCOL

+			#undef ENABLE_TPI_PROTOCOL

+			

+			#if !defined(ENABLE_PDI_PROTOCOL)

+				#define ENABLE_PDI_PROTOCOL

+			#endif

+		#endif

+

+	/* Defines: */

+		#define TINY_NVM_BUSY_TIMEOUT_MS       200

+

+	/* Function Prototypes: */

+		void TINYNVM_SendNVMRegAddress(const uint8_t Register);

+		void TINYNVM_SendAddress(const uint32_t AbsoluteAddress);

+		bool TINYNVM_WaitWhileNVMControllerBusy(void);

+		bool TINYNVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);

+		bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);

+		bool TINYNVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);

+		bool TINYNVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,

+		                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,

+		                               const uint8_t* WriteBuffer, const uint16_t WriteSize);

+		bool TINYNVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);

+

+#endif

diff --git a/Projects/AVRISP/Lib/XMEGANVM.c b/Projects/AVRISP/Lib/XMEGANVM.c
index adf213bb4..ed8719c4e 100644
--- a/Projects/AVRISP/Lib/XMEGANVM.c
+++ b/Projects/AVRISP/Lib/XMEGANVM.c
@@ -30,11 +30,11 @@
 

 /** \file

  *

- *  Target-related functions for the target's NVM module.

+ *  Target-related functions for the XMEGA target's NVM module.

  */

 

-#define  INCLUDE_FROM_NVMTARGET_C

-#include "NVMTarget.h"

+#define  INCLUDE_FROM_XMEGA_NVM_C

+#include "XMEGANVM.h"

 

 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)

 

@@ -42,20 +42,20 @@
  *

  *  \param[in] Register  NVM register whose absolute address is to be sent

  */

-void NVMTarget_SendNVMRegAddress(const uint8_t Register)

+void XMEGANVM_SendNVMRegAddress(const uint8_t Register)

 {

 	/* Determine the absolute register address from the NVM base memory address and the NVM register address */

 	uint32_t Address = XPROG_Param_NVMBase | Register;

 

 	/* Send the calculated 32-bit address to the target, LSB first */

-	NVMTarget_SendAddress(Address);

+	XMEGANVM_SendAddress(Address);

 }

 

 /** Sends the given 32-bit absolute address to the target.

  *

  *  \param[in] AbsoluteAddress  Absolute address to send to the target

  */

-void NVMTarget_SendAddress(const uint32_t AbsoluteAddress)

+void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)

 {

 	/* Send the given 32-bit address to the target, LSB first */

 	PDITarget_SendByte(AbsoluteAddress &  0xFF);

@@ -69,19 +69,19 @@ void NVMTarget_SendAddress(const uint32_t AbsoluteAddress)
  *

  *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise

  */

-bool NVMTarget_WaitWhileNVMControllerBusy(void)

+bool XMEGANVM_WaitWhileNVMControllerBusy(void)

 {

 	TCNT0 = 0;

 	TIFR0 = (1 << OCF1A);

 			

-	uint8_t TimeoutMS = PDI_NVM_TIMEOUT_MS;

+	uint8_t TimeoutMS = XMEGA_NVM_BUSY_TIMEOUT_MS;

 	

 	/* Poll the NVM STATUS register while the NVM controller is busy */

 	while (TimeoutMS)

 	{

 		/* Send a LDS command to read the NVM STATUS register to check the BUSY flag */

 		PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));

-		NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);

+		XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);

 		

 		/* Check to see if the BUSY flag is still set */

 		if (!(PDITarget_ReceiveByte() & (1 << 7)))

@@ -104,20 +104,20 @@ bool NVMTarget_WaitWhileNVMControllerBusy(void)
  *

  *  \return Boolean true if the command sequence complete successfully

  */

-bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)

+bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)

 {

 	/* Wait until the NVM controller is no longer busy */

-	if (!(NVMTarget_WaitWhileNVMControllerBusy()))

+	if (!(XMEGANVM_WaitWhileNVMControllerBusy()))

 	  return false;

 	  

 	/* Set the NVM command to the correct CRC read command */

 	PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendNVMRegAddress(NVM_REG_CMD);

+	XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);

 	PDITarget_SendByte(CRCCommand);

 

 	/* Set CMDEX bit in NVM CTRLA register to start the CRC generation */

 	PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);

+	XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);

 	PDITarget_SendByte(1 << 0);

 

 	/* Wait until the NVM bus is ready again */

@@ -125,24 +125,24 @@ bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
 	  return false;

 

 	/* Wait until the NVM controller is no longer busy */

-	if (!(NVMTarget_WaitWhileNVMControllerBusy()))

+	if (!(XMEGANVM_WaitWhileNVMControllerBusy()))

 	  return false;

 	

 	*CRCDest = 0;

 	

 	/* Read the first generated CRC byte value */

 	PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);

+	XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);

 	*CRCDest  = PDITarget_ReceiveByte();

 

 	/* Read the second generated CRC byte value */

 	PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendNVMRegAddress(NVM_REG_DAT1);

+	XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT1);

 	*CRCDest |= ((uint16_t)PDITarget_ReceiveByte() << 8);

 

 	/* Read the third generated CRC byte value */

 	PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendNVMRegAddress(NVM_REG_DAT2);

+	XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT2);

 	*CRCDest |= ((uint32_t)PDITarget_ReceiveByte() << 16);

 	

 	return true;

@@ -156,20 +156,20 @@ bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
  *

  *  \return Boolean true if the command sequence complete successfully

  */

-bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)

+bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)

 {

 	/* Wait until the NVM controller is no longer busy */

-	if (!(NVMTarget_WaitWhileNVMControllerBusy()))

+	if (!(XMEGANVM_WaitWhileNVMControllerBusy()))

 	  return false;

 	

 	/* Send the READNVM command to the NVM controller for reading of an arbitrary location */

 	PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendNVMRegAddress(NVM_REG_CMD);

-	PDITarget_SendByte(NVM_CMD_READNVM);

+	XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);

+	PDITarget_SendByte(XMEGA_NVM_CMD_READNVM);

 

 	/* Load the PDI pointer register with the start address we want to read from */

 	PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);

-	NVMTarget_SendAddress(ReadAddress);

+	XMEGANVM_SendAddress(ReadAddress);

 

 	/* Send the REPEAT command with the specified number of bytes to read */

 	PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);

@@ -191,20 +191,20 @@ bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const
  *

  *  \return Boolean true if the command sequence complete successfully

  */

-bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)

+bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)

 {

 	/* Wait until the NVM controller is no longer busy */

-	if (!(NVMTarget_WaitWhileNVMControllerBusy()))

+	if (!(XMEGANVM_WaitWhileNVMControllerBusy()))

 	  return false;

 

 	/* Send the memory write command to the target */

 	PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendNVMRegAddress(NVM_REG_CMD);

+	XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);

 	PDITarget_SendByte(WriteCommand);

 	

 	/* Send new memory byte to the memory to the target */

 	PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendAddress(WriteAddress);

+	XMEGANVM_SendAddress(WriteAddress);

 	PDITarget_SendByte(*(WriteBuffer++));

 	

 	return true;

@@ -222,41 +222,41 @@ bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteA
  *

  *  \return Boolean true if the command sequence complete successfully

  */

-bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,

+bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,

                                const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,

                                const uint8_t* WriteBuffer, const uint16_t WriteSize)

 {

 	if (PageMode & XPRG_PAGEMODE_ERASE)

 	{

 		/* Wait until the NVM controller is no longer busy */

-		if (!(NVMTarget_WaitWhileNVMControllerBusy()))

+		if (!(XMEGANVM_WaitWhileNVMControllerBusy()))

 		  return false;

 

 		/* Send the memory buffer erase command to the target */

 		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-		NVMTarget_SendNVMRegAddress(NVM_REG_CMD);

+		XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);

 		PDITarget_SendByte(EraseBuffCommand);

 

 		/* Set CMDEX bit in NVM CTRLA register to start the buffer erase */

 		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-		NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);

+		XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);

 		PDITarget_SendByte(1 << 0);

 	}

 

 	if (WriteSize)

 	{

 		/* Wait until the NVM controller is no longer busy */

-		if (!(NVMTarget_WaitWhileNVMControllerBusy()))

+		if (!(XMEGANVM_WaitWhileNVMControllerBusy()))

 		  return false;

 

 		/* Send the memory buffer write command to the target */

 		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-		NVMTarget_SendNVMRegAddress(NVM_REG_CMD);

+		XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);

 		PDITarget_SendByte(WriteBuffCommand);

 

 		/* Load the PDI pointer register with the start address we want to write to */

 		PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);

-		NVMTarget_SendAddress(WriteAddress);

+		XMEGANVM_SendAddress(WriteAddress);

 

 		/* Send the REPEAT command with the specified number of bytes to write */

 		PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);

@@ -271,17 +271,17 @@ bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t Era
 	if (PageMode & XPRG_PAGEMODE_WRITE)

 	{

 		/* Wait until the NVM controller is no longer busy */

-		if (!(NVMTarget_WaitWhileNVMControllerBusy()))

+		if (!(XMEGANVM_WaitWhileNVMControllerBusy()))

 		  return false;

 

 		/* Send the memory write command to the target */

 		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-		NVMTarget_SendNVMRegAddress(NVM_REG_CMD);

+		XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);

 		PDITarget_SendByte(WritePageCommand);

 		

 		/* Send the address of the first page location to write the memory page */

 		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-		NVMTarget_SendAddress(WriteAddress);

+		XMEGANVM_SendAddress(WriteAddress);

 		PDITarget_SendByte(0x00);

 	}

 

@@ -295,30 +295,30 @@ bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t Era
  *

  *  \return Boolean true if the command sequence complete successfully

  */

-bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)

+bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)

 {

 	/* Wait until the NVM controller is no longer busy */

-	if (!(NVMTarget_WaitWhileNVMControllerBusy()))

+	if (!(XMEGANVM_WaitWhileNVMControllerBusy()))

 	  return false;

 	  

 	/* Send the memory erase command to the target */

 	PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-	NVMTarget_SendNVMRegAddress(NVM_REG_CMD);

+	XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);

 	PDITarget_SendByte(EraseCommand);

 	

 	/* Chip erase is handled separately, since it's procedure is different to other erase types */

-	if (EraseCommand == NVM_CMD_CHIPERASE)

+	if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)

 	{

 		/* Set CMDEX bit in NVM CTRLA register to start the chip erase */

 		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-		NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);

+		XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);

 		PDITarget_SendByte(1 << 0);		

 	}

 	else

 	{

 		/* Other erase modes just need us to address a byte within the target memory space */

 		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));

-		NVMTarget_SendAddress(Address);	

+		XMEGANVM_SendAddress(Address);	

 		PDITarget_SendByte(0x00);

 	}

 	

diff --git a/Projects/AVRISP/Lib/XMEGANVM.h b/Projects/AVRISP/Lib/XMEGANVM.h
index a8f3c493d..c31c7e8f1 100644
--- a/Projects/AVRISP/Lib/XMEGANVM.h
+++ b/Projects/AVRISP/Lib/XMEGANVM.h
@@ -30,11 +30,11 @@
 

 /** \file

  *

- *  Header file for NVMTarget.c.

+ *  Header file for XMEGANVM.c.

  */

 

-#ifndef _NVM_TARGET_

-#define _NVM_TARGET_

+#ifndef _XMEGA_NVM__

+#define _XMEGA_NVM_

 

 	/* Includes: */

 		#include <avr/io.h>

@@ -57,65 +57,65 @@
 		#endif

 

 	/* Defines: */

-		#define NVM_BUSY_TIMEOUT_MS            200

+		#define XMEGA_NVM_BUSY_TIMEOUT_MS            200

 		

-		#define NVM_REG_ADDR0                  0x00

-		#define NVM_REG_ADDR1                  0x01

-		#define NVM_REG_ADDR2                  0x02

-		#define NVM_REG_DAT0                   0x04

-		#define NVM_REG_DAT1                   0x05

-		#define NVM_REG_DAT2                   0x06

-		#define NVM_REG_CMD                    0x0A

-		#define NVM_REG_CTRLA                  0x0B

-		#define NVM_REG_CTRLB                  0x0C

-		#define NVM_REG_INTCTRL                0x0D

-		#define NVM_REG_STATUS                 0x0F

-		#define NVM_REG_LOCKBITS               0x10

+		#define XMEGA_NVM_REG_ADDR0                  0x00

+		#define XMEGA_NVM_REG_ADDR1                  0x01

+		#define XMEGA_NVM_REG_ADDR2                  0x02

+		#define XMEGA_NVM_REG_DAT0                   0x04

+		#define XMEGA_NVM_REG_DAT1                   0x05

+		#define XMEGA_NVM_REG_DAT2                   0x06

+		#define XMEGA_NVM_REG_CMD                    0x0A

+		#define XMEGA_NVM_REG_CTRLA                  0x0B

+		#define XMEGA_NVM_REG_CTRLB                  0x0C

+		#define XMEGA_NVM_REG_INTCTRL                0x0D

+		#define XMEGA_NVM_REG_STATUS                 0x0F

+		#define XMEGA_NVM_REG_LOCKBITS               0x10

 		

-		#define NVM_CMD_NOOP                   0x00

-		#define NVM_CMD_CHIPERASE              0x40

-		#define NVM_CMD_READNVM                0x43

-		#define NVM_CMD_LOADFLASHPAGEBUFF      0x23

-		#define NVM_CMD_ERASEFLASHPAGEBUFF     0x26

-		#define NVM_CMD_ERASEFLASHPAGE         0x2B

-		#define NVM_CMD_WRITEFLASHPAGE         0x2E

-		#define NVM_CMD_ERASEWRITEFLASH        0x2F

-		#define NVM_CMD_FLASHCRC               0x78

-		#define NVM_CMD_ERASEAPPSEC            0x20

-		#define NVM_CMD_ERASEAPPSECPAGE        0x22

-		#define NVM_CMD_WRITEAPPSECPAGE        0x24

-		#define NVM_CMD_ERASEWRITEAPPSECPAGE   0x25

-		#define NVM_CMD_APPCRC                 0x38

-		#define NVM_CMD_ERASEBOOTSEC           0x68

-		#define NVM_CMD_ERASEBOOTSECPAGE       0x2A

-		#define NVM_CMD_WRITEBOOTSECPAGE       0x2C

-		#define NVM_CMD_ERASEWRITEBOOTSECPAGE  0x2D

-		#define NVM_CMD_BOOTCRC                0x39

-		#define NVM_CMD_READUSERSIG            0x03

-		#define NVM_CMD_ERASEUSERSIG           0x18

-		#define NVM_CMD_WRITEUSERSIG           0x1A

-		#define NVM_CMD_READCALIBRATION        0x02

-		#define NVM_CMD_READFUSE               0x07

-		#define NVM_CMD_WRITEFUSE              0x4C

-		#define NVM_CMD_WRITELOCK              0x08

-		#define NVM_CMD_LOADEEPROMPAGEBUFF     0x33

-		#define NVM_CMD_ERASEEEPROMPAGEBUFF    0x36

-		#define NVM_CMD_ERASEEEPROM            0x30

-		#define NVM_CMD_ERASEEEPROMPAGE        0x32

-		#define NVM_CMD_WRITEEEPROMPAGE        0x34

-		#define NVM_CMD_ERASEWRITEEEPROMPAGE   0x35

-		#define NVM_CMD_READEEPROM             0x06

+		#define XMEGA_NVM_CMD_NOOP                   0x00

+		#define XMEGA_NVM_CMD_CHIPERASE              0x40

+		#define XMEGA_NVM_CMD_READNVM                0x43

+		#define XMEGA_NVM_CMD_LOADFLASHPAGEBUFF      0x23

+		#define XMEGA_NVM_CMD_ERASEFLASHPAGEBUFF     0x26

+		#define XMEGA_NVM_CMD_ERASEFLASHPAGE         0x2B

+		#define XMEGA_NVM_CMD_WRITEFLASHPAGE         0x2E

+		#define XMEGA_NVM_CMD_ERASEWRITEFLASH        0x2F

+		#define XMEGA_NVM_CMD_FLASHCRC               0x78

+		#define XMEGA_NVM_CMD_ERASEAPPSEC            0x20

+		#define XMEGA_NVM_CMD_ERASEAPPSECPAGE        0x22

+		#define XMEGA_NVM_CMD_WRITEAPPSECPAGE        0x24

+		#define XMEGA_NVM_CMD_ERASEWRITEAPPSECPAGE   0x25

+		#define XMEGA_NVM_CMD_APPCRC                 0x38

+		#define XMEGA_NVM_CMD_ERASEBOOTSEC           0x68

+		#define XMEGA_NVM_CMD_ERASEBOOTSECPAGE       0x2A

+		#define XMEGA_NVM_CMD_WRITEBOOTSECPAGE       0x2C

+		#define XMEGA_NVM_CMD_ERASEWRITEBOOTSECPAGE  0x2D

+		#define XMEGA_NVM_CMD_BOOTCRC                0x39

+		#define XMEGA_NVM_CMD_READUSERSIG            0x03

+		#define XMEGA_NVM_CMD_ERASEUSERSIG           0x18

+		#define XMEGA_NVM_CMD_WRITEUSERSIG           0x1A

+		#define XMEGA_NVM_CMD_READCALIBRATION        0x02

+		#define XMEGA_NVM_CMD_READFUSE               0x07

+		#define XMEGA_NVM_CMD_WRITEFUSE              0x4C

+		#define XMEGA_NVM_CMD_WRITELOCK              0x08

+		#define XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF     0x33

+		#define XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF    0x36

+		#define XMEGA_NVM_CMD_ERASEEEPROM            0x30

+		#define XMEGA_NVM_CMD_ERASEEEPROMPAGE        0x32

+		#define XMEGA_NVM_CMD_WRITEEEPROMPAGE        0x34

+		#define XMEGA_NVM_CMD_ERASEWRITEEEPROMPAGE   0x35

+		#define XMEGA_NVM_CMD_READEEPROM             0x06

 

 	/* Function Prototypes: */

-		void NVMTarget_SendNVMRegAddress(const uint8_t Register);

-		void NVMTarget_SendAddress(const uint32_t AbsoluteAddress);

-		bool NVMTarget_WaitWhileNVMControllerBusy(void);

-		bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);

-		bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);

-		bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);

-		bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,

-		                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,

-		                               const uint8_t* WriteBuffer, const uint16_t WriteSize);

-		bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);

+		void XMEGANVM_SendNVMRegAddress(const uint8_t Register);

+		void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress);

+		bool XMEGANVM_WaitWhileNVMControllerBusy(void);

+		bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);

+		bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);

+		bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);

+		bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,

+		                              const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,

+		                              const uint8_t* WriteBuffer, const uint16_t WriteSize);

+		bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);

 

 #endif

diff --git a/Projects/AVRISP/makefile b/Projects/AVRISP/makefile
index ce47b13a1..712d1c97c 100644
--- a/Projects/AVRISP/makefile
+++ b/Projects/AVRISP/makefile
@@ -135,6 +135,7 @@ SRC = $(TARGET).c                                                 \
 	  Lib/PDITarget.c                                             \

 	  Lib/XMEGANVM.c                                              \

 	  Lib/TPITarget.c                                             \

+	  Lib/TINYNVM.c                                               \

 	  $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/DevChapter9.c        \

 	  $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Endpoint.c           \

 	  $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Host.c               \