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authorDean Camera <dean@fourwalledcubicle.com>2010-05-26 06:15:05 +0000
committerDean Camera <dean@fourwalledcubicle.com>2010-05-26 06:15:05 +0000
commit9c037a952f5aaf78c4e13398506cfa2d588bb449 (patch)
treeee69e6a65a6d81851005c977deceded153d5c2af /Projects/XPLAINBridge/Lib/SoftUART.c
parent4a13a5484ae19974a46d3def668aa888d12b8f13 (diff)
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The RingBuff library code has been replaced in the XPLAINBridge project with an ultra lightweight buffer to help improve the reliability of the bridge.
Diffstat (limited to 'Projects/XPLAINBridge/Lib/SoftUART.c')
-rw-r--r--Projects/XPLAINBridge/Lib/SoftUART.c32
1 files changed, 10 insertions, 22 deletions
diff --git a/Projects/XPLAINBridge/Lib/SoftUART.c b/Projects/XPLAINBridge/Lib/SoftUART.c
index 194481d0e..5e589f3d7 100644
--- a/Projects/XPLAINBridge/Lib/SoftUART.c
+++ b/Projects/XPLAINBridge/Lib/SoftUART.c
@@ -32,34 +32,22 @@
#include "SoftUART.h"
-volatile uint8_t srx_done, stx_count;
-volatile uint8_t srx_data, srx_mask, srx_tmp, stx_data;
+volatile bool srx_done;
+volatile uint8_t stx_count;
+static uint8_t srx_data, srx_mask, srx_tmp, stx_data;
-uint8_t SoftUART_IsReady(void)
-{
- return !(stx_count);
-}
-
-uint8_t SoftUART_TxByte(uint8_t Byte)
+void SoftUART_TxByte(uint8_t Byte)
{
while (stx_count);
stx_data = ~Byte;
stx_count = 10;
-
- return Byte;
-}
-
-uint8_t SoftUART_IsReceived(void)
-{
- return srx_done;
}
uint8_t SoftUART_RxByte(void)
{
while (!(srx_done));
-
- srx_done = 0;
+ srx_done = false;
return srx_data;
}
@@ -74,9 +62,9 @@ void SoftUART_Init(void)
EIMSK = (1 << INT0); // enable INT0 interrupt
stx_count = 0; // nothing to send
- srx_done = 0; // nothing received
- STXPORT |= 1 << STX; // TX output
- STXDDR |= 1 << STX; // TX output
+ srx_done = false; // nothing received
+ STXPORT |= (1 << STX); // TX output
+ STXDDR |= (1 << STX); // TX output
SRXPORT |= (1 << SRX); // pullup on INT0
}
@@ -85,7 +73,7 @@ ISR(INT0_vect)
{
OCR2A = TCNT2 + (BIT_TIME / 8 * 3 / 2); // scan 1.5 bits after start
- srx_tmp = 0; // clear bit storage
+ srx_tmp = 0; // clear bit storage
srx_mask = 1; // bit mask
TIFR2 = (1 << OCF2A); // clear pending interrupt
@@ -111,7 +99,7 @@ ISR(TIMER2_COMPA_vect)
}
else
{
- srx_done = 1; // mark rx data valid
+ srx_done = true; // mark rx data valid
srx_data = srx_tmp; // store rx data
TIMSK2 = (1 << OCIE2B); // enable tx and wait for start
EIMSK |= (1 << INT0); // enable START irq