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4 files changed, 40 insertions, 36 deletions

diff --git a/LUFA/Platform/UC3/ClockManagement.h b/LUFA/Platform/UC3/ClockManagement.h
index bb5679ad9..ef2a1b56e 100644
--- a/LUFA/Platform/UC3/ClockManagement.h
+++ b/LUFA/Platform/UC3/ClockManagement.h
@@ -55,7 +55,7 @@
  *		{
  *			// Start the master external oscillator which will be used as the main clock reference
  *			AVR32CLK_StartExternalOscillator(0, EXOSC_MODE_8MHZ_OR_MORE, EXOSC_START_0CLK);
- *			
+ *
  *			// Start the PLL for the CPU clock, switch CPU to it
  *			AVR32CLK_StartPLL(0, CLOCK_SRC_OSC0, 12000000, F_CPU);
  *			AVR32CLK_SetCPUClockSource(CLOCK_SRC_PLL0, F_CPU);
@@ -88,7 +88,7 @@
 				EXOSC_MODE_900KHZ_MAX    = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0, /**< External crystal oscillator equal to or slower than 900KHz. */
 				EXOSC_MODE_3MHZ_MAX      = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1, /**< External crystal oscillator equal to or slower than 3MHz. */
 				EXOSC_MODE_8MHZ_MAX      = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2, /**< External crystal oscillator equal to or slower than 8MHz. */
-				EXOSC_MODE_8MHZ_OR_MORE  = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3, /**< External crystal oscillator equal to or faster than 8MHz. */		
+				EXOSC_MODE_8MHZ_OR_MORE  = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3, /**< External crystal oscillator equal to or faster than 8MHz. */
 			};
 
 			/** Enum for the possible external oscillator statup times. */
@@ -102,7 +102,7 @@
 				EXOSC_START_8192CLK      = AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC,  /**< Wait 8192 clock cyles before startup for stability. */
 				EXOSC_START_16384CLK     = AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC, /**< Wait 16384 clock cyles before startup for stability. */
 			};
-			
+
 			/** Enum for the possible module clock sources. */
 			enum UC3_System_ClockSource_t
 			{
@@ -182,7 +182,7 @@
 			{
 				if (SourceFreq > Frequency)
 				  return false;
-			
+
 				switch (Source)
 				{
 					case CLOCK_SRC_OSC0:
@@ -212,7 +212,7 @@
 			{
 				AVR32_PM.PLL[Channel].pllen = false;
 			}
-			
+
 			/** Starts the given Generic Clock of the UC3 microcontroller, with the given options.
 			 *
 			 *  \param[in] Channel     Index of the Generic Clock to start.
@@ -252,17 +252,17 @@
 					default:
 						return false;
 				}
-				
+
 				if (SourceFreq < Frequency)
 				  return false;
 
 				AVR32_PM.GCCTRL[Channel].diven = (SourceFreq > Frequency) ? true : false;
 				AVR32_PM.GCCTRL[Channel].div   = (((SourceFreq / Frequency) - 1) / 2);
 				AVR32_PM.GCCTRL[Channel].cen   = true;
-				
+
 				return true;
 			}
-			
+
 			/** Stops the given generic clock of the UC3 microcontroller.
 			 *
 			 *  \param[in] Channel  Index of the generic clock to stop.
@@ -272,7 +272,7 @@
 			{
 				AVR32_PM.GCCTRL[Channel].cen = false;
 			}
-			
+
 			/** Sets the clock source for the main microcontroller core. The given clock source should be configured
 			 *  and ready for use before this function is called.
 			 *
@@ -310,7 +310,7 @@
 					default:
 						return false;
 				}
-				
+
 				return true;
 			}
 
@@ -322,3 +322,4 @@
 #endif
 
 /** @} */
+
diff --git a/LUFA/Platform/UC3/InterruptManagement.c b/LUFA/Platform/UC3/InterruptManagement.c
index 98d1e45f5..ce2a8199c 100644
--- a/LUFA/Platform/UC3/InterruptManagement.c
+++ b/LUFA/Platform/UC3/InterruptManagement.c
@@ -60,3 +60,4 @@ void INTC_Init(void)
 
 	__builtin_mtsr(AVR32_EVBA, (uintptr_t)&EVBA_Table);
 }
+
diff --git a/LUFA/Platform/UC3/InterruptManagement.h b/LUFA/Platform/UC3/InterruptManagement.h
index dd70675c3..6bd7f0ad4 100644
--- a/LUFA/Platform/UC3/InterruptManagement.h
+++ b/LUFA/Platform/UC3/InterruptManagement.h
@@ -137,7 +137,7 @@
 				InterruptHandlers[GroupNumber] = Handler;
 				AVR32_INTC.ipr[GroupNumber]    = Autovector_Table[InterruptLevel];
 			}
-			
+
 			/** Retrieves the pending interrupts for a given interrupt group. The result of this function should be masked
 			 *  against interrupt request indexes converted to a request line number via the \ref INTC_IRQ_LINE() macro. To
 			 *  obtain the group number of a given interrupt request, use the \ref INTC_IRQ_GROUP() macro.
@@ -151,7 +151,7 @@
 			{
 				return AVR32_INTC.irr[GroupNumber];
 			}
-	
+
 	/* Disable C linkage for C++ Compilers: */
 		#if defined(__cplusplus)
 			}
@@ -160,3 +160,4 @@
 #endif
 
 /** @} */
+
diff --git a/LUFA/Platform/XMEGA/ClockManagement.h b/LUFA/Platform/XMEGA/ClockManagement.h
index 1305d0e4b..20606a116 100644
--- a/LUFA/Platform/XMEGA/ClockManagement.h
+++ b/LUFA/Platform/XMEGA/ClockManagement.h
@@ -50,13 +50,13 @@
  *  Usage Example:
  *  \code
  *   	#include <LUFA/Platform/XMEGA/ClockManagement.h>
- *   	
+ *
  *   	void main(void)
  *   	{
  *   		// Start the PLL to multiply the 2MHz RC oscillator to 32MHz and switch the CPU core to run from it
  *   		XMEGACLK_StartPLL(CLOCK_SRC_INT_RC2MHZ, 2000000, 32000000);
  *   		XMEGACLK_SetCPUClockSource(CLOCK_SRC_PLL, F_CPU);
- *   	
+ *
  *   		// Start the 32MHz internal RC oscillator and start the DFLL to increase it to 48MHz using the USB SOF as a reference
  *   		XMEGACLK_StartInternalOscillator(CLOCK_SRC_INT_RC32MHZ);
  *   		XMEGACLK_StartDFLL(CLOCK_SRC_INT_RC32MHZ, DFLL_REF_INT_USBSOF, 48000000);
@@ -85,7 +85,7 @@
 				EXOSC_FREQ_2MHZ_MAX      = OSC_FRQRANGE_04TO2_gc,  /**< External crystal oscillator equal to or slower than 2MHz. */
 				EXOSC_FREQ_9MHZ_MAX      = OSC_FRQRANGE_2TO9_gc,   /**< External crystal oscillator equal to or slower than 9MHz. */
 				EXOSC_FREQ_12MHZ_MAX     = OSC_FRQRANGE_9TO12_gc,  /**< External crystal oscillator equal to or slower than 12MHz. */
-				EXOSC_FREQ_16MHZ_MAX     = OSC_FRQRANGE_12TO16_gc, /**< External crystal oscillator equal to or slower than 16MHz. */	
+				EXOSC_FREQ_16MHZ_MAX     = OSC_FRQRANGE_12TO16_gc, /**< External crystal oscillator equal to or slower than 16MHz. */
 			};
 
 			/** Enum for the possible external oscillator statup times. */
@@ -97,7 +97,7 @@
 				EXOSC_START_1KCLK        = OSC_XOSCSEL_XTAL_1KCLK_gc,  /**< Wait 1K clock cycles before startup. */
 				EXOSC_START_16KCLK       = OSC_XOSCSEL_XTAL_16KCLK_gc, /**< Wait 16K clock cycles before startup. */
 			};
-			
+
 			/** Enum for the possible module clock sources. */
 			enum XMEGA_System_ClockSource_t
 			{
@@ -132,8 +132,8 @@
 			{
 				OSC.XOSCCTRL  = (FreqRange | ((Startup == EXOSC_START_32KCLK) ? OSC_X32KLPM_bm : 0) | Startup);
 				OSC.CTRL     |= OSC_XOSCEN_bm;
-				
-				while (!(OSC.STATUS & OSC_XOSCRDY_bm));				
+
+				while (!(OSC.STATUS & OSC_XOSCRDY_bm));
 				return true;
 			}
 
@@ -162,14 +162,14 @@
 						return true;
 					case CLOCK_SRC_INT_RC32MHZ:
 						OSC.CTRL |= OSC_RC32MEN_bm;
-						while (!(OSC.STATUS & OSC_RC32MRDY_bm));					
+						while (!(OSC.STATUS & OSC_RC32MRDY_bm));
 						return true;
 					case CLOCK_SRC_INT_RC32KHZ:
 						OSC.CTRL |= OSC_RC32KEN_bm;
-						while (!(OSC.STATUS & OSC_RC32KRDY_bm));					
+						while (!(OSC.STATUS & OSC_RC32KRDY_bm));
 						return true;
 				}
-			
+
 				return false;
 			}
 
@@ -178,7 +178,7 @@
 			 *  \param[in] Source  Internal oscillator to stop, a value from \ref XMEGA_System_ClockSource_t.
 			 *
 			 *  \return Boolean \c true if the internal oscillator was successfully stopped, \c false if invalid parameters specified.
-			 */			
+			 */
 			static inline bool XMEGACLK_StopInternalOscillator(const uint8_t Source) ATTR_ALWAYS_INLINE;
 			static inline bool XMEGACLK_StopInternalOscillator(const uint8_t Source)
 			{
@@ -194,7 +194,7 @@
 						OSC.CTRL &= ~OSC_RC32KEN_bm;
 						return true;
 				}
-			
+
 				return false;
 			}
 
@@ -216,10 +216,10 @@
 			                                     const uint32_t Frequency)
 			{
 				uint8_t MulFactor = (Frequency / SourceFreq);
-				
+
 				if (SourceFreq > Frequency)
-				  return false;				
-			
+				  return false;
+
 				switch (Source)
 				{
 					case CLOCK_SRC_INT_RC2MHZ:
@@ -236,7 +236,7 @@
 				}
 
 				OSC.CTRL |= OSC_PLLEN_bm;
-				
+
 				while (!(OSC.STATUS & OSC_PLLRDY_bm));
 				return true;
 			}
@@ -247,7 +247,7 @@
 			{
 				OSC.CTRL &= ~OSC_PLLEN_bm;
 			}
-			
+
 			/** Starts the DFLL of the XMEGA microcontroller, with the given options.
 			 *
 			 *  \param[in] Source     RC Clock source for the DFLL, a value from \ref XMEGA_System_ClockSource_t.
@@ -264,7 +264,7 @@
 			                                      const uint32_t Frequency)
 			{
 				uint16_t DFLLCompare = (Frequency / 1000);
-				
+
 				switch (Source)
 				{
 					case CLOCK_SRC_INT_RC2MHZ:
@@ -291,7 +291,7 @@
 					default:
 						return false;
 				}
-				
+
 				return true;
 			}
 
@@ -315,7 +315,7 @@
 					default:
 						return false;
 				}
-				
+
 				return true;
 			}
 
@@ -333,7 +333,7 @@
 			                                              const uint32_t SourceFreq)
 			{
 				uint8_t ClockSourceMask = 0;
-			
+
 				switch (Source)
 				{
 					case CLOCK_SRC_INT_RC2MHZ:
@@ -354,16 +354,16 @@
 					default:
 						return false;
 				}
-				
+
 				uint_reg_t CurrentGlobalInt = GetGlobalInterruptMask();
 				GlobalInterruptDisable();
 
 				CCP      = CCP_IOREG_gc;
 				CLK_CTRL = ClockSourceMask;
-				
+
 				SetGlobalInterruptMask(CurrentGlobalInt);
-				
-				Delay_MS(1);				
+
+				Delay_MS(1);
 				return (CLK.CTRL == ClockSourceMask);
 			}
 
@@ -375,3 +375,4 @@
 #endif
 
 /** @} */
+