aboutsummaryrefslogtreecommitdiffstats
path: root/googlemock/scripts/gmock_doctor.py
blob: 74992bc744810745c72ddd8bc20d9815af3c2abd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
#!/usr/bin/env python
#
# Copyright 2008, Google Inc.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
#     * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#     * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following disclaimer
# in the documentation and/or other materials provided with the
# distribution.
#     * Neither the name of Google Inc. nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

"""Converts compiler's errors in code using Google Mock to plain English."""

__author__ = 'wan@google.com (Zhanyong Wan)'

import re
import sys

_VERSION = '1.0.3'

_EMAIL = 'googlemock@googlegroups.com'

_COMMON_GMOCK_SYMBOLS = [
    # Matchers
    '_',
    'A',
    'AddressSatisfies',
    'AllOf',
    'An',
    'AnyOf',
    'ContainerEq',
    'Contains',
    'ContainsRegex',
    'DoubleEq',
    'ElementsAre',
    'ElementsAreArray',
    'EndsWith',
    'Eq',
    'Field',
    'FloatEq',
    'Ge',
    'Gt',
    'HasSubstr',
    'IsInitializedProto',
    'Le',
    'Lt',
    'MatcherCast',
    'Matches',
    'MatchesRegex',
    'NanSensitiveDoubleEq',
    'NanSensitiveFloatEq',
    'Ne',
    'Not',
    'NotNull',
    'Pointee',
    'Property',
    'Ref',
    'ResultOf',
    'SafeMatcherCast',
    'StartsWith',
    'StrCaseEq',
    'StrCaseNe',
    'StrEq',
    'StrNe',
    'Truly',
    'TypedEq',
    'Value',

    # Actions
    'Assign',
    'ByRef',
    'DeleteArg',
    'DoAll',
    'DoDefault',
    'IgnoreResult',
    'Invoke',
    'InvokeArgument',
    'InvokeWithoutArgs',
    'Return',
    'ReturnNew',
    'ReturnNull',
    'ReturnRef',
    'SaveArg',
    'SetArgReferee',
    'SetArgPointee',
    'SetArgumentPointee',
    'SetArrayArgument',
    'SetErrnoAndReturn',
    'Throw',
    'WithArg',
    'WithArgs',
    'WithoutArgs',

    # Cardinalities
    'AnyNumber',
    'AtLeast',
    'AtMost',
    'Between',
    'Exactly',

    # Sequences
    'InSequence',
    'Sequence',

    # Misc
    'DefaultValue',
    'Mock',
    ]

# Regex for matching source file path and line number in the compiler's errors.
_GCC_FILE_LINE_RE = r'(?P<file>.*):(?P<line>\d+):(\d+:)?\s+'
_CLANG_FILE_LINE_RE = r'(?P<file>.*):(?P<line>\d+):(?P<column>\d+):\s+'
_CLANG_NON_GMOCK_FILE_LINE_RE = (
    r'(?P<file>.*[/\\^](?!gmock-)[^/\\]+):(?P<line>\d+):(?P<column>\d+):\s+')


def _FindAllMatches(regex, s):
  """Generates all matches of regex in string s."""

  r = re.compile(regex)
  return r.finditer(s)


def _GenericDiagnoser(short_name, long_name, diagnoses, msg):
  """Diagnoses the given disease by pattern matching.

  Can provide different diagnoses for different patterns.

  Args:
    short_name: Short name of the disease.
    long_name:  Long name of the disease.
    diagnoses:  A list of pairs (regex, pattern for formatting the diagnosis
                for matching regex).
    msg:        Compiler's error messages.
  Yields:
    Tuples of the form
      (short name of disease, long name of disease, diagnosis).
  """
  for regex, diagnosis in diagnoses:
    if re.search(regex, msg):
      diagnosis = '%(file)s:%(line)s:' + diagnosis
      for m in _FindAllMatches(regex, msg):
        yield (short_name, long_name, diagnosis % m.groupdict())


def _NeedToReturnReferenceDiagnoser(msg):
  """Diagnoses the NRR disease, given the error messages by the compiler."""

  gcc_regex = (r'In member function \'testing::internal::ReturnAction<R>.*\n'
               + _GCC_FILE_LINE_RE + r'instantiated from here\n'
               r'.*gmock-actions\.h.*error: creating array with negative size')
  clang_regex = (r'error:.*array.*negative.*\r?\n'
                 r'(.*\n)*?' +
                 _CLANG_NON_GMOCK_FILE_LINE_RE +
                 r'note: in instantiation of function template specialization '
                 r'\'testing::internal::ReturnAction<(?P<type>.*)>'
                 r'::operator Action<.*>\' requested here')
  clang11_re = (r'use_ReturnRef_instead_of_Return_to_return_a_reference.*'
                r'(.*\n)*?' + _CLANG_NON_GMOCK_FILE_LINE_RE)

  diagnosis = """
You are using a Return() action in a function that returns a reference to
%(type)s.  Please use ReturnRef() instead."""
  return _GenericDiagnoser('NRR', 'Need to Return Reference',
                           [(clang_regex, diagnosis),
                            (clang11_re, diagnosis % {'type': 'a type'}),
                            (gcc_regex, diagnosis % {'type': 'a type'})],
                           msg)


def _NeedToReturnSomethingDiagnoser(msg):
  """Diagnoses the NRS disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE + r'(instantiated from here\n.'
               r'*gmock.*actions\.h.*error: void value not ignored)'
               r'|(error: control reaches end of non-void function)')
  clang_regex1 = (_CLANG_FILE_LINE_RE +
                  r'error: cannot initialize return object '
                  r'of type \'Result\' \(aka \'(?P<return_type>.*)\'\) '
                  r'with an rvalue of type \'void\'')
  clang_regex2 = (_CLANG_FILE_LINE_RE +
                  r'error: cannot initialize return object '
                  r'of type \'(?P<return_type>.*)\' '
                  r'with an rvalue of type \'void\'')
  diagnosis = """
You are using an action that returns void, but it needs to return
%(return_type)s.  Please tell it *what* to return.  Perhaps you can use
the pattern DoAll(some_action, Return(some_value))?"""
  return _GenericDiagnoser(
      'NRS',
      'Need to Return Something',
      [(gcc_regex, diagnosis % {'return_type': '*something*'}),
       (clang_regex1, diagnosis),
       (clang_regex2, diagnosis)],
      msg)


def _NeedToReturnNothingDiagnoser(msg):
  """Diagnoses the NRN disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE + r'instantiated from here\n'
               r'.*gmock-actions\.h.*error: instantiation of '
               r'\'testing::internal::ReturnAction<R>::Impl<F>::value_\' '
               r'as type \'void\'')
  clang_regex1 = (r'error: field has incomplete type '
                  r'\'Result\' \(aka \'void\'\)(\r)?\n'
                  r'(.*\n)*?' +
                  _CLANG_NON_GMOCK_FILE_LINE_RE + r'note: in instantiation '
                  r'of function template specialization '
                  r'\'testing::internal::ReturnAction<(?P<return_type>.*)>'
                  r'::operator Action<void \(.*\)>\' requested here')
  clang_regex2 = (r'error: field has incomplete type '
                  r'\'Result\' \(aka \'void\'\)(\r)?\n'
                  r'(.*\n)*?' +
                  _CLANG_NON_GMOCK_FILE_LINE_RE + r'note: in instantiation '
                  r'of function template specialization '
                  r'\'testing::internal::DoBothAction<.*>'
                  r'::operator Action<(?P<return_type>.*) \(.*\)>\' '
                  r'requested here')
  diagnosis = """
You are using an action that returns %(return_type)s, but it needs to return
void.  Please use a void-returning action instead.

All actions but the last in DoAll(...) must return void.  Perhaps you need
to re-arrange the order of actions in a DoAll(), if you are using one?"""
  return _GenericDiagnoser(
      'NRN',
      'Need to Return Nothing',
      [(gcc_regex, diagnosis % {'return_type': '*something*'}),
       (clang_regex1, diagnosis),
       (clang_regex2, diagnosis)],
      msg)


def _IncompleteByReferenceArgumentDiagnoser(msg):
  """Diagnoses the IBRA disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE + r'instantiated from here\n'
               r'.*gtest-printers\.h.*error: invalid application of '
               r'\'sizeof\' to incomplete type \'(?P<type>.*)\'')

  clang_regex = (r'.*gtest-printers\.h.*error: invalid application of '
                 r'\'sizeof\' to an incomplete type '
                 r'\'(?P<type>.*)( const)?\'\r?\n'
                 r'(.*\n)*?' +
                 _CLANG_NON_GMOCK_FILE_LINE_RE +
                 r'note: in instantiation of member function '
                 r'\'testing::internal2::TypeWithoutFormatter<.*>::'
                 r'PrintValue\' requested here')
  diagnosis = """
In order to mock this function, Google Mock needs to see the definition
of type "%(type)s" - declaration alone is not enough.  Either #include
the header that defines it, or change the argument to be passed
by pointer."""

  return _GenericDiagnoser('IBRA', 'Incomplete By-Reference Argument Type',
                           [(gcc_regex, diagnosis),
                            (clang_regex, diagnosis)],
                           msg)


def _OverloadedFunctionMatcherDiagnoser(msg):
  """Diagnoses the OFM disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE + r'error: no matching function for '
               r'call to \'Truly\(<unresolved overloaded function type>\)')
  clang_regex = (_CLANG_FILE_LINE_RE + r'error: no matching function for '
                 r'call to \'Truly')
  diagnosis = """
The argument you gave to Truly() is an overloaded function.  Please tell
your compiler which overloaded version you want to use.

For example, if you want to use the version whose signature is
  bool Foo(int n);
you should write
  Truly(static_cast<bool (*)(int n)>(Foo))"""
  return _GenericDiagnoser('OFM', 'Overloaded Function Matcher',
                           [(gcc_regex, diagnosis),
                            (clang_regex, diagnosis)],
                           msg)


def _OverloadedFunctionActionDiagnoser(msg):
  """Diagnoses the OFA disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE + r'error: no matching function for call to '
               r'\'Invoke\(<unresolved overloaded function type>')
  clang_regex = (_CLANG_FILE_LINE_RE + r'error: no matching '
                 r'function for call to \'Invoke\'\r?\n'
                 r'(.*\n)*?'
                 r'.*\bgmock-generated-actions\.h:\d+:\d+:\s+'
                 r'note: candidate template ignored:\s+'
                 r'couldn\'t infer template argument \'FunctionImpl\'')
  diagnosis = """
Function you are passing to Invoke is overloaded.  Please tell your compiler
which overloaded version you want to use.

For example, if you want to use the version whose signature is
  bool MyFunction(int n, double x);
you should write something like
  Invoke(static_cast<bool (*)(int n, double x)>(MyFunction))"""
  return _GenericDiagnoser('OFA', 'Overloaded Function Action',
                           [(gcc_regex, diagnosis),
                            (clang_regex, diagnosis)],
                           msg)


def _OverloadedMethodActionDiagnoser(msg):
  """Diagnoses the OMA disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE + r'error: no matching function for '
               r'call to \'Invoke\(.+, <unresolved overloaded function '
               r'type>\)')
  clang_regex = (_CLANG_FILE_LINE_RE + r'error: no matching function '
                 r'for call to \'Invoke\'\r?\n'
                 r'(.*\n)*?'
                 r'.*\bgmock-generated-actions\.h:\d+:\d+: '
                 r'note: candidate function template not viable: '
                 r'requires .*, but 2 (arguments )?were provided')
  diagnosis = """
The second argument you gave to Invoke() is an overloaded method.  Please
tell your compiler which overloaded version you want to use.

For example, if you want to use the version whose signature is
  class Foo {
    ...
    bool Bar(int n, double x);
  };
you should write something like
  Invoke(foo, static_cast<bool (Foo::*)(int n, double x)>(&Foo::Bar))"""
  return _GenericDiagnoser('OMA', 'Overloaded Method Action',
                           [(gcc_regex, diagnosis),
                            (clang_regex, diagnosis)],
                           msg)


def _MockObjectPointerDiagnoser(msg):
  """Diagnoses the MOP disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE + r'error: request for member '
               r'\'gmock_(?P<method>.+)\' in \'(?P<mock_object>.+)\', '
               r'which is of non-class type \'(.*::)*(?P<class_name>.+)\*\'')
  clang_regex = (_CLANG_FILE_LINE_RE + r'error: member reference type '
                 r'\'(?P<class_name>.*?) *\' is a pointer; '
                 r'(did you mean|maybe you meant) to use \'->\'\?')
  diagnosis = """
The first argument to ON_CALL() and EXPECT_CALL() must be a mock *object*,
not a *pointer* to it.  Please write '*(%(mock_object)s)' instead of
'%(mock_object)s' as your first argument.

For example, given the mock class:

  class %(class_name)s : public ... {
    ...
    MOCK_METHOD0(%(method)s, ...);
  };

and the following mock instance:

  %(class_name)s* mock_ptr = ...

you should use the EXPECT_CALL like this:

  EXPECT_CALL(*mock_ptr, %(method)s(...));"""

  return _GenericDiagnoser(
      'MOP',
      'Mock Object Pointer',
      [(gcc_regex, diagnosis),
       (clang_regex, diagnosis % {'mock_object': 'mock_object',
                                  'method': 'method',
                                  'class_name': '%(class_name)s'})],
       msg)


def _NeedToUseSymbolDiagnoser(msg):
  """Diagnoses the NUS disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE + r'error: \'(?P<symbol>.+)\' '
               r'(was not declared in this scope|has not been declared)')
  clang_regex = (_CLANG_FILE_LINE_RE +
                 r'error: (use of undeclared identifier|unknown type name|'
                 r'no template named) \'(?P<symbol>[^\']+)\'')
  diagnosis = """
'%(symbol)s' is defined by Google Mock in the testing namespace.
Did you forget to write
  using testing::%(symbol)s;
?"""
  for m in (list(_FindAllMatches(gcc_regex, msg)) +
            list(_FindAllMatches(clang_regex, msg))):
    symbol = m.groupdict()['symbol']
    if symbol in _COMMON_GMOCK_SYMBOLS:
      yield ('NUS', 'Need to Use Symbol', diagnosis % m.groupdict())


def _NeedToUseReturnNullDiagnoser(msg):
  """Diagnoses the NRNULL disease, given the error messages by the compiler."""

  gcc_regex = ('instantiated from \'testing::internal::ReturnAction<R>'
               '::operator testing::Action<Func>\(\) const.*\n' +
               _GCC_FILE_LINE_RE + r'instantiated from here\n'
               r'.*error: no matching function for call to \'ImplicitCast_\('
               r'(:?long )?int&\)')
  clang_regex = (r'\bgmock-actions.h:.* error: no matching function for '
                 r'call to \'ImplicitCast_\'\r?\n'
                 r'(.*\n)*?' +
                 _CLANG_NON_GMOCK_FILE_LINE_RE + r'note: in instantiation '
                 r'of function template specialization '
                 r'\'testing::internal::ReturnAction<(int|long)>::operator '
                 r'Action<(?P<type>.*)\(\)>\' requested here')
  diagnosis = """
You are probably calling Return(NULL) and the compiler isn't sure how to turn
NULL into %(type)s. Use ReturnNull() instead.
Note: the line number may be off; please fix all instances of Return(NULL)."""
  return _GenericDiagnoser(
      'NRNULL', 'Need to use ReturnNull',
      [(clang_regex, diagnosis),
       (gcc_regex, diagnosis % {'type': 'the right type'})],
      msg)


def _TypeInTemplatedBaseDiagnoser(msg):
  """Diagnoses the TTB disease, given the error messages by the compiler."""

  # This version works when the type is used as the mock function's return
  # type.
  gcc_4_3_1_regex_type_in_retval = (
      r'In member function \'int .*\n' + _GCC_FILE_LINE_RE +
      r'error: a function call cannot appear in a constant-expression')
  gcc_4_4_0_regex_type_in_retval = (
      r'error: a function call cannot appear in a constant-expression'
      + _GCC_FILE_LINE_RE + r'error: template argument 1 is invalid\n')
  # This version works when the type is used as the mock function's sole
  # parameter type.
  gcc_regex_type_of_sole_param = (
      _GCC_FILE_LINE_RE +
      r'error: \'(?P<type>.+)\' was not declared in this scope\n'
      r'.*error: template argument 1 is invalid\n')
  # This version works when the type is used as a parameter of a mock
  # function that has multiple parameters.
  gcc_regex_type_of_a_param = (
      r'error: expected `;\' before \'::\' token\n'
      + _GCC_FILE_LINE_RE +
      r'error: \'(?P<type>.+)\' was not declared in this scope\n'
      r'.*error: template argument 1 is invalid\n'
      r'.*error: \'.+\' was not declared in this scope')
  clang_regex_type_of_retval_or_sole_param = (
      _CLANG_FILE_LINE_RE +
      r'error: use of undeclared identifier \'(?P<type>.*)\'\n'
      r'(.*\n)*?'
      r'(?P=file):(?P=line):\d+: error: '
      r'non-friend class member \'Result\' cannot have a qualified name'
      )
  clang_regex_type_of_a_param = (
      _CLANG_FILE_LINE_RE +
      r'error: C\+\+ requires a type specifier for all declarations\n'
      r'(.*\n)*?'
      r'(?P=file):(?P=line):(?P=column): error: '
      r'C\+\+ requires a type specifier for all declarations'
      )
  clang_regex_unknown_type = (
      _CLANG_FILE_LINE_RE +
      r'error: unknown type name \'(?P<type>[^\']+)\''
      )

  diagnosis = """
In a mock class template, types or typedefs defined in the base class
template are *not* automatically visible.  This is how C++ works.  Before
you can use a type or typedef named %(type)s defined in base class Base<T>, you
need to make it visible.  One way to do it is:

  typedef typename Base<T>::%(type)s %(type)s;"""

  for diag in _GenericDiagnoser(
      'TTB', 'Type in Template Base',
      [(gcc_4_3_1_regex_type_in_retval, diagnosis % {'type': 'Foo'}),
       (gcc_4_4_0_regex_type_in_retval, diagnosis % {'type': 'Foo'}),
       (gcc_regex_type_of_sole_param, diagnosis),
       (gcc_regex_type_of_a_param, diagnosis),
       (clang_regex_type_of_retval_or_sole_param, diagnosis),
       (clang_regex_type_of_a_param, diagnosis % {'type': 'Foo'})],
      msg):
    yield diag
  # Avoid overlap with the NUS pattern.
  for m in _FindAllMatches(clang_regex_unknown_type, msg):
    type_ = m.groupdict()['type']
    if type_ not in _COMMON_GMOCK_SYMBOLS:
      yield ('TTB', 'Type in Template Base', diagnosis % m.groupdict())


def _WrongMockMethodMacroDiagnoser(msg):
  """Diagnoses the WMM disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE +
               r'.*this_method_does_not_take_(?P<wrong_args>\d+)_argument.*\n'
               r'.*\n'
               r'.*candidates are.*FunctionMocker<[^>]+A(?P<args>\d+)\)>')
  clang_regex = (_CLANG_NON_GMOCK_FILE_LINE_RE +
                 r'error:.*array.*negative.*r?\n'
                 r'(.*\n)*?'
                 r'(?P=file):(?P=line):(?P=column): error: too few arguments '
                 r'to function call, expected (?P<args>\d+), '
                 r'have (?P<wrong_args>\d+)')
  clang11_re = (_CLANG_NON_GMOCK_FILE_LINE_RE +
                r'.*this_method_does_not_take_'
                r'(?P<wrong_args>\d+)_argument.*')
  diagnosis = """
You are using MOCK_METHOD%(wrong_args)s to define a mock method that has
%(args)s arguments. Use MOCK_METHOD%(args)s (or MOCK_CONST_METHOD%(args)s,
MOCK_METHOD%(args)s_T, MOCK_CONST_METHOD%(args)s_T as appropriate) instead."""
  return _GenericDiagnoser('WMM', 'Wrong MOCK_METHODn Macro',
                           [(gcc_regex, diagnosis),
                            (clang11_re, diagnosis % {'wrong_args': 'm',
                                                      'args': 'n'}),
                            (clang_regex, diagnosis)],
                           msg)


def _WrongParenPositionDiagnoser(msg):
  """Diagnoses the WPP disease, given the error messages by the compiler."""

  gcc_regex = (_GCC_FILE_LINE_RE +
               r'error:.*testing::internal::MockSpec<.* has no member named \''
               r'(?P<method>\w+)\'')
  clang_regex = (_CLANG_NON_GMOCK_FILE_LINE_RE +
                 r'error: no member named \'(?P<method>\w+)\' in '
                 r'\'testing::internal::MockSpec<.*>\'')
  diagnosis = """
The closing parenthesis of ON_CALL or EXPECT_CALL should be *before*
".%(method)s".  For example, you should write:
  EXPECT_CALL(my_mock, Foo(_)).%(method)s(...);
instead of:
  EXPECT_CALL(my_mock, Foo(_).%(method)s(...));"""
  return _GenericDiagnoser('WPP', 'Wrong Parenthesis Position',
                           [(gcc_regex, diagnosis),
                            (clang_regex, diagnosis)],
                           msg)


_DIAGNOSERS = [
    _IncompleteByReferenceArgumentDiagnoser,
    _MockObjectPointerDiagnoser,
    _NeedToReturnNothingDiagnoser,
    _NeedToReturnReferenceDiagnoser,
    _NeedToReturnSomethingDiagnoser,
    _NeedToUseReturnNullDiagnoser,
    _NeedToUseSymbolDiagnoser,
    _OverloadedFunctionActionDiagnoser,
    _OverloadedFunctionMatcherDiagnoser,
    _OverloadedMethodActionDiagnoser,
    _TypeInTemplatedBaseDiagnoser,
    _WrongMockMethodMacroDiagnoser,
    _WrongParenPositionDiagnoser,
    ]


def Diagnose(msg):
  """Generates all possible diagnoses given the compiler error message."""

  msg = re.sub(r'\x1b\[[^m]*m', '', msg)  # Strips all color formatting.
  # Assuming the string is using the UTF-8 encoding, replaces the left and
  # the right single quote characters with apostrophes.
  msg = re.sub(r'(\xe2\x80\x98|\xe2\x80\x99)', "'", msg)

  diagnoses = []
  for diagnoser in _DIAGNOSERS:
    for diag in diagnoser(msg):
      diagnosis = '[%s - %s]\n%s' % diag
      if not diagnosis in diagnoses:
        diagnoses.append(diagnosis)
  return diagnoses


def main():
  print ('Google Mock Doctor v%s - '
         'diagnoses problems in code using Google Mock.' % _VERSION)

  if sys.stdin.isatty():
    print ('Please copy and paste the compiler errors here.  Press c-D when '
           'you are done:')
  else:
    print ('Waiting for compiler errors on stdin . . .')

  msg = sys.stdin.read().strip()
  diagnoses = Diagnose(msg)
  count = len(diagnoses)
  if not count:
    print ("""
Your compiler complained:
8<------------------------------------------------------------
%s
------------------------------------------------------------>8

Uh-oh, I'm not smart enough to figure out what the problem is. :-(
However...
If you send your source code and the compiler's error messages to
%s, you can be helped and I can get smarter --
win-win for us!""" % (msg, _EMAIL))
  else:
    print ('------------------------------------------------------------')
    print ('Your code appears to have the following',)
    if count > 1:
      print ('%s diseases:' % (count,))
    else:
      print ('disease:')
    i = 0
    for d in diagnoses:
      i += 1
      if count > 1:
        print ('\n#%s:' % (i,))
      print (d)
    print ("""
How did I do?  If you think I'm wrong or unhelpful, please send your
source code and the compiler's error messages to %s.
Then you can be helped and I can get smarter -- I promise I won't be upset!""" %
           _EMAIL)


if __name__ == '__main__':
  main()
an class="cm"> * 1 = BIOS region SMM protection is enabled. * The BIOS Region is not writable unless all processors are in SMM." * In earlier chipsets this bit is reserved. * * Try to unset it in any case. * It won't hurt and makes sense in some cases according to Stefan Reinauer. * * At least in Centerton aforementioned bit is located at bit 7. It is unspecified in all other Atom * and Desktop chipsets before Ibex Peak/5 Series, but we reset bit 5 anyway. */ int smm_bwp_bit; if (ich_generation == CHIPSET_CENTERTON) smm_bwp_bit = 7; else smm_bwp_bit = 5; wanted &= ~(1 << smm_bwp_bit); /* Tunnel Creek has a cache disable at bit 2 of the lowest BIOS_CNTL byte. */ if (ich_generation == CHIPSET_TUNNEL_CREEK) wanted |= (1 << 2); wanted |= (1 << 0); /* Set BIOS Write Enable */ wanted &= ~(1 << 1); /* Disable lock (futile) */ /* Only write the register if it's necessary */ if (wanted != old) { rpci_write_byte(dev, bios_cntl, wanted); new = pci_read_byte(dev, bios_cntl); } else new = old; msg_pdbg("\nBIOS_CNTL = 0x%02x: ", new); msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); if (new & (1 << smm_bwp_bit)) msg_pwarn("Warning: BIOS region SMM protection is enabled!\n"); if (new != wanted) msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.\n" "New value is 0x%02x.\n", bios_cntl, old, wanted, new); /* Return an error if we could not set the write enable only. */ if (!(new & (1 << 0))) return -1; return 0; } static int enable_flash_ich_fwh_decode(struct pci_dev *dev, enum ich_chipset ich_generation) { uint8_t fwh_sel1 = 0, fwh_sel2 = 0, fwh_dec_en_lo = 0, fwh_dec_en_hi = 0; /* silence compilers */ bool implemented = 0; switch (ich_generation) { case CHIPSET_ICH: /* FIXME: Unlike later chipsets, ICH and ICH-0 do only support mapping of the top-most 4MB * and therefore do only feature FWH_DEC_EN (E3h, different default too) and FWH_SEL (E8h). */ break; case CHIPSET_ICH2345: fwh_sel1 = 0xe8; fwh_sel2 = 0xee; fwh_dec_en_lo = 0xf0; fwh_dec_en_hi = 0xe3; implemented = 1; break; case CHIPSET_POULSBO: case CHIPSET_TUNNEL_CREEK: /* FIXME: Similar to ICH and ICH-0, Tunnel Creek and Poulsbo do only feature one register each, * FWH_DEC_EN (D7h) and FWH_SEL (D0h). */ break; case CHIPSET_CENTERTON: /* FIXME: Similar to above FWH_DEC_EN (D4h) and FWH_SEL (D0h). */ break; case CHIPSET_ICH6: case CHIPSET_ICH7: default: /* Future version might behave the same */ fwh_sel1 = 0xd0; fwh_sel2 = 0xd4; fwh_dec_en_lo = 0xd8; fwh_dec_en_hi = 0xd9; implemented = 1; break; } char *idsel = extract_programmer_param("fwh_idsel"); if (idsel && strlen(idsel)) { if (!implemented) { msg_perr("Error: fwh_idsel= specified, but (yet) unsupported on this chipset.\n"); goto idsel_garbage_out; } errno = 0; /* Base 16, nothing else makes sense. */ uint64_t fwh_idsel = (uint64_t)strtoull(idsel, NULL, 16); if (errno) { msg_perr("Error: fwh_idsel= specified, but value could not be converted.\n"); goto idsel_garbage_out; } if (fwh_idsel & 0xffff000000000000ULL) { msg_perr("Error: fwh_idsel= specified, but value had unused bits set.\n"); goto idsel_garbage_out; } uint64_t fwh_idsel_old = pci_read_long(dev, fwh_sel1); fwh_idsel_old <<= 16; fwh_idsel_old |= pci_read_word(dev, fwh_sel2); msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.", fwh_idsel_old, fwh_idsel); rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff); rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff); /* FIXME: Decode settings are not changed. */ } else if (idsel) { msg_perr("Error: fwh_idsel= specified, but no value given.\n"); idsel_garbage_out: free(idsel); return ERROR_FATAL; } free(idsel); if (!implemented) { msg_pdbg2("FWH IDSEL handling is not implemented on this chipset."); return 0; } /* Ignore all legacy ranges below 1 MB. * We currently only support flashing the chip which responds to * IDSEL=0. To support IDSEL!=0, flashbase and decode size calculations * have to be adjusted. */ int max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; bool contiguous = 1; uint32_t fwh_conf = pci_read_long(dev, fwh_sel1); int i; /* FWH_SEL1 */ for (i = 7; i >= 0; i--) { int tmp = (fwh_conf >> (i * 4)) & 0xf; msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp); if ((tmp == 0) && contiguous) { max_decode_fwh_idsel = (8 - i) * 0x80000; } else { contiguous = 0; } } /* FWH_SEL2 */ fwh_conf = pci_read_word(dev, fwh_sel2); for (i = 3; i >= 0; i--) { int tmp = (fwh_conf >> (i * 4)) & 0xf; msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp); if ((tmp == 0) && contiguous) { max_decode_fwh_idsel = (8 - i) * 0x100000; } else { contiguous = 0; } } contiguous = 1; /* FWH_DEC_EN1 */ fwh_conf = pci_read_byte(dev, fwh_dec_en_hi); fwh_conf <<= 8; fwh_conf |= pci_read_byte(dev, fwh_dec_en_lo); for (i = 7; i >= 0; i--) { int tmp = (fwh_conf >> (i + 0x8)) & 0x1; msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp ? "en" : "dis"); if ((tmp == 1) && contiguous) { max_decode_fwh_decode = (8 - i) * 0x80000; } else { contiguous = 0; } } for (i = 3; i >= 0; i--) { int tmp = (fwh_conf >> i) & 0x1; msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp ? "en" : "dis"); if ((tmp == 1) && contiguous) { max_decode_fwh_decode = (8 - i) * 0x100000; } else { contiguous = 0; } } max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode); msg_pdbg("\nMaximum FWH chip size: 0x%x bytes", max_rom_decode.fwh); return 0; } static int enable_flash_ich_fwh(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) { int err; /* Configure FWH IDSEL decoder maps. */ if ((err = enable_flash_ich_fwh_decode(dev, ich_generation)) != 0) return err; internal_buses_supported = BUS_FWH; return enable_flash_ich_bios_cntl(dev, ich_generation, bios_cntl); } static int enable_flash_ich0(struct pci_dev *dev, const char *name) { return enable_flash_ich_fwh(dev, CHIPSET_ICH, 0x4e); } static int enable_flash_ich2345(struct pci_dev *dev, const char *name) { return enable_flash_ich_fwh(dev, CHIPSET_ICH2345, 0x4e); } static int enable_flash_ich6(struct pci_dev *dev, const char *name) { return enable_flash_ich_fwh(dev, CHIPSET_ICH6, 0xdc); } static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) { return enable_flash_ich_fwh(dev, CHIPSET_POULSBO, 0xd8); } static int enable_flash_ich_spi(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) { static const char *const straps_names_EP80579[] = { "SPI", "reserved", "reserved", "LPC" }; static const char *const straps_names_ich7_nm10[] = { "reserved", "SPI", "PCI", "LPC" }; static const char *const straps_names_tunnel_creek[] = { "SPI", "LPC" }; static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" }; static const char *const straps_names_pch567[] = { "LPC", "reserved", "PCI", "SPI" }; static const char *const straps_names_pch8[] = { "LPC", "reserved", "reserved", "SPI" }; static const char *const straps_names_pch8_lp[] = { "SPI", "LPC" }; static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" }; const char *const *straps_names; switch (ich_generation) { case CHIPSET_ICH7: /* EP80579 may need further changes, but this is the least * intrusive way to get correct BOOT Strap printing without * changing the rest of its code path). */ if (dev->device_id == 0x5031) straps_names = straps_names_EP80579; else straps_names = straps_names_ich7_nm10; break; case CHIPSET_ICH8: case CHIPSET_ICH9: case CHIPSET_ICH10: straps_names = straps_names_ich8910; break; case CHIPSET_TUNNEL_CREEK: straps_names = straps_names_tunnel_creek; break; case CHIPSET_5_SERIES_IBEX_PEAK: case CHIPSET_6_SERIES_COUGAR_POINT: case CHIPSET_7_SERIES_PANTHER_POINT: straps_names = straps_names_pch567; break; case CHIPSET_8_SERIES_LYNX_POINT: straps_names = straps_names_pch8; break; case CHIPSET_8_SERIES_LYNX_POINT_LP: straps_names = straps_names_pch8_lp; break; case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet case CHIPSET_CENTERTON: // FIXME: Datasheet does not mention GCS at all straps_names = straps_names_unknown; break; default: msg_gerr("%s: unknown ICH generation. Please report!\n", __func__); straps_names = straps_names_unknown; break; } /* Get physical address of Root Complex Register Block */ uint32_t rcra = pci_read_long(dev, 0xf0) & 0xffffc000; msg_pdbg("Root Complex Register Block address = 0x%x\n", rcra); /* Map RCBA to virtual memory */ void *rcrb = rphysmap("ICH RCRB", rcra, 0x4000); if (rcrb == ERROR_PTR) return ERROR_FATAL; uint32_t gcs = mmio_readl(rcrb + 0x3410); msg_pdbg("GCS = 0x%x: ", gcs); msg_pdbg("BIOS Interface Lock-Down: %sabled, ", (gcs & 0x1) ? "en" : "dis"); uint8_t bbs; switch (ich_generation) { case CHIPSET_TUNNEL_CREEK: bbs = (gcs >> 1) & 0x1; break; case CHIPSET_8_SERIES_LYNX_POINT_LP: case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet /* Lynx Point LP uses a single bit for GCS */ bbs = (gcs >> 10) & 0x1; break; default: /* Older chipsets use two bits for GCS */ bbs = (gcs >> 10) & 0x3; break; } msg_pdbg("Boot BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); if (ich_generation != CHIPSET_TUNNEL_CREEK && ich_generation != CHIPSET_CENTERTON) { uint8_t buc = mmio_readb(rcrb + 0x3414); msg_pdbg("Top Swap : %s\n", (buc & 1) ? "enabled (A16(+) inverted)" : "not enabled"); } /* Handle FWH-related parameters and initialization */ int ret_fwh = enable_flash_ich_fwh(dev, ich_generation, bios_cntl); if (ret_fwh == ERROR_FATAL) return ret_fwh; /* SPIBAR is at RCRB+0x3020 for ICH[78], Tunnel Creek and Centerton, and RCRB+0x3800 for ICH9. */ uint16_t spibar_offset; switch (ich_generation) { case CHIPSET_ICH_UNKNOWN: return ERROR_FATAL; case CHIPSET_ICH7: case CHIPSET_ICH8: case CHIPSET_TUNNEL_CREEK: case CHIPSET_CENTERTON: spibar_offset = 0x3020; break; case CHIPSET_ICH9: default: /* Future version might behave the same */ spibar_offset = 0x3800; break; } msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " + 0x%04x\n", PRIxPTR_WIDTH, (uintptr_t)rcrb, spibar_offset); void *spibar = rcrb + spibar_offset; /* This adds BUS_SPI */ int ret_spi = ich_init_spi(dev, spibar, ich_generation); if (ret_spi == ERROR_FATAL) return ret_spi; if (ret_fwh || ret_spi) return ERROR_NONFATAL; return 0; } static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_TUNNEL_CREEK, 0xd8); } static int enable_flash_s12x0(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_CENTERTON, 0xd8); } static int enable_flash_ich7(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_ICH7, 0xdc); } static int enable_flash_ich8(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_ICH8, 0xdc); } static int enable_flash_ich9(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_ICH9, 0xdc); } static int enable_flash_ich10(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_ICH10, 0xdc); } /* Ibex Peak aka. 5 series & 3400 series */ static int enable_flash_pch5(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc); } /* Cougar Point aka. 6 series & c200 series */ static int enable_flash_pch6(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc); } /* Panther Point aka. 7 series */ static int enable_flash_pch7(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc); } /* Lynx Point aka. 8 series */ static int enable_flash_pch8(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc); } /* Lynx Point LP aka. 8 series low-power */ static int enable_flash_pch8_lp(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc); } /* Wellsburg (for Haswell-EP Xeons) */ static int enable_flash_pch8_wb(struct pci_dev *dev, const char *name) { return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc); } static int via_no_byte_merge(struct pci_dev *dev, const char *name) { uint8_t val; val = pci_read_byte(dev, 0x71); if (val & 0x40) { msg_pdbg("Disabling byte merging\n"); val &= ~0x40; rpci_write_byte(dev, 0x71, val); } return NOT_DONE_YET; /* need to find south bridge, too */ } static int enable_flash_vt823x(struct pci_dev *dev, const char *name) { uint8_t val; /* Enable ROM decode range (1MB) FFC00000 - FFFFFFFF. */ rpci_write_byte(dev, 0x41, 0x7f); /* ROM write enable */ val = pci_read_byte(dev, 0x40); val |= 0x10; rpci_write_byte(dev, 0x40, val); if (pci_read_byte(dev, 0x40) != val) { msg_pwarn("\nWarning: Failed to enable flash write on \"%s\"\n", name); return -1; } if (dev->device_id == 0x3227) { /* VT8237/VT8237R */ /* All memory cycles, not just ROM ones, go to LPC. */ val = pci_read_byte(dev, 0x59); val &= ~0x80; rpci_write_byte(dev, 0x59, val); } return 0; } static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) { struct pci_dev *south_north = pci_dev_find(0x1106, 0xa353); if (south_north == NULL) { msg_perr("Could not find South-North Module Interface Control device!\n"); return ERROR_FATAL; } msg_pdbg("Strapped to "); if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) { msg_pdbg("LPC.\n"); return enable_flash_vt823x(dev, name); } msg_pdbg("SPI.\n"); uint32_t mmio_base; void *mmio_base_physmapped; uint32_t spi_cntl; #define SPI_CNTL_LEN 0x08 uint32_t spi0_mm_base = 0; switch(dev->device_id) { case 0x8353: /* VX800/VX820 */ spi0_mm_base = pci_read_long(dev, 0xbc) << 8; break; case 0x8409: /* VX855/VX875 */ case 0x8410: /* VX900 */ mmio_base = pci_read_long(dev, 0xbc) << 8; mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); if (mmio_base_physmapped == ERROR_PTR) return ERROR_FATAL; /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; if ((spi_cntl & 0x01) == 0) { msg_pdbg ("SPI Bus0 disabled!\n"); physunmap(mmio_base_physmapped, SPI_CNTL_LEN); return ERROR_FATAL; } /* Offset 1-3 has SPI Bus Memory Map Base Address: */ spi0_mm_base = spi_cntl & 0xFFFFFF00; /* Offset 4 - Bit 0 holds SPI Bus1 Enable Bit. */ spi_cntl = mmio_readl(mmio_base_physmapped) + 0x04; if ((spi_cntl & 0x01) == 1) msg_pdbg2("SPI Bus1 is enabled too.\n"); physunmap(mmio_base_physmapped, SPI_CNTL_LEN); break; default: msg_perr("%s: Unsupported chipset %x:%x!\n", __func__, dev->vendor_id, dev->device_id); return ERROR_FATAL; } return via_init_spi(dev, spi0_mm_base); } static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) { return via_init_spi(dev, pci_read_long(dev, 0xbc) << 8); } static int enable_flash_cs5530(struct pci_dev *dev, const char *name) { uint8_t reg8; #define DECODE_CONTROL_REG2 0x5b /* F0 index 0x5b */ #define ROM_AT_LOGIC_CONTROL_REG 0x52 /* F0 index 0x52 */ #define CS5530_RESET_CONTROL_REG 0x44 /* F0 index 0x44 */ #define CS5530_USB_SHADOW_REG 0x43 /* F0 index 0x43 */ #define LOWER_ROM_ADDRESS_RANGE (1 << 0) #define ROM_WRITE_ENABLE (1 << 1) #define UPPER_ROM_ADDRESS_RANGE (1 << 2) #define BIOS_ROM_POSITIVE_DECODE (1 << 5) #define CS5530_ISA_MASTER (1 << 7) #define CS5530_ENABLE_SA2320 (1 << 2) #define CS5530_ENABLE_SA20 (1 << 6) internal_buses_supported = BUS_PARALLEL; /* Decode 0x000E0000-0x000FFFFF (128 kB), not just 64 kB, and * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 kB. * FIXME: Should we really touch the low mapping below 1 MB? Flashrom * ignores that region completely. * Make the configured ROM areas writable. */ reg8 = pci_read_byte(dev, ROM_AT_LOGIC_CONTROL_REG); reg8 |= LOWER_ROM_ADDRESS_RANGE; reg8 |= UPPER_ROM_ADDRESS_RANGE; reg8 |= ROM_WRITE_ENABLE; rpci_write_byte(dev, ROM_AT_LOGIC_CONTROL_REG, reg8); /* Set positive decode on ROM. */ reg8 = pci_read_byte(dev, DECODE_CONTROL_REG2); reg8 |= BIOS_ROM_POSITIVE_DECODE; rpci_write_byte(dev, DECODE_CONTROL_REG2, reg8); reg8 = pci_read_byte(dev, CS5530_RESET_CONTROL_REG); if (reg8 & CS5530_ISA_MASTER) { /* We have A0-A23 available. */ max_rom_decode.parallel = 16 * 1024 * 1024; } else { reg8 = pci_read_byte(dev, CS5530_USB_SHADOW_REG); if (reg8 & CS5530_ENABLE_SA2320) { /* We have A0-19, A20-A23 available. */ max_rom_decode.parallel = 16 * 1024 * 1024; } else if (reg8 & CS5530_ENABLE_SA20) { /* We have A0-19, A20 available. */ max_rom_decode.parallel = 2 * 1024 * 1024; } else { /* A20 and above are not active. */ max_rom_decode.parallel = 1024 * 1024; } } return 0; } /* * Geode systems write protect the BIOS via RCONFs (cache settings similar * to MTRRs). To unlock, change MSR 0x1808 top byte to 0x22. * * Geode systems also write protect the NOR flash chip itself via MSR_NORF_CTL. * To enable write to NOR Boot flash for the benefit of systems that have such * a setup, raise MSR 0x51400018 WE_CS3 (write enable Boot Flash Chip Select). */ static int enable_flash_cs5536(struct pci_dev *dev, const char *name) { #define MSR_RCONF_DEFAULT 0x1808 #define MSR_NORF_CTL 0x51400018 msr_t msr; /* Geode only has a single core */ if (setup_cpu_msr(0)) return -1; msr = rdmsr(MSR_RCONF_DEFAULT); if ((msr.hi >> 24) != 0x22) { msr.hi &= 0xfbffffff; wrmsr(MSR_RCONF_DEFAULT, msr); } msr = rdmsr(MSR_NORF_CTL); /* Raise WE_CS3 bit. */ msr.lo |= 0x08; wrmsr(MSR_NORF_CTL, msr); cleanup_cpu_msr(); #undef MSR_RCONF_DEFAULT #undef MSR_NORF_CTL return 0; } static int enable_flash_sc1100(struct pci_dev *dev, const char *name) { #define SC_REG 0x52 uint8_t new; rpci_write_byte(dev, SC_REG, 0xee); new = pci_read_byte(dev, SC_REG); if (new != 0xee) { /* FIXME: share this with other code? */ msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", SC_REG, new, name); return -1; } return 0; } /* Works for AMD-768, AMD-8111, VIA VT82C586A/B, VIA VT82C596, VIA VT82C686A/B. * * ROM decode control register matrix * AMD-768 AMD-8111 VT82C586A/B VT82C596 VT82C686A/B * 7 FFC0_0000h–FFFF_FFFFh <- FFFE0000h-FFFEFFFFh <- <- * 6 FFB0_0000h–FFBF_FFFFh <- FFF80000h-FFFDFFFFh <- <- * 5 00E8... <- <- FFF00000h-FFF7FFFFh <- */ static int enable_flash_amd_via(struct pci_dev *dev, const char *name, uint8_t decode_val) { #define AMD_MAPREG 0x43 #define AMD_ENREG 0x40 uint8_t old, new; old = pci_read_byte(dev, AMD_MAPREG); new = old | decode_val; if (new != old) { rpci_write_byte(dev, AMD_MAPREG, new); if (pci_read_byte(dev, AMD_MAPREG) != new) { msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", AMD_MAPREG, new, name); } else msg_pdbg("Changed ROM decode range to 0x%02x successfully.\n", new); } /* Enable 'ROM write' bit. */ old = pci_read_byte(dev, AMD_ENREG); new = old | 0x01; if (new == old) return 0; rpci_write_byte(dev, AMD_ENREG, new); if (pci_read_byte(dev, AMD_ENREG) != new) { msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", AMD_ENREG, new, name); return ERROR_NONFATAL; } msg_pdbg2("Set ROM enable bit successfully.\n"); return 0; } static int enable_flash_amd_768_8111(struct pci_dev *dev, const char *name) { /* Enable decoding of 0xFFB00000 to 0xFFFFFFFF (5 MB). */ max_rom_decode.lpc = 5 * 1024 * 1024; return enable_flash_amd_via(dev, name, 0xC0); } static int enable_flash_vt82c586(struct pci_dev *dev, const char *name) { /* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (512 kB) */ max_rom_decode.parallel = 512 * 1024; return enable_flash_amd_via(dev, name, 0xC0); } /* Works for VT82C686A/B too. */ static int enable_flash_vt82c596(struct pci_dev *dev, const char *name) { /* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (1 MB) */ max_rom_decode.parallel = 1024 * 1024; return enable_flash_amd_via(dev, name, 0xE0); } static int enable_flash_sb600(struct pci_dev *dev, const char *name) { uint32_t prot; uint8_t reg; int ret; /* Clear ROM protect 0-3. */ for (reg = 0x50; reg < 0x60; reg += 4) { prot = pci_read_long(dev, reg); /* No protection flags for this region?*/ if ((prot & 0x3) == 0) continue; msg_pinfo("SB600 %s%sprotected from 0x%08x to 0x%08x\n", (prot & 0x1) ? "write " : "", (prot & 0x2) ? "read " : "", (prot & 0xfffff800), (prot & 0xfffff800) + (((prot & 0x7fc) << 8) | 0x3ff)); prot &= 0xfffffffc; rpci_write_byte(dev, reg, prot); prot = pci_read_long(dev, reg); if (prot & 0x3) msg_perr("SB600 %s%sunprotect failed from 0x%08x to 0x%08x\n", (prot & 0x1) ? "write " : "", (prot & 0x2) ? "read " : "", (prot & 0xfffff800), (prot & 0xfffff800) + (((prot & 0x7fc) << 8) | 0x3ff)); } internal_buses_supported = BUS_LPC | BUS_FWH; ret = sb600_probe_spi(dev); /* Read ROM strap override register. */ OUTB(0x8f, 0xcd6); reg = INB(0xcd7); reg &= 0x0e; msg_pdbg("ROM strap override is %sactive", (reg & 0x02) ? "" : "not "); if (reg & 0x02) { switch ((reg & 0x0c) >> 2) { case 0x00: msg_pdbg(": LPC"); break; case 0x01: msg_pdbg(": PCI"); break; case 0x02: msg_pdbg(": FWH"); break; case 0x03: msg_pdbg(": SPI"); break; } } msg_pdbg("\n"); /* Force enable SPI ROM in SB600 PM register. * If we enable SPI ROM here, we have to disable it after we leave. * But how can we know which ROM we are going to handle? So we have * to trade off. We only access LPC ROM if we boot via LPC ROM. And * only SPI ROM if we boot via SPI ROM. If you want to access SPI on * boards with LPC straps, you have to use the code below. */ /* OUTB(0x8f, 0xcd6); OUTB(0x0e, 0xcd7); */ return ret; } /* sets bit 0 in 0x6d */ static int enable_flash_nvidia_common(struct pci_dev *dev, const char *name) { uint8_t old, new; old = pci_read_byte(dev, 0x6d); new = old | 0x01; if (new == old) return 0; rpci_write_byte(dev, 0x6d, new); if (pci_read_byte(dev, 0x6d) != new) { msg_pinfo("Setting register 0x6d to 0x%02x on %s failed.\n", new, name); return 1; } return 0; } static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name) { rpci_write_byte(dev, 0x92, 0); if (enable_flash_nvidia_common(dev, name)) return ERROR_NONFATAL; else return 0; } static int enable_flash_ck804(struct pci_dev *dev, const char *name) { uint32_t segctrl; uint8_t reg, old, new; unsigned int err = 0; /* 0x8A is special: it is a single byte and only one nibble is touched. */ reg = 0x8A; segctrl = pci_read_byte(dev, reg); if ((segctrl & 0x3) != 0x0) { if ((segctrl & 0xC) != 0x0) { msg_pinfo("Can not unlock existing protection in register 0x%02x.\n", reg); err++; } else { msg_pdbg("Unlocking protection in register 0x%02x... ", reg); rpci_write_byte(dev, reg, segctrl & 0xF0); segctrl = pci_read_byte(dev, reg); if ((segctrl & 0x3) != 0x0) { msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%x).\n", reg, segctrl); err++; } else msg_pdbg("OK\n"); } } for (reg = 0x8C; reg <= 0x94; reg += 4) { segctrl = pci_read_long(dev, reg); if ((segctrl & 0x33333333) == 0x00000000) { /* reads and writes are unlocked */ continue; } if ((segctrl & 0xCCCCCCCC) != 0x00000000) { msg_pinfo("Can not unlock existing protection in register 0x%02x.\n", reg); err++; continue; } msg_pdbg("Unlocking protection in register 0x%02x... ", reg); rpci_write_long(dev, reg, 0x00000000); segctrl = pci_read_long(dev, reg); if ((segctrl & 0x33333333) != 0x00000000) { msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%08x).\n", reg, segctrl); err++; } else msg_pdbg("OK\n"); } if (err > 0) { msg_pinfo("%d locks could not be disabled, disabling writes (reads may also fail).\n", err); programmer_may_write = 0; } reg = 0x88; old = pci_read_byte(dev, reg); new = old | 0xC0; if (new != old) { rpci_write_byte(dev, reg, new); if (pci_read_byte(dev, reg) != new) { /* FIXME: share this with other code? */ msg_pinfo("Setting register 0x%02x to 0x%02x on %s failed.\n", reg, new, name); err++; } } if (enable_flash_nvidia_common(dev, name)) err++; if (err > 0) return ERROR_NONFATAL; else return 0; } static int enable_flash_osb4(struct pci_dev *dev, const char *name) { uint8_t tmp; internal_buses_supported = BUS_PARALLEL; tmp = INB(0xc06); tmp |= 0x1; OUTB(tmp, 0xc06); tmp = INB(0xc6f); tmp |= 0x40; OUTB(tmp, 0xc6f); return 0; } /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */ static int enable_flash_sb400(struct pci_dev *dev, const char *name) { uint8_t tmp; struct pci_dev *smbusdev; /* Look for the SMBus device. */ smbusdev = pci_dev_find(0x1002, 0x4372); if (!smbusdev) { msg_perr("ERROR: SMBus device not found. Aborting.\n"); return ERROR_FATAL; } /* Enable some SMBus stuff. */ tmp = pci_read_byte(smbusdev, 0x79); tmp |= 0x01; rpci_write_byte(smbusdev, 0x79, tmp); /* Change southbridge. */ tmp = pci_read_byte(dev, 0x48); tmp |= 0x21; rpci_write_byte(dev, 0x48, tmp); /* Now become a bit silly. */ tmp = INB(0xc6f); OUTB(tmp, 0xeb); OUTB(tmp, 0xeb); tmp |= 0x40; OUTB(tmp, 0xc6f); OUTB(tmp, 0xeb); OUTB(tmp, 0xeb); return 0; } static int enable_flash_mcp55(struct pci_dev *dev, const char *name) { uint8_t val; uint16_t wordval; /* Set the 0-16 MB enable bits. */ val = pci_read_byte(dev, 0x88); val |= 0xff; /* 256K */ rpci_write_byte(dev, 0x88, val); val = pci_read_byte(dev, 0x8c); val |= 0xff; /* 1M */ rpci_write_byte(dev, 0x8c, val); wordval = pci_read_word(dev, 0x90); wordval |= 0x7fff; /* 16M */ rpci_write_word(dev, 0x90, wordval); if (enable_flash_nvidia_common(dev, name)) return ERROR_NONFATAL; else return 0; } /* * The MCP6x/MCP7x code is based on cleanroom reverse engineering. * It is assumed that LPC chips need the MCP55 code and SPI chips need the * code provided in enable_flash_mcp6x_7x_common. */ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) { int ret = 0, want_spi = 0; uint8_t val; msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); /* dev is the ISA bridge. No idea what the stuff below does. */ val = pci_read_byte(dev, 0x8a); msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " "is %i\n", val, (val >> 6) & 0x1, (val >> 5) & 0x1); switch ((val >> 5) & 0x3) { case 0x0: ret = enable_flash_mcp55(dev, name); internal_buses_supported = BUS_LPC; msg_pdbg("Flash bus type is LPC\n"); break; case 0x2: want_spi = 1; /* SPI is added in mcp6x_spi_init if it works. * Do we really want to disable LPC in this case? */ internal_buses_supported = BUS_NONE; msg_pdbg("Flash bus type is SPI\n"); msg_pinfo("SPI on this chipset is WIP. Please report any " "success or failure by mailing us the verbose " "output to flashrom@flashrom.org, thanks!\n"); break; default: /* Should not happen. */ internal_buses_supported = BUS_NONE; msg_pdbg("Flash bus type is unknown (none)\n"); msg_pinfo("Something went wrong with bus type detection.\n"); goto out_msg; break; } /* Force enable SPI and disable LPC? Not a good idea. */ #if 0 val |= (1 << 6); val &= ~(1 << 5); rpci_write_byte(dev, 0x8a, val); #endif if (mcp6x_spi_init(want_spi)) ret = 1; out_msg: msg_pinfo("Please send the output of \"flashrom -V\" to " "flashrom@flashrom.org with\n" "your board name: flashrom -V as the subject to help us " "finish support for your\n" "chipset. Thanks.\n"); return ret; } static int enable_flash_ht1000(struct pci_dev *dev, const char *name) { uint8_t val; /* Set the 4MB enable bit. */ val = pci_read_byte(dev, 0x41); val |= 0x0e; rpci_write_byte(dev, 0x41, val); val = pci_read_byte(dev, 0x43); val |= (1 << 4); rpci_write_byte(dev, 0x43, val); return 0; } /* * Usually on the x86 architectures (and on other PC-like platforms like some * Alphas or Itanium) the system flash is mapped right below 4G. On the AMD * Elan SC520 only a small piece of the system flash is mapped there, but the * complete flash is mapped somewhere below 1G. The position can be determined * by the BOOTCS PAR register. */ static int get_flashbase_sc520(struct pci_dev *dev, const char *name) { int i, bootcs_found = 0; uint32_t parx = 0; void *mmcr; /* 1. Map MMCR */ mmcr = physmap("Elan SC520 MMCR", 0xfffef000, getpagesize()); if (mmcr == ERROR_PTR) return ERROR_FATAL; /* 2. Scan PAR0 (0x88) - PAR15 (0xc4) for * BOOTCS region (PARx[31:29] = 100b)e */ for (i = 0x88; i <= 0xc4; i += 4) { parx = mmio_readl(mmcr + i); if ((parx >> 29) == 4) { bootcs_found = 1; break; /* BOOTCS found */ } } /* 3. PARx[25] = 1b --> flashbase[29:16] = PARx[13:0] * PARx[25] = 0b --> flashbase[29:12] = PARx[17:0] */ if (bootcs_found) { if (parx & (1 << 25)) { parx &= (1 << 14) - 1; /* Mask [13:0] */ flashbase = parx << 16; } else { parx &= (1 << 18) - 1; /* Mask [17:0] */ flashbase = parx << 12; } } else { msg_pinfo("AMD Elan SC520 detected, but no BOOTCS. " "Assuming flash at 4G.\n"); } /* 4. Clean up */ physunmap(mmcr, getpagesize()); return 0; } #endif /* Please keep this list numerically sorted by vendor/device ID. */ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, {0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, {0x1022, 0x7468, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530}, {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, {0x1039, 0x0646, OK, "SiS", "645DX", enable_flash_sis540}, {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, {0x1039, 0x0650, OK, "SiS", "650", enable_flash_sis540}, {0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540}, {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, {0x1039, 0x0730, OK, "SiS", "730", enable_flash_sis540}, {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, {0x1039, 0x0755, OK, "SiS", "755", enable_flash_sis540}, {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, {0x10b9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ {0x10de, 0x0060, OK, "NVIDIA", "NForce2", enable_flash_nvidia_nforce2}, {0x10de, 0x00e0, OK, "NVIDIA", "NForce3", enable_flash_nvidia_nforce2}, /* Slave, should not be here, to fix known bug for A01. */ {0x10de, 0x00d3, OK, "NVIDIA", "CK804", enable_flash_ck804}, {0x10de, 0x0260, OK, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0261, NT, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0262, NT, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0263, NT, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0360, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* M57SLI*/ /* 10de:0361 is present in Tyan S2915 OEM systems, but not connected to * the flash chip. Instead, 10de:0364 is connected to the flash chip. * Until we have PCI device class matching or some fallback mechanism, * this is needed to get flashrom working on Tyan S2915 and maybe other * dual-MCP55 boards. */ #if 0 {0x10de, 0x0361, NT, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ #endif {0x10de, 0x0362, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0363, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0364, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x03e0, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x03e1, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x0440, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, {0x10de, 0x0441, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, {0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x}, {0x10de, 0x075c, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, {0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, {0x10de, 0x07d7, OK, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, {0x10de, 0x0aac, OK, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0d80, NT, "NVIDIA", "MCP89", enable_flash_mcp6x_7x}, /* VIA northbridges */ {0x1106, 0x0585, NT, "VIA", "VT82C585VPX", via_no_byte_merge}, {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge}, {0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge}, {0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge}, {0x1106, 0x0691, OK, "VIA", "VT82C69x", via_no_byte_merge}, {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, /* VIA southbridges */ {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_vt82c586}, {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_vt82c596}, {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_vt82c596}, {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237(R)", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8353, NT, "VIA", "VX800/VX820", enable_flash_vt_vx}, {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt_vx}, {0x1106, 0x8410, NT, "VIA", "VX900", enable_flash_vt_vx}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000},