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extension */ struct shadow_vcpu shadow; }; struct arch_domain { l1_pgentry_t *mm_perdomain_pt; #ifdef CONFIG_X86_64 l2_pgentry_t *mm_perdomain_l2; l3_pgentry_t *mm_perdomain_l3; #endif #ifdef CONFIG_X86_32 /* map_domain_page() mapping cache. */ struct mapcache mapcache; #endif #ifdef CONFIG_COMPAT unsigned int hv_compat_vstart; l3_pgentry_t *mm_arg_xlat_l3; #endif /* I/O-port admin-specified access capabilities. */ struct rangeset *ioport_caps; struct hvm_domain hvm_domain; struct paging_domain paging; struct p2m_domain p2m ; /* Shadow translated domain: P2M mapping */ pagetable_t phys_table; /* Pseudophysical e820 map (XENMEM_memory_map). */ struct e820entry e820[3]; unsigned int nr_e820; /* Maximum physical-address bitwidth supported by this guest. */ unsigned int physaddr_bitsize; /* Is a 32-bit PV (non-HVM) guest? */ bool_t is_32bit_pv; /* Is shared-info page in 32-bit format? */ bool_t has_32bit_shinfo; } __cacheline_aligned; #ifdef CONFIG_X86_PAE struct pae_l3_cache { /* * Two low-memory (<4GB) PAE L3 tables, used as fallback when the guest * supplies a >=4GB PAE L3 table. We need two because we cannot set up * an L3 table while we are currently running on it (without using * expensive atomic 64-bit operations). */ l3_pgentry_t table[2][4] __attribute__((__aligned__(32))); unsigned long high_mfn; /* The >=4GB MFN being shadowed. */ unsigned int inuse_idx; /* Which of the two cache slots is in use? */ spinlock_t lock; }; #define pae_l3_cache_init(c) spin_lock_init(&(c)->lock) #else /* !CONFIG_X86_PAE */ struct pae_l3_cache { }; #define pae_l3_cache_init(c) ((void)0) #endif struct arch_vcpu { /* Needs 16-byte aligment for FXSAVE/FXRSTOR. */ struct vcpu_guest_context guest_context __attribute__((__aligned__(16))); struct pae_l3_cache pae_l3_cache; unsigned long flags; /* TF_ */ void (*schedule_tail) (struct vcpu *); void (*ctxt_switch_from) (struct vcpu *); void (*ctxt_switch_to) (struct vcpu *); /* Bounce information for propagating an exception to guest OS. */ struct trap_bounce trap_bounce; /* I/O-port access bitmap. */ XEN_GUEST_HANDLE(uint8_t) iobmp; /* Guest kernel virtual address of the bitmap. */ int iobmp_limit; /* Number of ports represented in the bitmap. */ int iopl; /* Current IOPL for this VCPU. */ #ifdef CONFIG_X86_32 struct desc_struct int80_desc; #endif #ifdef CONFIG_X86_64 struct trap_bounce int80_bounce; #endif /* Virtual Machine Extensions */ struct hvm_vcpu hvm_vcpu; /* * Every domain has a L1 pagetable of its own. Per-domain mappings * are put in this table (eg. the current GDT is mapped here). */ l1_pgentry_t *perdomain_ptes; #ifdef CONFIG_X86_64 pagetable_t guest_table_user; /* (MFN) x86/64 user-space pagetable */ #endif pagetable_t guest_table; /* (MFN) guest notion of cr3 */ /* guest_table holds a ref to the page, and also a type-count unless * shadow refcounts are in use */ pagetable_t shadow_table[4]; /* (MFN) shadow(s) of guest */ pagetable_t monitor_table; /* (MFN) hypervisor PT (for HVM) */ unsigned long cr3; /* (MA) value to install in HW CR3 */ /* Current LDT details. */ unsigned long shadow_ldt_mapcnt; struct paging_vcpu paging; /* Guest-specified relocation of vcpu_info. */ unsigned long vcpu_info_mfn; } __cacheline_aligned; /* shorthands to improve code legibility */ #define hvm_vmx hvm_vcpu.u.vmx #define hvm_svm hvm_vcpu.u.svm #endif /* __ASM_DOMAIN_H__ */ /* * Local variables: * mode: C * c-set-style: "BSD" * c-basic-offset: 4 * tab-width: 4 * indent-tabs-mode: nil * End: */