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/*
    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
                 2011,2012 Giovanni Di Sirio.

    This file is part of ChibiOS/RT.

    ChibiOS/RT is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.

    ChibiOS/RT is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
*/

/**
 * @file    chmempools.h
 * @brief   Memory Pools macros and structures.
 *
 * @addtogroup pools
 * @{
 */

#ifndef _CHMEMPOOLS_H_
#define _CHMEMPOOLS_H_

#if CH_USE_MEMPOOLS || defined(__DOXYGEN__)

/**
 * @brief   Memory pool free object header.
 */
struct pool_header {
  struct pool_header    *ph_next;       /**< @brief Pointer to the next pool
                                                    header in the list.     */
};

/**
 * @brief   Memory pool descriptor.
 */
typedef struct {
  struct pool_header    *mp_next;       /**< @brief Pointer to the header.  */
  size_t                mp_object_size; /**< @brief Memory pool objects
                                                    size.                   */
  memgetfunc_t          mp_provider;    /**< @brief Memory blocks provider for
                                                    this pool.              */
} MemoryPool;

/**
 * @brief   Data part of a static memory pool initializer.
 * @details This macro should be used when statically initializing a
 *          memory pool that is part of a bigger structure.
 *
 * @param[in] name      the name of the memory pool variable
 * @param[in] size      size of the memory pool contained objects
 * @param[in] provider  memory provider function for the memory pool
 */
#define _MEMORYPOOL_DATA(name, size, provider)                              \
  {NULL, size, provider}

/**
 * @brief Static memory pool initializer in hungry mode.
 * @details Statically initialized memory pools require no explicit
 *          initialization using @p chPoolInit().
 *
 * @param[in] name the name of the memory pool variable
 * @param[in] size size of the memory pool contained objects
 * @param[in] provider memory provider function for the memory pool or @p NULL
 *                     if the pool is not allowed to grow automatically
 */
#define MEMORYPOOL_DECL(name, size, provider)                               \
  MemoryPool name = _MEMORYPOOL_DATA(name, size, provider)

/**
 * @name    Macro Functions
 * @{
 */
/**
 * @brief   Adds an object to a memory pool.
 * @pre     The memory pool must be already been initialized.
 * @pre     The added object must be of the right size for the specified
 *          memory pool.
 * @pre     The added object must be memory aligned to the size of
 *          @p stkalign_t type.
 * @note    This function is just an alias for @p chPoolFree() and has been
 *          added for clarity.
 *
 * @param[in] mp        pointer to a @p MemoryPool structure
 * @param[in] objp      the pointer to the object to be added
 *
 * @api
 */
#define chPoolAdd(mp, objp) chPoolFree(mp, objp)

/**
 * @brief   Adds an object to a memory pool.
 * @pre     The memory pool must be already been initialized.
 * @pre     The added object must be of the right size for the specified
 *          memory pool.
 * @pre     The added object must be memory aligned to the size of
 *          @p stkalign_t type.
 * @note    This function is just an alias for @p chPoolFree() and has been
 *          added for clarity.
 *
 * @param[in] mp        pointer to a @p MemoryPool structure
 * @param[in] objp      the pointer to the object to be added
 *
 * @iclass
 */
#define chPoolAddI(mp, objp) chPoolFreeI(mp, objp)
/** @} */

#ifdef __cplusplus
extern "C" {
#endif
  void chPoolInit(MemoryPool *mp, size_t size, memgetfunc_t provider);
  void chPoolLoadArray(MemoryPool *mp, void *p, size_t n);
  void *chPoolAllocI(MemoryPool *mp);
  void *chPoolAlloc(MemoryPool *mp);
  void chPoolFreeI(MemoryPool *mp, void *objp);
  void chPoolFree(MemoryPool *mp, void *objp);
#ifdef __cplusplus
}
#endif

#endif /* CH_USE_MEMPOOLS */

#endif /* _CHMEMPOOLS_H_ */

/** @} */
cp">#define _IA64_REG_AR_FPSR 3112 #define _IA64_REG_AR_ITC 3116 #define _IA64_REG_AR_PFS 3136 #define _IA64_REG_AR_LC 3137 #define _IA64_REG_AR_EC 3138 /* Control Registers */ #define _IA64_REG_CR_DCR 4096 #define _IA64_REG_CR_ITM 4097 #define _IA64_REG_CR_IVA 4098 #define _IA64_REG_CR_PTA 4104 #define _IA64_REG_CR_IPSR 4112 #define _IA64_REG_CR_ISR 4113 #define _IA64_REG_CR_IIP 4115 #define _IA64_REG_CR_IFA 4116 #define _IA64_REG_CR_ITIR 4117 #define _IA64_REG_CR_IIPA 4118 #define _IA64_REG_CR_IFS 4119 #define _IA64_REG_CR_IIM 4120 #define _IA64_REG_CR_IHA 4121 #define _IA64_REG_CR_LID 4160 #define _IA64_REG_CR_IVR 4161 /* getreg only */ #define _IA64_REG_CR_TPR 4162 #define _IA64_REG_CR_EOI 4163 #define _IA64_REG_CR_IRR0 4164 /* getreg only */ #define _IA64_REG_CR_IRR1 4165 /* getreg only */ #define _IA64_REG_CR_IRR2 4166 /* getreg only */ #define _IA64_REG_CR_IRR3 4167 /* getreg only */ #define _IA64_REG_CR_ITV 4168 #define _IA64_REG_CR_PMV 4169 #define _IA64_REG_CR_CMCV 4170 #define _IA64_REG_CR_LRR0 4176 #define _IA64_REG_CR_LRR1 4177 /* Indirect Registers for getindreg() and setindreg() */ #define _IA64_REG_INDR_CPUID 9000 /* getindreg only */ #define _IA64_REG_INDR_DBR 9001 #define _IA64_REG_INDR_IBR 9002 #define _IA64_REG_INDR_PKR 9003 #define _IA64_REG_INDR_PMC 9004 #define _IA64_REG_INDR_PMD 9005 #define _IA64_REG_INDR_RR 9006 #ifdef __INTEL_COMPILER void __fc(uint64_t *addr); void __synci(void); void __isrlz(void); void __dsrlz(void); uint64_t __getReg(const int whichReg); uint64_t _InterlockedCompareExchange8_rel(volatile uint8_t *dest, uint64_t xchg, uint64_t comp); uint64_t _InterlockedCompareExchange8_acq(volatile uint8_t *dest, uint64_t xchg, uint64_t comp); uint64_t _InterlockedCompareExchange16_rel(volatile uint16_t *dest, uint64_t xchg, uint64_t comp); uint64_t _InterlockedCompareExchange16_acq(volatile uint16_t *dest, uint64_t xchg, uint64_t comp); uint64_t _InterlockedCompareExchange_rel(volatile uint32_t *dest, uint64_t xchg, uint64_t comp); uint64_t _InterlockedCompareExchange_acq(volatile uint32_t *dest, uint64_t xchg, uint64_t comp); uint64_t _InterlockedCompareExchange64_rel(volatile uint64_t *dest, uint64_t xchg, uint64_t comp); u64_t _InterlockedCompareExchange64_acq(volatile uint64_t *dest, uint64_t xchg, uint64_t comp); #define ia64_cmpxchg1_rel _InterlockedCompareExchange8_rel #define ia64_cmpxchg1_acq _InterlockedCompareExchange8_acq #define ia64_cmpxchg2_rel _InterlockedCompareExchange16_rel #define ia64_cmpxchg2_acq _InterlockedCompareExchange16_acq #define ia64_cmpxchg4_rel _InterlockedCompareExchange_rel #define ia64_cmpxchg4_acq _InterlockedCompareExchange_acq #define ia64_cmpxchg8_rel _InterlockedCompareExchange64_rel #define ia64_cmpxchg8_acq _InterlockedCompareExchange64_acq #define ia64_srlz_d __dsrlz #define ia64_srlz_i __isrlz #define __ia64_fc __fc #define ia64_sync_i __synci #define __ia64_getreg __getReg #else /* __INTEL_COMPILER */ #define ia64_cmpxchg1_acq(ptr, new, old) \ ({ \ uint64_t ia64_intri_res; \ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ia64_intri_res; \ }) #define ia64_cmpxchg1_rel(ptr, new, old) \ ({ \ uint64_t ia64_intri_res; \ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ia64_intri_res; \ }) #define ia64_cmpxchg2_acq(ptr, new, old) \ ({ \ uint64_t ia64_intri_res; \ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ia64_intri_res; \ }) #define ia64_cmpxchg2_rel(ptr, new, old) \ ({ \ uint64_t ia64_intri_res; \ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ \ asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ia64_intri_res; \ }) #define ia64_cmpxchg4_acq(ptr, new, old) \ ({ \ uint64_t ia64_intri_res; \ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ia64_intri_res; \ }) #define ia64_cmpxchg4_rel(ptr, new, old) \ ({ \ uint64_t ia64_intri_res; \ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ia64_intri_res; \ }) #define ia64_cmpxchg8_acq(ptr, new, old) \ ({ \ uint64_t ia64_intri_res; \ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ia64_intri_res; \ }) #define ia64_cmpxchg8_rel(ptr, new, old) \ ({ \ uint64_t ia64_intri_res; \ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ \ asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ia64_intri_res; \ }) #define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory") #define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory"); #define __ia64_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory") #define ia64_sync_i() asm volatile (";; sync.i" ::: "memory") register unsigned long ia64_r13 asm ("r13") __attribute_used__; #define __ia64_getreg(regnum) \ ({ \ uint64_t ia64_intri_res; \ \ switch (regnum) { \ case _IA64_REG_GP: \ asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \ break; \ case _IA64_REG_IP: \ asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \ break; \ case _IA64_REG_PSR: \ asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \ break; \ case _IA64_REG_TP: /* for current() */ \ ia64_intri_res = ia64_r13; \ break; \ case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \ asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \ : "i"(regnum - _IA64_REG_AR_KR0)); \ break; \ case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \ asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \ : "i" (regnum - _IA64_REG_CR_DCR)); \ break; \ case _IA64_REG_SP: \ asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \ break; \ default: \ ia64_bad_param_for_getreg(); \ break; \ } \ ia64_intri_res; \ }) #endif /* __INTEL_COMPILER */ #endif /* IA64_INTRINSIC_H */