blob: 4c49e92f4a4e8a48c4de161dc9062926954e147f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
|
/*
ChibiOS - Copyright (C) 2016..2018 Theodore Ateba
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file DMAv1/xmega_dma_lld.c
* @brief AVR XMEGA DMA low level driver source file.
*
* @addtogroup DMA
* @{
*/
#include "hal.h"
/*==========================================================================*/
/* Driver exported variables. */
/*==========================================================================*/
/*==========================================================================*/
/* Driver local variables and types. */
/*==========================================================================*/
/*==========================================================================*/
/* Driver local functions. */
/*==========================================================================*/
/*==========================================================================*/
/* Driver interrupt handlers. */
/*==========================================================================*/
/**
* @brief ISR for DMA channel 0.
*
* @param[in] DMA_CH0_vect DMA controller channel0 interrupt vector.
*/
OSAL_IRQ_HANDLER(DMA_CH0_vect) {
OSAL_IRQ_PROLOGUE();
OSAL_IRQ_EPILOGUE();
}
/**
* @brief ISR for DMA channel 1.
*
* @param[in] DMA_CH1_vect DMA controller channel1 interrupt vector.
*/
OSAL_IRQ_HANDLER(DMA_CH1_vect) {
OSAL_IRQ_PROLOGUE();
OSAL_IRQ_EPILOGUE();
}
/**
* @brief ISR for DMA channel 2.
*
* @param[in] DMA_CH2_vect DMA controller channel2 interrupt vector.
*/
OSAL_IRQ_HANDLER(DMA_CH2_vect) {
OSAL_IRQ_PROLOGUE();
OSAL_IRQ_EPILOGUE();
}
/**
* @brief ISR for DMA channel 3.
*
* @param[in] DMA_CH3_vect DMA controller channel3 interrupt vector.
*/
OSAL_IRQ_HANDLER(DMA_CH3_vect) {
OSAL_IRQ_PROLOGUE();
OSAL_IRQ_EPILOGUE();
}
/*==========================================================================*/
/* Driver exported functions. */
/*==========================================================================*/
// Optional reload of source and destination addresses at the end of each:
// - Burst
// - Block
// - Tansaction
// Optional interrupt at the end of transaction
// Optional connection to CRC generator for CRC on DMA data
// void dma_lld_set_transfer_src() /* source. */
// void dma_lld_set_transfer_dst() /* Destination. */
// void dma_lld_set_transfer_trg() /* Trigger. */
// void dma_lld_set_transfer_siz() /* Size. (1, 2, 4 or 8). */
// void dma_lld_read()
// void dma_lld_write()
// void isr_on_transfer_complate()
// void dma_lld_set_double_buffer_mode()
// void isr_on_error_during_tranfer()
/**
* @brief Enable DMA controller.
*
* @param[in] dmacp pointer to the dma controller
*/
void dmaControllerEnable(DMA_t *dmacp) {
dmacp->CTRL |= DMA_ENABLE_bm;
}
/**
* @brief Disable DMA controller.
* @note On going transfers will be aborted.
*
* @param[in] dmacp pointer to the dma controller
*/
void dmaControllerDisable(DMA_t *dmacp) {
dmacp->CTRL &= ~(DMA_ENABLE_bm);
}
/**
* @brief Reset DMA controller.
* @pre The DMA controller must be disabled before to process to a reset.
*
* @param[in] dmacp pointer to the dma controller
*/
void damReset(void) {
DMA.CTRL &= ~DMA_ENABLE_bm; /* Disable the DMA before a reset. */
DMA.CTRL |= DMA_RESET_bm; /* Perform the reset of the DMA module. */
while(DMA.CTRL & DMA_RESET_bm); /* Wait until reset is complated. */
}
/**
* @brief Enable a DMA channel.
*
* @param[in] dmacp pointer to the dma channel
*/
void dmaChannelEnable(DMA_CH_t *dmacp) {
dmacp->CTRLA |= DMA_CH_ENABLE_bm;
}
/**
* @brief Disable a DMA channel.
*
* @param[in] dmacp pointer to the dma channel
*/
void dmaChannelDisable(DMA_CH_t *dmacp) {
dmacp->CTRLA &= ~DMA_CH_ENABLE_bm;
}
/**
* @brief Disable a DMA channel.
* @note This can only be done if the DMA channel is disable.
*
* @param[in] dmacp pointer to the dma channel
*/
void dmaChannelReset(DMA_CH_t *dmacp) {
}
void dmaEnableSingleShot(DMA_CH_t * dmacp ) {
dmacp->CTRLA |= DMA_CH_SINGLE_bm;
}
void dmaDisableSingleShot(DMA_CH_t * dmacp ) {
dmacp->CTRLA &= ~DMA_CH_SINGLE_bm;
}
void dmaSetTriggerSource(DMA_CH_t * dmacp, uint8_t trigger) {
dmacp->TRIGSRC = trigger;
}
void dmaStartTransfer(DMA_CH_t * dmacp) {
dmacp->CTRLA |= DMA_CH_TRFREQ_bm;
}
//#endif /* HAL_USE_DMA */
/** @} */
|
