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/*
    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
    You may obtain a copy of the License at

        http://www.apache.org/licenses/LICENSE-2.0

    Unless required by applicable law or agreed to in writing, software
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
    limitations under the License.
*/

#include "ch.h"
#include "hal.h"
#include "rt_test_root.h"
#include "oslib_test_root.h"

/*
 * Green LED blinker thread, times are in milliseconds.
 */
static THD_WORKING_AREA(waThread1, 128);
static THD_FUNCTION(Thread1, arg) {

  (void)arg;
  chRegSetThreadName("blinker");
  while (true) {
    palClearLine(LINE_LED_GREEN);
    chThdSleepMilliseconds(500);
    palSetLine(LINE_LED_GREEN);
    chThdSleepMilliseconds(500);
  }
}

/*
 * Application entry point.
 */
int main(void) {

  /*
   * System initializations.
   * - HAL initialization, this also initializes the configured device drivers
   *   and performs the board-specific initializations.
   * - Kernel initialization, the main() function becomes a thread and the
   *   RTOS is active.
   */
  halInit();
  chSysInit();

  /*
   * Activates the serial driver 2 using the driver default configuration.
   */
  sdStart(&SD2, NULL);

  /*
   * Creates the blinker thread.
   */
  chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);

  /*
   * Normal main() thread activity, in this demo it does nothing except
   * sleeping in a loop and check the button state.
   */
  while (true) {
    if (!palReadLine(LINE_BUTTON)) {
      test_execute((BaseSequentialStream *)&SD2, &rt_test_suite);
      test_execute((BaseSequentialStream *)&SD2, &oslib_test_suite);
    }
    chThdSleepMilliseconds(500);
  }
}
pan>name; enum { TYPE_SINGLE, TYPE_CPU, TYPE_ARRAY, TYPE_S_SINGLE, TYPE_S_CPU, TYPE_S_ARRAY } type; int nr_elements; } perfc_info[] = { #include <xen/perfc_defn.h> }; #define NR_PERFCTRS (sizeof(perfc_info) / sizeof(perfc_info[0])) struct perfcounter_t perfcounters; void perfc_printall(unsigned char key) { int i, j, sum; s_time_t now = NOW(); atomic_t *counters = (atomic_t *)&perfcounters; printk("Xen performance counters SHOW (now = 0x%08X:%08X)\n", (u32)(now>>32), (u32)now); for ( i = 0; i < NR_PERFCTRS; i++ ) { printk("%-32s ", perfc_info[i].name); switch ( perfc_info[i].type ) { case TYPE_SINGLE: case TYPE_S_SINGLE: printk("TOTAL[%10d]", atomic_read(&counters[0])); counters += 1; break; case TYPE_CPU: case TYPE_S_CPU: for ( j = sum = 0; j < smp_num_cpus; j++ ) sum += atomic_read(&counters[j]); printk("TOTAL[%10d] ", sum); for ( j = 0; j < smp_num_cpus; j++ ) printk("CPU%02d[%10d] ", j, atomic_read(&counters[j])); counters += NR_CPUS; break; case TYPE_ARRAY: case TYPE_S_ARRAY: for ( j = sum = 0; j < perfc_info[i].nr_elements; j++ ) sum += atomic_read(&counters[j]); printk("TOTAL[%10d] ", sum); for ( j = 0; j < perfc_info[i].nr_elements; j++ ) printk("ARR%02d[%10d] ", j, atomic_read(&counters[j])); counters += j; break; } printk("\n"); } } void perfc_reset(unsigned char key) { int i, j, sum; s_time_t now = NOW(); atomic_t *counters = (atomic_t *)&perfcounters; if ( key != '\0' ) printk("Xen performance counters RESET (now = 0x%08X:%08X)\n", (u32)(now>>32), (u32)now); /* leave STATUS counters alone -- don't reset */ for ( i = 0; i < NR_PERFCTRS; i++ ) { switch ( perfc_info[i].type ) { case TYPE_SINGLE: atomic_set(&counters[0],0); case TYPE_S_SINGLE: counters += 1; break; case TYPE_CPU: for ( j = sum = 0; j < smp_num_cpus; j++ ) atomic_set(&counters[j],0); case TYPE_S_CPU: counters += NR_CPUS; break; case TYPE_ARRAY: for ( j = sum = 0; j < perfc_info[i].nr_elements; j++ ) atomic_set(&counters[j],0); case TYPE_S_ARRAY: counters += perfc_info[i].nr_elements; break; } } } static dom0_perfc_desc_t perfc_d[NR_PERFCTRS]; static int perfc_init = 0; static int perfc_copy_info(dom0_perfc_desc_t *desc) { unsigned int i, j; atomic_t *counters = (atomic_t *)&perfcounters; if ( desc == NULL ) return 0; /* We only copy the name and array-size information once. */ if ( !perfc_init ) { for ( i = 0; i < NR_PERFCTRS; i++ ) { strncpy(perfc_d[i].name, perfc_info[i].name, sizeof(perfc_d[i].name)); perfc_d[i].name[sizeof(perfc_d[i].name)-1] = '\0'; switch ( perfc_info[i].type ) { case TYPE_SINGLE: case TYPE_S_SINGLE: perfc_d[i].nr_vals = 1; break; case TYPE_CPU: case TYPE_S_CPU: perfc_d[i].nr_vals = smp_num_cpus; break; case TYPE_ARRAY: case TYPE_S_ARRAY: perfc_d[i].nr_vals = perfc_info[i].nr_elements; break; } if ( perfc_d[i].nr_vals > ARRAY_SIZE(perfc_d[i].vals) ) perfc_d[i].nr_vals = ARRAY_SIZE(perfc_d[i].vals); } perfc_init = 1; } /* We gather the counts together every time. */ for ( i = 0; i < NR_PERFCTRS; i++ ) { switch ( perfc_info[i].type ) { case TYPE_SINGLE: case TYPE_S_SINGLE: perfc_d[i].vals[0] = atomic_read(&counters[0]); counters += 1; break; case TYPE_CPU: case TYPE_S_CPU: for ( j = 0; j < perfc_d[i].nr_vals; j++ ) perfc_d[i].vals[j] = atomic_read(&counters[j]); counters += NR_CPUS; break; case TYPE_ARRAY: case TYPE_S_ARRAY: for ( j = 0; j < perfc_d[i].nr_vals; j++ ) perfc_d[i].vals[j] = atomic_read(&counters[j]); counters += perfc_info[i].nr_elements; break; } } return (copy_to_user(desc, perfc_d, NR_PERFCTRS * sizeof(*desc)) ? -EFAULT : 0); } /* Dom0 control of perf counters */ int perfc_control(dom0_perfccontrol_t *pc) { static spinlock_t lock = SPIN_LOCK_UNLOCKED; u32 op = pc->op; int rc; pc->nr_counters = NR_PERFCTRS; spin_lock(&lock); switch ( op ) { case DOM0_PERFCCONTROL_OP_RESET: perfc_copy_info(pc->desc); perfc_reset(0); rc = 0; break; case DOM0_PERFCCONTROL_OP_QUERY: perfc_copy_info(pc->desc); rc = 0; break; default: rc = -EINVAL; break; } spin_unlock(&lock); return rc; }