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/*
    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
    You may obtain a copy of the License at

        http://www.apache.org/licenses/LICENSE-2.0

    Unless required by applicable law or agreed to in writing, software
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
    limitations under the License.
*/

#ifndef MCUCONF_H
#define MCUCONF_H

#define STM32F103_MCUCONF

/*
 * STM32F103 drivers configuration.
 * The following settings override the default settings present in
 * the various device driver implementation headers.
 * Note that the settings for each driver only have effect if the whole
 * driver is enabled in halconf.h.
 *
 * IRQ priorities:
 * 15...0       Lowest...Highest.
 *
 * DMA priorities:
 * 0...3        Lowest...Highest.
 */

/*
 * HAL driver system settings.
 */
#define STM32_NO_INIT                       FALSE
#define STM32_HSI_ENABLED                   TRUE
#define STM32_LSI_ENABLED                   FALSE
#define STM32_HSE_ENABLED                   TRUE
#define STM32_LSE_ENABLED                   FALSE
#define STM32_SW                            STM32_SW_PLL
#define STM32_PLLSRC                        STM32_PLLSRC_HSE
#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE                  9
#define STM32_HPRE                          STM32_HPRE_DIV1
#define STM32_PPRE1                         STM32_PPRE1_DIV2
#define STM32_PPRE2                         STM32_PPRE2_DIV2
#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
#define STM32_USB_CLOCK_REQUIRED            TRUE
#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
#define STM32_PVD_ENABLE                    FALSE
#define STM32_PLS                           STM32_PLS_LEV0

/*
 * IRQ system settings.
 */
#define STM32_IRQ_EXTI0_PRIORITY            6
#define STM32_IRQ_EXTI1_PRIORITY            6
#define STM32_IRQ_EXTI2_PRIORITY            6
#define STM32_IRQ_EXTI3_PRIORITY            6
#define STM32_IRQ_EXTI4_PRIORITY            6
#define STM32_IRQ_EXTI5_9_PRIORITY          6
#define STM32_IRQ_EXTI10_15_PRIORITY        6
#define STM32_IRQ_EXTI16_PRIORITY           6
#define STM32_IRQ_EXTI17_PRIORITY           6
#define STM32_IRQ_EXTI18_PRIORITY           6
#define STM32_IRQ_EXTI19_PRIORITY           6

/*
 * ADC driver system settings.
 */
#define STM32_ADC_USE_ADC1                  FALSE
#define STM32_ADC_ADC1_DMA_PRIORITY         2
#define STM32_ADC_ADC1_IRQ_PRIORITY         6

/*
 * CAN driver system settings.
 */
#define STM32_CAN_USE_CAN1                  FALSE
#define STM32_CAN_CAN1_IRQ_PRIORITY         11

/*
 * GPT driver system settings.
 */
#define STM32_GPT_USE_TIM1                  FALSE
#define STM32_GPT_USE_TIM2                  FALSE
#define STM32_GPT_USE_TIM3                  FALSE
#define STM32_GPT_USE_TIM4                  FALSE
#define STM32_GPT_USE_TIM5                  FALSE
#define STM32_GPT_USE_TIM8                  FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY         7
#define STM32_GPT_TIM2_IRQ_PRIORITY         7
#define STM32_GPT_TIM3_IRQ_PRIORITY         7
#define STM32_GPT_TIM4_IRQ_PRIORITY         7
#define STM32_GPT_TIM5_IRQ_PRIORITY         7
#define STM32_GPT_TIM8_IRQ_PRIORITY         7

/*
 * I2C driver system settings.
 */
#define STM32_I2C_USE_I2C1                  FALSE
#define STM32_I2C_USE_I2C2                  FALSE
#define STM32_I2C_BUSY_TIMEOUT              50
#define STM32_I2C_I2C1_IRQ_PRIORITY         5
#define STM32_I2C_I2C2_IRQ_PRIORITY         5
#define STM32_I2C_I2C1_DMA_PRIORITY         3
#define STM32_I2C_I2C2_DMA_PRIORITY         3
#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

/*
 * ICU driver system settings.
 */
#define STM32_ICU_USE_TIM1                  FALSE
#define STM32_ICU_USE_TIM2                  FALSE
#define STM32_ICU_USE_TIM3                  FALSE
#define STM32_ICU_USE_TIM4                  FALSE
#define STM32_ICU_USE_TIM5                  FALSE
#define STM32_ICU_USE_TIM8                  FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY         7
#define STM32_ICU_TIM2_IRQ_PRIORITY         7
#define STM32_ICU_TIM3_IRQ_PRIORITY         7
#define STM32_ICU_TIM4_IRQ_PRIORITY         7
#define STM32_ICU_TIM5_IRQ_PRIORITY         7
#define STM32_ICU_TIM8_IRQ_PRIORITY         7

/*
 * PWM driver system settings.
 */
#define STM32_PWM_USE_ADVANCED              FALSE
#define STM32_PWM_USE_TIM1                  FALSE
#define STM32_PWM_USE_TIM2                  FALSE
#define STM32_PWM_USE_TIM3                  FALSE
#define STM32_PWM_USE_TIM4                  FALSE
#define STM32_PWM_USE_TIM5                  FALSE
#define STM32_PWM_USE_TIM8                  FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY         7
#define STM32_PWM_TIM2_IRQ_PRIORITY         7
#define STM32_PWM_TIM3_IRQ_PRIORITY         7
#define STM32_PWM_TIM4_IRQ_PRIORITY         7
#define STM32_PWM_TIM5_IRQ_PRIORITY         7
#define STM32_PWM_TIM8_IRQ_PRIORITY         7

/*
 * RTC driver system settings.
 */
#define STM32_RTC_IRQ_PRIORITY              15

/*
 * SERIAL driver system settings.
 */
#define STM32_SERIAL_USE_USART1             FALSE
#define STM32_SERIAL_USE_USART2             TRUE
#define STM32_SERIAL_USE_USART3             FALSE
#define STM32_SERIAL_USE_UART4              FALSE
#define STM32_SERIAL_USE_UART5              FALSE
#define STM32_SERIAL_USART1_PRIORITY        12
#define STM32_SERIAL_USART2_PRIORITY        12
#define STM32_SERIAL_USART3_PRIORITY        12
#define STM32_SERIAL_UART4_PRIORITY         12
#define STM32_SERIAL_UART5_PRIORITY         12

/*
 * SPI driver system settings.
 */
#define STM32_SPI_USE_SPI1                  FALSE
#define STM32_SPI_USE_SPI2                  FALSE
#define STM32_SPI_USE_SPI3                  FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY         1
#define STM32_SPI_SPI2_DMA_PRIORITY         1
#define STM32_SPI_SPI3_DMA_PRIORITY         1
#define STM32_SPI_SPI1_IRQ_PRIORITY         10
#define STM32_SPI_SPI2_IRQ_PRIORITY         10
#define STM32_SPI_SPI3_IRQ_PRIORITY         10
#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

/*
 * ST driver system settings.
 */
#define STM32_ST_IRQ_PRIORITY               8
#define STM32_ST_USE_TIMER                  2

/*
 * UART driver system settings.
 */
#define STM32_UART_USE_USART1               FALSE
#define STM32_UART_USE_USART2               FALSE
#define STM32_UART_USE_USART3               FALSE
#define STM32_UART_USART1_IRQ_PRIORITY      12
#define STM32_UART_USART2_IRQ_PRIORITY      12
#define STM32_UART_USART3_IRQ_PRIORITY      12
#define STM32_UART_USART1_DMA_PRIORITY      0
#define STM32_UART_USART2_DMA_PRIORITY      0
#define STM32_UART_USART3_DMA_PRIORITY      0
#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

/*
 * USB driver system settings.
 */
#define STM32_USB_USE_USB1                  FALSE
#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
#define STM32_USB_USB1_LP_IRQ_PRIORITY      14

/*
 * WDG driver system settings.
 */
#define STM32_WDG_USE_IWDG                  FALSE

#endif /* MCUCONF_H */
ithOffset; H_NEXT(&default_heap.header) = NULL; H_PAGES(&default_heap.header) = 0; #if (CH_CFG_USE_MUTEXES == TRUE) || defined(__DOXYGEN__) chMtxObjectInit(&default_heap.mtx); #else chSemObjectInit(&default_heap.sem, (cnt_t)1); #endif } /** * @brief Initializes a memory heap from a static memory area. * @note The heap buffer base and size are adjusted if the passed buffer * is not aligned to @p CH_HEAP_ALIGNMENT. This mean that the * effective heap size can be less than @p size. * * @param[out] heapp pointer to the memory heap descriptor to be initialized * @param[in] buf heap buffer base * @param[in] size heap size * * @init */ void chHeapObjectInit(memory_heap_t *heapp, void *buf, size_t size) { heap_header_t *hp = (heap_header_t *)MEM_ALIGN_NEXT(buf, CH_HEAP_ALIGNMENT); chDbgCheck((heapp != NULL) && (size > 0U)); /* Adjusting the size in case the initial block was not correctly aligned.*/ /*lint -save -e9033 [10.8] Required cast operations.*/ size -= (size_t)((uint8_t *)hp - (uint8_t *)buf); /*lint restore*/ /* Initializing the heap header.*/ heapp->provider = NULL; H_NEXT(&heapp->header) = hp; H_PAGES(&heapp->header) = 0; H_NEXT(hp) = NULL; H_PAGES(hp) = (size - sizeof (heap_header_t)) / CH_HEAP_ALIGNMENT; #if (CH_CFG_USE_MUTEXES == TRUE) || defined(__DOXYGEN__) chMtxObjectInit(&heapp->mtx); #else chSemObjectInit(&heapp->sem, (cnt_t)1); #endif } /** * @brief Allocates a block of memory from the heap by using the first-fit * algorithm. * @details The allocated block is guaranteed to be properly aligned to the * specified alignment. * * @param[in] heapp pointer to a heap descriptor or @p NULL in order to * access the default heap. * @param[in] size the size of the block to be allocated. Note that the * allocated block may be a bit bigger than the requested * size for alignment and fragmentation reasons. * @param[in] align desired memory alignment * @return A pointer to the aligned allocated block. * @retval NULL if the block cannot be allocated. * * @api */ void *chHeapAllocAligned(memory_heap_t *heapp, size_t size, unsigned align) { heap_header_t *qp, *hp, *ahp; size_t pages; chDbgCheck((size > 0U) && MEM_IS_VALID_ALIGNMENT(align)); /* If an heap is not specified then the default system header is used.*/ if (heapp == NULL) { heapp = &default_heap; } /* Minimum alignment is constrained by the heap header structure size.*/ if (align < CH_HEAP_ALIGNMENT) { align = CH_HEAP_ALIGNMENT; } /* Size is converted in number of elementary allocation units.*/ pages = MEM_ALIGN_NEXT(size, CH_HEAP_ALIGNMENT) / CH_HEAP_ALIGNMENT; /* Taking heap mutex/semaphore.*/ H_LOCK(heapp); /* Start of the free blocks list.*/ qp = &heapp->header; while (H_NEXT(qp) != NULL) { /* Next free block.*/ hp = H_NEXT(qp); /* Pointer aligned to the requested alignment.*/ ahp = (heap_header_t *)MEM_ALIGN_NEXT(H_BLOCK(hp), align) - 1U; if ((ahp < H_LIMIT(hp)) && (pages <= NPAGES(H_LIMIT(hp), ahp + 1U))) { /* The block is large enough to contain a correctly aligned area of sufficient size.*/ if (ahp > hp) { /* The block is not properly aligned, must split it.*/ size_t bpages; bpages = NPAGES(H_LIMIT(hp), H_BLOCK(ahp)); H_PAGES(hp) = NPAGES(ahp, H_BLOCK(hp)); if (bpages > pages) { /* The block is bigger than required, must split the excess.*/ heap_header_t *fp; /* Creating the excess block.*/ fp = H_BLOCK(ahp) + pages; H_PAGES(fp) = (bpages - pages) - 1U; /* Linking the excess block.*/ H_NEXT(fp) = H_NEXT(hp); H_NEXT(hp) = fp; } hp = ahp; } else { /* The block is already properly aligned.*/ if (H_PAGES(hp) == pages) { /* Exact size, getting the whole block.*/ H_NEXT(qp) = H_NEXT(hp); } else { /* The block is bigger than required, must split the excess.*/ heap_header_t *fp; fp = H_BLOCK(hp) + pages; H_NEXT(fp) = H_NEXT(hp); H_PAGES(fp) = NPAGES(H_LIMIT(hp), H_BLOCK(fp)); H_NEXT(qp) = fp; } } /* Setting in the block owner heap and size.*/ H_SIZE(hp) = size; H_HEAP(hp) = heapp; /* Releasing heap mutex/semaphore.*/ H_UNLOCK(heapp); /*lint -save -e9087 [11.3] Safe cast.*/ return (void *)H_BLOCK(hp); /*lint -restore*/ } /* Next in the free blocks list.*/ qp = hp; } /* Releasing heap mutex/semaphore.*/ H_UNLOCK(heapp); /* More memory is required, tries to get it from the associated provider else fails.*/ if (heapp->provider != NULL) { ahp = heapp->provider((pages + 1U) * CH_HEAP_ALIGNMENT, align, sizeof (heap_header_t)); if (ahp != NULL) { hp = ahp - 1U; H_HEAP(hp) = heapp; H_SIZE(hp) = size; /*lint -save -e9087 [11.3] Safe cast.*/ return (void *)ahp; /*lint -restore*/ } } return NULL; } /** * @brief Frees a previously allocated memory block. * * @param[in] p pointer to the memory block to be freed * * @api */ void chHeapFree(void *p) { heap_header_t *qp, *hp; memory_heap_t *heapp; chDbgCheck((p != NULL) && MEM_IS_ALIGNED(p, CH_HEAP_ALIGNMENT)); /*lint -save -e9087 [11.3] Safe cast.*/ hp = (heap_header_t *)p - 1U; /*lint -restore*/ heapp = H_HEAP(hp); qp = &heapp->header; /* Size is converted in number of elementary allocation units.*/ H_PAGES(hp) = MEM_ALIGN_NEXT(H_SIZE(hp), CH_HEAP_ALIGNMENT) / CH_HEAP_ALIGNMENT; /* Taking heap mutex/semaphore.*/ H_LOCK(heapp); while (true) { chDbgAssert((hp < qp) || (hp >= H_LIMIT(qp)), "within free block"); if (((qp == &heapp->header) || (hp > qp)) && ((H_NEXT(qp) == NULL) || (hp < H_NEXT(qp)))) { /* Insertion after qp.*/ H_NEXT(hp) = H_NEXT(qp); H_NEXT(qp) = hp; /* Verifies if the newly inserted block should be merged.*/ if (H_LIMIT(hp) == H_NEXT(hp)) { /* Merge with the next block.*/ H_PAGES(hp) += H_PAGES(H_NEXT(hp)) + 1U; H_NEXT(hp) = H_NEXT(H_NEXT(hp)); } if ((H_LIMIT(qp) == hp)) { /* Merge with the previous block.*/ H_PAGES(qp) += H_PAGES(hp) + 1U; H_NEXT(qp) = H_NEXT(hp); } break; } qp = H_NEXT(qp); } /* Releasing heap mutex/semaphore.*/ H_UNLOCK(heapp); return; } /** * @brief Reports the heap status. * @note This function is meant to be used in the test suite, it should * not be really useful for the application code. * * @param[in] heapp pointer to a heap descriptor or @p NULL in order to * access the default heap. * @param[in] totalp pointer to a variable that will receive the total * fragmented free space or @ NULL * @param[in] largestp pointer to a variable that will receive the largest * free free block found space or @ NULL * @return The number of fragments in the heap. * * @api */ size_t chHeapStatus(memory_heap_t *heapp, size_t *totalp, size_t *largestp) { heap_header_t *qp; size_t n, tpages, lpages; if (heapp == NULL) { heapp = &default_heap; } H_LOCK(heapp); tpages = 0U; lpages = 0U; n = 0U; qp = &heapp->header; while (H_NEXT(qp) != NULL) { size_t pages = H_PAGES(H_NEXT(qp)); /* Updating counters.*/ n++; tpages += pages; if (pages > lpages) { lpages = pages; } qp = H_NEXT(qp); } /* Writing out fragmented free memory.*/ if (totalp != NULL) { *totalp = tpages * CH_HEAP_ALIGNMENT; } /* Writing out unfragmented free memory.*/ if (largestp != NULL) { *largestp = lpages * CH_HEAP_ALIGNMENT; } H_UNLOCK(heapp); return n; } #endif /* CH_CFG_USE_HEAP == TRUE */ /** @} */