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/*
    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
                 2011,2012 Giovanni Di Sirio.

    This file is part of ChibiOS/RT.

    ChibiOS/RT is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.

    ChibiOS/RT is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
*/

/*
 * STM32F1xx drivers configuration.
 * The following settings override the default settings present in
 * the various device driver implementation headers.
 * Note that the settings for each driver only have effect if the whole
 * driver is enabled in halconf.h.
 *
 * IRQ priorities:
 * 15...0       Lowest...Highest.
 *
 * DMA priorities:
 * 0...3        Lowest...Highest.
 */

/*
 * HAL driver system settings.
 */
#define STM32_NO_INIT                       FALSE
#define STM32_HSI_ENABLED                   TRUE
#define STM32_LSI_ENABLED                   FALSE
#define STM32_HSE_ENABLED                   TRUE
#define STM32_LSE_ENABLED                   FALSE
#define STM32_SW                            STM32_SW_PLL
#define STM32_PLLSRC                        STM32_PLLSRC_HSE
#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE                  9
#define STM32_HPRE                          STM32_HPRE_DIV1
#define STM32_PPRE1                         STM32_PPRE1_DIV2
#define STM32_PPRE2                         STM32_PPRE2_DIV2
#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
#define STM32_USB_CLOCK_REQUIRED            TRUE
#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
#define STM32_PVD_ENABLE                    FALSE
#define STM32_PLS                           STM32_PLS_LEV0

/*
 * ADC driver system settings.
 */
#define STM32_ADC_USE_ADC1                  TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY         2
#define STM32_ADC_ADC1_IRQ_PRIORITY         5

/*
 * CAN driver system settings.
 */
#define STM32_CAN_USE_CAN1                  TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY         11

/*
 * EXT driver system settings.
 */
#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

/*
 * GPT driver system settings.
 */
#define STM32_GPT_USE_TIM1                  FALSE
#define STM32_GPT_USE_TIM2                  FALSE
#define STM32_GPT_USE_TIM3                  FALSE
#define STM32_GPT_USE_TIM4                  FALSE
#define STM32_GPT_USE_TIM5                  FALSE
#define STM32_GPT_USE_TIM8                  FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY         7
#define STM32_GPT_TIM2_IRQ_PRIORITY         7
#define STM32_GPT_TIM3_IRQ_PRIORITY         7
#define STM32_GPT_TIM4_IRQ_PRIORITY         7
#define STM32_GPT_TIM5_IRQ_PRIORITY         7
#define STM32_GPT_TIM8_IRQ_PRIORITY         7

/*
 * I2C driver system settings.
 */
#define STM32_I2C_USE_I2C1                  FALSE
#define STM32_I2C_USE_I2C2                  FALSE
#define STM32_I2C_USE_I2C3                  FALSE
#define STM32_I2C_I2C1_IRQ_PRIORITY         10
#define STM32_I2C_I2C2_IRQ_PRIORITY         10
#define STM32_I2C_I2C3_IRQ_PRIORITY         10
#define STM32_I2C_I2C1_DMA_PRIORITY         1
#define STM32_I2C_I2C2_DMA_PRIORITY         1
#define STM32_I2C_I2C3_DMA_PRIORITY         1
#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()
#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()
#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()

/*
 * ICU driver system settings.
 */
#define STM32_ICU_USE_TIM1                  FALSE
#define STM32_ICU_USE_TIM2                  FALSE
#define STM32_ICU_USE_TIM3                  FALSE
#define STM32_ICU_USE_TIM4                  FALSE
#define STM32_ICU_USE_TIM5                  FALSE
#define STM32_ICU_USE_TIM8                  FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY         7
#define STM32_ICU_TIM2_IRQ_PRIORITY         7
#define STM32_ICU_TIM3_IRQ_PRIORITY         7
#define STM32_ICU_TIM4_IRQ_PRIORITY         7
#define STM32_ICU_TIM5_IRQ_PRIORITY         7
#define STM32_ICU_TIM8_IRQ_PRIORITY         7

/*
 * PWM driver system settings.
 */
#define STM32_PWM_USE_ADVANCED              FALSE
#define STM32_PWM_USE_TIM1                  FALSE
#define STM32_PWM_USE_TIM2                  FALSE
#define STM32_PWM_USE_TIM3                  FALSE
#define STM32_PWM_USE_TIM4                  FALSE
#define STM32_PWM_USE_TIM5                  FALSE
#define STM32_PWM_USE_TIM8                  FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY         7
#define STM32_PWM_TIM2_IRQ_PRIORITY         7
#define STM32_PWM_TIM3_IRQ_PRIORITY         7
#define STM32_PWM_TIM4_IRQ_PRIORITY         7
#define STM32_PWM_TIM5_IRQ_PRIORITY         7
#define STM32_PWM_TIM8_IRQ_PRIORITY         7

/*
 * RTC driver system settings.
 */
#define STM32_RTC_IRQ_PRIORITY              15

/*
 * SERIAL driver system settings.
 */
#define STM32_SERIAL_USE_USART1             FALSE
#define STM32_SERIAL_USE_USART2             TRUE
#define STM32_SERIAL_USE_USART3             FALSE
#define STM32_SERIAL_USE_UART4              FALSE
#define STM32_SERIAL_USE_UART5              FALSE
#define STM32_SERIAL_USE_USART6             FALSE
#define STM32_SERIAL_USART1_PRIORITY        12
#define STM32_SERIAL_USART2_PRIORITY        12
#define STM32_SERIAL_USART3_PRIORITY        12
#define STM32_SERIAL_UART4_PRIORITY         12
#define STM32_SERIAL_UART5_PRIORITY         12
#define STM32_SERIAL_USART6_PRIORITY        12

/*
 * SPI driver system settings.
 */
#define STM32_SPI_USE_SPI1                  FALSE
#define STM32_SPI_USE_SPI2                  FALSE
#define STM32_SPI_USE_SPI3                  FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY         1
#define STM32_SPI_SPI2_DMA_PRIORITY         1
#define STM32_SPI_SPI3_DMA_PRIORITY         1
#define STM32_SPI_SPI1_IRQ_PRIORITY         10
#define STM32_SPI_SPI2_IRQ_PRIORITY         10
#define STM32_SPI_SPI3_IRQ_PRIORITY         10
#define STM32_SPI_DMA_ERROR_HOOK(spip)      chSysHalt()

/*
 * UART driver system settings.
 */
#define STM32_UART_USE_USART1               FALSE
#define STM32_UART_USE_USART2               FALSE
#define STM32_UART_USE_USART3               FALSE
#define STM32_UART_USART1_IRQ_PRIORITY      12
#define STM32_UART_USART2_IRQ_PRIORITY      12
#define STM32_UART_USART3_IRQ_PRIORITY      12
#define STM32_UART_USART1_DMA_PRIORITY      0
#define STM32_UART_USART2_DMA_PRIORITY      0
#define STM32_UART_USART3_DMA_PRIORITY      0
#define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()

/*
 * USB driver system settings.
 */
#define STM32_USB_USE_USB1                  TRUE
#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
#define STM32_USB_USB1_LP_IRQ_PRIORITY      14
@p input_queue_t structure * @param[in] bp pointer to a memory area allocated as queue buffer * @param[in] size size of the queue buffer * @param[in] infy pointer to a callback function that is invoked when * data is read from the queue. The value can be @p NULL. * @param[in] link application defined pointer * * @init */ void iqObjectInit(input_queue_t *iqp, uint8_t *bp, size_t size, qnotify_t infy, void *link) { osalThreadQueueObjectInit(&iqp->q_waiting); iqp->q_counter = 0; iqp->q_buffer = bp; iqp->q_rdptr = bp; iqp->q_wrptr = bp; iqp->q_top = bp + size; iqp->q_notify = infy; iqp->q_link = link; } /** * @brief Resets an input queue. * @details All the data in the input queue is erased and lost, any waiting * thread is resumed with status @p MSG_RESET. * @note A reset operation can be used by a low level driver in order to * obtain immediate attention from the high level layers. * * @param[in] iqp pointer to an @p input_queue_t structure * * @iclass */ void iqResetI(input_queue_t *iqp) { osalDbgCheckClassI(); iqp->q_rdptr = iqp->q_buffer; iqp->q_wrptr = iqp->q_buffer; iqp->q_counter = 0; osalThreadDequeueAllI(&iqp->q_waiting, MSG_RESET); } /** * @brief Input queue write. * @details A byte value is written into the low end of an input queue. * * @param[in] iqp pointer to an @p input_queue_t structure * @param[in] b the byte value to be written in the queue * @return The operation status. * @retval MSG_OK if the operation has been completed with success. * @retval MSG_TIMEOUT if the queue is full and the operation cannot be * completed. * * @iclass */ msg_t iqPutI(input_queue_t *iqp, uint8_t b) { osalDbgCheckClassI(); if (iqIsFullI(iqp)) { return MSG_TIMEOUT; } iqp->q_counter++; *iqp->q_wrptr++ = b; if (iqp->q_wrptr >= iqp->q_top) { iqp->q_wrptr = iqp->q_buffer; } osalThreadDequeueNextI(&iqp->q_waiting, MSG_OK); return MSG_OK; } /** * @brief Input queue read with timeout. * @details This function reads a byte value from an input queue. If the queue * is empty then the calling thread is suspended until a byte arrives * in the queue or a timeout occurs. * @note The callback is invoked after removing a character from the * queue. * * @param[in] iqp pointer to an @p input_queue_t structure * @param[in] timeout the number of ticks before the operation timeouts, * the following special values are allowed: * - @a TIME_IMMEDIATE immediate timeout. * - @a TIME_INFINITE no timeout. * . * @return A byte value from the queue. * @retval MSG_TIMEOUT if the specified time expired. * @retval MSG_RESET if the queue has been reset. * * @api */ msg_t iqGetTimeout(input_queue_t *iqp, systime_t timeout) { uint8_t b; osalSysLock(); /* Waiting until there is a character available or a timeout occurs.*/ while (iqIsEmptyI(iqp)) { msg_t msg = osalThreadEnqueueTimeoutS(&iqp->q_waiting, timeout); if (msg < MSG_OK) { osalSysUnlock(); return msg; } } /* Getting the character from the queue.*/ iqp->q_counter--; b = *iqp->q_rdptr++; if (iqp->q_rdptr >= iqp->q_top) { iqp->q_rdptr = iqp->q_buffer; } /* Inform the low side that the queue has at least one slot available.*/ if (iqp->q_notify != NULL) { iqp->q_notify(iqp); } osalSysUnlock(); return (msg_t)b; } /** * @brief Input queue read with timeout. * @details The function reads data from an input queue into a buffer. The * operation completes when the specified amount of data has been * transferred or after the specified timeout or if the queue has * been reset. * @note The function is not atomic, if you need atomicity it is suggested * to use a semaphore or a mutex for mutual exclusion. * @note The callback is invoked after removing each character from the * queue. * * @param[in] iqp pointer to an @p input_queue_t structure * @param[out] bp pointer to the data buffer * @param[in] n the maximum amount of data to be transferred, the * value 0 is reserved * @param[in] timeout the number of ticks before the operation timeouts, * the following special values are allowed: * - @a TIME_IMMEDIATE immediate timeout. * - @a TIME_INFINITE no timeout. * . * @return The number of bytes effectively transferred. * * @api */ size_t iqReadTimeout(input_queue_t *iqp, uint8_t *bp, size_t n, systime_t timeout) { systime_t deadline; qnotify_t nfy = iqp->q_notify; size_t r = 0; osalDbgCheck(n > 0U); osalSysLock(); /* Time deadline for the whole operation, note the result is invalid when timeout is TIME_INFINITE or TIME_IMMEDIATE but in that case the deadline is not used.*/ deadline = osalOsGetSystemTimeX() + timeout; while (true) { /* Waiting until there is a character available or a timeout occurs.*/ while (iqIsEmptyI(iqp)) { msg_t msg; /* TIME_INFINITE and TIME_IMMEDIATE are handled differently, no deadline.*/ if ((timeout == TIME_INFINITE) || (timeout == TIME_IMMEDIATE)) { msg = osalThreadEnqueueTimeoutS(&iqp->q_waiting, timeout); } else { systime_t next_timeout = deadline - osalOsGetSystemTimeX(); /* Handling the case where the system time went past the deadline, in this case next becomes a very high number because the system time is an unsigned type.*/ if (next_timeout > timeout) { osalSysUnlock(); return r; } msg = osalThreadEnqueueTimeoutS(&iqp->q_waiting, next_timeout); } /* Anything except MSG_OK causes the operation to stop.*/ if (msg != MSG_OK) { osalSysUnlock(); return r; } } /* Getting the character from the queue.*/ iqp->q_counter--; *bp++ = *iqp->q_rdptr++; if (iqp->q_rdptr >= iqp->q_top) { iqp->q_rdptr = iqp->q_buffer; } /* Inform the low side that the queue has at least one slot available.*/ if (nfy != NULL) { nfy(iqp); } /* Giving a preemption chance in a controlled point.*/ osalSysUnlock(); r++; if (--n == 0U) { return r; } osalSysLock(); } } /** * @brief Initializes an output queue. * @details A Semaphore is internally initialized and works as a counter of * the free bytes in the queue. * @note The callback is invoked from within the S-Locked system state. * * @param[out] oqp pointer to an @p output_queue_t structure * @param[in] bp pointer to a memory area allocated as queue buffer * @param[in] size size of the queue buffer * @param[in] onfy pointer to a callback function that is invoked when * data is written to the queue. The value can be @p NULL. * @param[in] link application defined pointer * * @init */ void oqObjectInit(output_queue_t *oqp, uint8_t *bp, size_t size, qnotify_t onfy, void *link) { osalThreadQueueObjectInit(&oqp->q_waiting); oqp->q_counter = size; oqp->q_buffer = bp; oqp->q_rdptr = bp; oqp->q_wrptr = bp; oqp->q_top = bp + size; oqp->q_notify = onfy; oqp->q_link = link; } /** * @brief Resets an output queue. * @details All the data in the output queue is erased and lost, any waiting * thread is resumed with status @p MSG_RESET. * @note A reset operation can be used by a low level driver in order to * obtain immediate attention from the high level layers. * * @param[in] oqp pointer to an @p output_queue_t structure * * @iclass */ void oqResetI(output_queue_t *oqp) { osalDbgCheckClassI(); oqp->q_rdptr = oqp->q_buffer; oqp->q_wrptr = oqp->q_buffer; oqp->q_counter = qSizeX(oqp); osalThreadDequeueAllI(&oqp->q_waiting, MSG_RESET); } /** * @brief Output queue write with timeout. * @details This function writes a byte value to an output queue. If the queue * is full then the calling thread is suspended until there is space * in the queue or a timeout occurs. * @note The callback is invoked after putting the character into the * queue. * * @param[in] oqp pointer to an @p output_queue_t structure * @param[in] b the byte value to be written in the queue * @param[in] timeout the number of ticks before the operation timeouts, * the following special values are allowed: * - @a TIME_IMMEDIATE immediate timeout. * - @a TIME_INFINITE no timeout. * . * @return The operation status. * @retval MSG_OK if the operation succeeded. * @retval MSG_TIMEOUT if the specified time expired. * @retval MSG_RESET if the queue has been reset. * * @api */ msg_t oqPutTimeout(output_queue_t *oqp, uint8_t b, systime_t timeout) { osalSysLock(); /* Waiting until there is a slot available or a timeout occurs.*/ while (oqIsFullI(oqp)) { msg_t msg = osalThreadEnqueueTimeoutS(&oqp->q_waiting, timeout); if (msg < MSG_OK) { osalSysUnlock(); return msg; } } /* Putting the character into the queue.*/ oqp->q_counter--; *oqp->q_wrptr++ = b; if (oqp->q_wrptr >= oqp->q_top) { oqp->q_wrptr = oqp->q_buffer; } /* Inform the low side that the queue has at least one character available.*/ if (oqp->q_notify != NULL) { oqp->q_notify(oqp); } osalSysUnlock(); return MSG_OK; } /** * @brief Output queue read. * @details A byte value is read from the low end of an output queue. * * @param[in] oqp pointer to an @p output_queue_t structure * @return The byte value from the queue. * @retval MSG_TIMEOUT if the queue is empty. * * @iclass */ msg_t oqGetI(output_queue_t *oqp) { uint8_t b; osalDbgCheckClassI(); if (oqIsEmptyI(oqp)) { return MSG_TIMEOUT; } oqp->q_counter++; b = *oqp->q_rdptr++; if (oqp->q_rdptr >= oqp->q_top) { oqp->q_rdptr = oqp->q_buffer; } osalThreadDequeueNextI(&oqp->q_waiting, MSG_OK); return (msg_t)b; } /** * @brief Output queue write with timeout. * @details The function writes data from a buffer to an output queue. The * operation completes when the specified amount of data has been * transferred or after the specified timeout or if the queue has * been reset. * @note The function is not atomic, if you need atomicity it is suggested * to use a semaphore or a mutex for mutual exclusion. * @note The callback is invoked after putting each character into the * queue. * * @param[in] oqp pointer to an @p output_queue_t structure * @param[in] bp pointer to the data buffer * @param[in] n the maximum amount of data to be transferred, the * value 0 is reserved * @param[in] timeout the number of ticks before the operation timeouts, * the following special values are allowed: * - @a TIME_IMMEDIATE immediate timeout. * - @a TIME_INFINITE no timeout. * . * @return The number of bytes effectively transferred. * * @api */ size_t oqWriteTimeout(output_queue_t *oqp, const uint8_t *bp, size_t n, systime_t timeout) { systime_t deadline; qnotify_t nfy = oqp->q_notify; size_t w = 0; osalDbgCheck(n > 0U); osalSysLock(); /* Time deadline for the whole operation, note the result is invalid when timeout is TIME_INFINITE or TIME_IMMEDIATE but in that case the deadline is not used.*/ deadline = osalOsGetSystemTimeX() + timeout; while (true) { msg_t msg; while (oqIsFullI(oqp)) { /* TIME_INFINITE and TIME_IMMEDIATE are handled differently, no deadline.*/ if ((timeout == TIME_INFINITE) || (timeout == TIME_IMMEDIATE)) { msg = osalThreadEnqueueTimeoutS(&oqp->q_waiting, timeout); } else { systime_t next_timeout = deadline - osalOsGetSystemTimeX(); /* Handling the case where the system time went past the deadline, in this case next becomes a very high number because the system time is an unsigned type.*/ if (next_timeout > timeout) { osalSysUnlock(); return w; } msg = osalThreadEnqueueTimeoutS(&oqp->q_waiting, next_timeout); } /* Anything except MSG_OK causes the operation to stop.*/ if (msg != MSG_OK) { osalSysUnlock(); return w; } } /* Putting the character into the queue.*/ oqp->q_counter--; *oqp->q_wrptr++ = *bp++; if (oqp->q_wrptr >= oqp->q_top) { oqp->q_wrptr = oqp->q_buffer; } /* Inform the low side that the queue has at least one character available.*/ if (nfy != NULL) { nfy(oqp); } /* Giving a preemption chance in a controlled point.*/ osalSysUnlock(); w++; if (--n == 0U) { return w; } osalSysLock(); } } /** @} */