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* Improved common makefile rules.Giovanni Di Sirio2017-08-284-20/+20
* Minor changes in sama_xdmac driveredolomb2017-08-252-16/+15
* removed leftoverGiovanni Di Sirio2017-08-251-1/+0
* Fixed bug #879.Giovanni Di Sirio2017-08-252-4/+7
* Fixed bug #879.Giovanni Di Sirio2017-08-252-2/+2
* Added control on callback callingedolomb2017-08-251-2/+2
* Add tabulation.Theodore Ateba2017-08-241-3/+3
* Added XDMAC driveredolomb2017-08-243-0/+593
* Added pmc functions for XDMACxedolomb2017-08-241-2/+30
* Added sama_xdmac.hedolomb2017-08-241-1/+1
* Included DMAv1 Driveredolomb2017-08-241-1/+1
* Added dmaInit()edolomb2017-08-241-1/+1
* Fixed bug #878.Giovanni Di Sirio2017-08-241-5/+4
* Fixed bug #877.Giovanni Di Sirio2017-08-241-1/+11
* Fixed bug #876.Giovanni Di Sirio2017-08-241-0/+6
* Fixed bug #864.Giovanni Di Sirio2017-08-221-1/+1
* Fixed bug #874.Giovanni Di Sirio2017-08-221-2/+2
* Fixed bug #873.Giovanni Di Sirio2017-08-221-6/+6
* Tentative fix for L4 OTG.Giovanni Di Sirio2017-08-222-38/+49
* Tentative workaround for L4 OTG driver.Giovanni Di Sirio2017-08-204-10/+24
* Added check to verify that the matrix H64H32 clock ratio is compatible with m...isiora2017-08-181-12/+15
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10450 35acf78f-673a-041...isiora2017-08-181-2/+3
* Some renaming work for clearness.Giovanni Di Sirio2017-08-182-30/+31
* Added matrix H64H32 clock ratio.isiora2017-08-171-0/+13
* Added matrix clock ratio setting.isiora2017-08-171-2/+8
* Fixed SAMA_PIT define. Now it includes the dependency on busses clock ratio.isiora2017-08-171-1/+1
* Fixed compiler warning.isiora2017-08-161-4/+6
* Added debug asserts.isiora2017-08-162-6/+17
* Add LLD directory to the AVR XMEGA Low Level Drivers.Theodore Ateba2017-08-168-29/+29
* Modify AVR XMEGA platform according the new architecture.Theodore Ateba2017-08-161-10/+10
* Add low level driver directory and platfor for AVR MEGA.Theodore Ateba2017-08-1635-0/+0
* Fixed IVR addressisiora2017-08-141-2/+2
* Added init code to setup the secure VBAR.isiora2017-08-141-0/+5
* Added acknowledgement of PIT and AIC interrupt.isiora2017-08-141-2/+2
* Changed ST interrupt priority to 0, the lowest one.isiora2017-08-141-1/+1
* Fixed disable/enable macro.isiora2017-08-141-4/+4
* Fixed PLLA_MUL.isiora2017-08-141-1/+1
* Added a macro to acknowledge the current interrupt.isiora2017-08-141-0/+8
* The IRQ handlers are normal functions: deleted interrupt attribute to them.isiora2017-08-141-2/+2
* Enabled FIQ in _port_thread_startisiora2017-08-141-5/+6
* Remove the not implemented TIM lld files.Theodore Ateba2017-08-136-1922/+0
* Remove the not implemented USART lld files.Theodore Ateba2017-08-132-566/+0
* Update AVR tiny platform path according the new architecture and correct comm...Theodore Ateba2017-08-131-6/+6
* Update the platform name and comments.Theodore Ateba2017-08-131-3/+3
* Change the ATTiny GPIO files path according the new architecture and correct ...Theodore Ateba2017-08-133-7/+8
* Change the ATTiny TIM files path according the new architecture and correct c...Theodore Ateba2017-08-133-12/+12
* Change the ATTiny USART files path according the new architecture and correct...Theodore Ateba2017-08-133-7/+7
* Update the AVR Tiny Architecture.Theodore Ateba2017-08-1322-2/+2
* Fixed Bug #870Rocco Marco Guglielmi2017-08-131-1/+1
* Fixed number of vectors for newer devices.Giovanni Di Sirio2017-08-122-2/+2
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