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* Added dmaInit()edolomb2017-08-241-1/+1
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10473 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Fixed bug #878.Giovanni Di Sirio2017-08-241-5/+4
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* Fixed bug #877.Giovanni Di Sirio2017-08-241-1/+11
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10469 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Fixed bug #876.Giovanni Di Sirio2017-08-241-0/+6
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* Fixed bug #864.Giovanni Di Sirio2017-08-221-1/+1
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* Fixed bug #874.Giovanni Di Sirio2017-08-221-2/+2
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* Fixed bug #873.Giovanni Di Sirio2017-08-221-6/+6
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* Tentative fix for L4 OTG.Giovanni Di Sirio2017-08-222-38/+49
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* Tentative workaround for L4 OTG driver.Giovanni Di Sirio2017-08-204-10/+24
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10453 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Added check to verify that the matrix H64H32 clock ratio is compatible with ↵isiora2017-08-181-12/+15
| | | | | | master clock frequency. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10451 35acf78f-673a-0410-8e92-d51de3d6d3f4
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10450 ↵isiora2017-08-181-2/+3
| | | | 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Some renaming work for clearness.Giovanni Di Sirio2017-08-182-30/+31
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* Added matrix H64H32 clock ratio.isiora2017-08-171-0/+13
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10447 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Added matrix clock ratio setting.isiora2017-08-171-2/+8
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* Fixed SAMA_PIT define. Now it includes the dependency on busses clock ratio.isiora2017-08-171-1/+1
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* Fixed compiler warning.isiora2017-08-161-4/+6
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* Added debug asserts.isiora2017-08-162-6/+17
| | | | | | | | Fixed slow clock select. Added mainf measurement Tested XT main clock. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10438 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Add LLD directory to the AVR XMEGA Low Level Drivers.Theodore Ateba2017-08-168-29/+29
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* Modify AVR XMEGA platform according the new architecture.Theodore Ateba2017-08-161-10/+10
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* Add low level driver directory and platfor for AVR MEGA.Theodore Ateba2017-08-1635-0/+0
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10431 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Fixed IVR addressisiora2017-08-141-2/+2
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* Added init code to setup the secure VBAR.isiora2017-08-141-0/+5
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* Added acknowledgement of PIT and AIC interrupt.isiora2017-08-141-2/+2
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* Changed ST interrupt priority to 0, the lowest one.isiora2017-08-141-1/+1
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10427 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Fixed disable/enable macro.isiora2017-08-141-4/+4
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10426 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Fixed PLLA_MUL.isiora2017-08-141-1/+1
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* Added a macro to acknowledge the current interrupt.isiora2017-08-141-0/+8
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10424 35acf78f-673a-0410-8e92-d51de3d6d3f4
* The IRQ handlers are normal functions: deleted interrupt attribute to them.isiora2017-08-141-2/+2
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* Enabled FIQ in _port_thread_startisiora2017-08-141-5/+6
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* Remove the not implemented TIM lld files.Theodore Ateba2017-08-136-1922/+0
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10421 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Remove the not implemented USART lld files.Theodore Ateba2017-08-132-566/+0
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* Update AVR tiny platform path according the new architecture and correct ↵Theodore Ateba2017-08-131-6/+6
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10417 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Update the platform name and comments.Theodore Ateba2017-08-131-3/+3
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* Change the ATTiny GPIO files path according the new architecture and correct ↵Theodore Ateba2017-08-133-7/+8
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10415 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Change the ATTiny TIM files path according the new architecture and correct ↵Theodore Ateba2017-08-133-12/+12
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10414 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Change the ATTiny USART files path according the new architecture and ↵Theodore Ateba2017-08-133-7/+7
| | | | | | correct comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10413 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Update the AVR Tiny Architecture.Theodore Ateba2017-08-1322-2/+2
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* Fixed Bug #870Rocco Marco Guglielmi2017-08-131-1/+1
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* Fixed number of vectors for newer devices.Giovanni Di Sirio2017-08-122-2/+2
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* Added PIT implementation for ATSAMA5D2 (Still incomplete)Rocco Marco Guglielmi2017-08-112-0/+50
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* Minor changes in sama_pmc helper headerRocco Marco Guglielmi2017-08-111-3/+3
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* Minor changes in AIC pseudo driver.Rocco Marco Guglielmi2017-08-112-29/+39
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* Added platform file aic.cedolomb2017-08-111-1/+1
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* Added aic headeredolomb2017-08-111-0/+2
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* Added macros Enabled/Disabled write protectionedolomb2017-08-112-6/+24
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* Fixed Bug #869Rocco Marco Guglielmi2017-08-114-144/+155
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* Fixed comments.isiora2017-08-111-3/+3
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* Moved peripheral id definitions in sama5d2x.h.isiora2017-08-111-154/+0
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* Added peripheral ID masks.isiora2017-08-111-0/+90
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* Added PID 64-78isiora2017-08-111-4/+35
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generated by cgit v1.2.3 (git 2.25.1) at 2024-11-20 08:49:29 +0000