Added peripheral ID masks.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10392 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 90 insertions, 0 deletions

diff --git a/os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h b/os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h
index f827b6c03..c5543ca0a 100644
--- a/os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h
+++ b/os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h
@@ -166,6 +166,96 @@
 #define ID_CHIPID       (78) /**< \brief Chip ID (CHIPID) */
 
 #define ID_PERIPH_COUNT (79) /**< \brief Number of peripheral IDs */
+
+#define ID_SAIC_FIQ_MSK       (1 << (ID_SAIC_FIQ & 0x1F))
+#define ID_ARM_PMU_MSK        (1 << (ID_ARM_PMU & 0x1F))
+#define ID_PIT_MSK            (1 << (ID_PIT & 0x1F))
+#define ID_WDT_MSK            (1 << (ID_WDT & 0x1F))
+#define ID_GMAC0_MSK          (1 << (ID_GMAC0 & 0x1F))
+#define ID_XDMAC0_MSK         (1 << (ID_XDMAC0 & 0x1F))
+#define ID_XDMAC1_MSK         (1 << (ID_XDMAC1 & 0x1F))
+#define ID_ICM_MSK            (1 << (ID_ICM & 0x1F))
+#define ID_AES_MSK            (1 << (ID_AES & 0x1F))
+#define ID_AESB_MSK           (1 << (ID_AESB & 0x1F))
+#define ID_TDES_MSK           (1 << (ID_TDES & 0x1F))
+#define ID_SHA_MSK            (1 << (ID_SHA & 0x1F))
+#define ID_MPDDRC_MSK         (1 << (ID_MPDDRC & 0x1F))
+#define ID_MATRIX1_MSK        (1 << (ID_MATRIX1 & 0x1F))
+#define ID_MATRIX0_MSK        (1 << (ID_MATRIX0 & 0x1F))
+#define ID_SECUMOD_MSK        (1 << (ID_SECUMOD & 0x1F))
+#define ID_HSMC_MSK           (1 << (ID_HSMC & 0x1F))
+#define ID_PIOA_MSK           (1 << (ID_PIOA & 0x1F))
+#define ID_FLEXCOM0_MSK       (1 << (ID_FLEXCOM0 & 0x1F))
+#define ID_USART0_MSK         (1 << (ID_USART0 & 0x1F))
+#define ID_FCOMSPI0_MSK       (1 << (ID_FCOMSPI0 & 0x1F))
+#define ID_TWI0_MSK           (1 << (ID_TWI0 & 0x1F))
+#define ID_FLEXCOM1_MSK       (1 << (ID_FLEXCOM1 & 0x1F))
+#define ID_USART1_MSK         (1 << (ID_USART1 & 0x1F))
+#define ID_FCOMSPI1_MSK       (1 << (ID_FCOMSPI1 & 0x1F))
+#define ID_TWI1_MSK           (1 << (ID_TWI1 & 0x1F))
+#define ID_FLEXCOM2_MSK       (1 << (ID_FLEXCOM2 & 0x1F))
+#define ID_USART2_MSK         (1 << (ID_USART2 & 0x1F))
+#define ID_FCOMSPI2_MSK       (1 << (ID_FCOMSPI2 & 0x1F))
+#define ID_TWI2_MSK           (1 << (ID_TWI2 & 0x1F))
+#define ID_FLEXCOM3_MSK       (1 << (ID_FLEXCOM3 & 0x1F))
+#define ID_USART3_MSK         (1 << (ID_USART3 & 0x1F))
+#define ID_FCOMSPI3_MSK       (1 << (ID_FCOMSPI3 & 0x1F))
+#define ID_TWI3_MSK           (1 << (ID_TWI3 & 0x1F))
+#define ID_FLEXCOM4_MSK       (1 << (ID_FLEXCOM4 & 0x1F))
+#define ID_USART4_MSK         (1 << (ID_USART4 & 0x1F))
+#define ID_FCOMSPI4_MSK       (1 << (ID_FCOMSPI4 & 0x1F))
+#define ID_TWI4_MSK           (1 << (ID_TWI4 & 0x1F))
+#define ID_UART0_MSK          (1 << (ID_UART0 & 0x1F))
+#define ID_UART1_MSK          (1 << (ID_UART1 & 0x1F))
+#define ID_UART2_MSK          (1 << (ID_UART2 & 0x1F))
+#define ID_UART3_MSK          (1 << (ID_UART3 & 0x1F))
+#define ID_UART4_MSK          (1 << (ID_UART4 & 0x1F))
+#define ID_TWIHS0_MSK         (1 << (ID_TWIHS0 & 0x1F))
+#define ID_TWIHS1_MSK         (1 << (ID_TWIHS1 & 0x1F))
+#define ID_SDMMC0_MSK         (1 << (ID_SDMMC0 & 0x1F))
+#define ID_SDMMC1_MSK         (1 << (ID_SDMMC1 & 0x1F))
+#define ID_SPI0_MSK           (1 << (ID_SPI0 & 0x1F))
+#define ID_SPI1_MSK           (1 << (ID_SPI1 & 0x1F))
+#define ID_TC0_MSK            (1 << (ID_TC0 & 0x1F))
+#define ID_TC1_MSK            (1 << (ID_TC1 & 0x1F))
+#define ID_PWM_MSK            (1 << (ID_PWM & 0x1F))
+#define ID_ADC_MSK            (1 << (ID_ADC & 0x1F))
+#define ID_UHPHS_MSK          (1 << (ID_UHPHS & 0x1F))
+#define ID_UDPHS_MSK          (1 << (ID_UDPHS & 0x1F))
+#define ID_SSC0_MSK           (1 << (ID_SSC0 & 0x1F))
+#define ID_SSC1_MSK           (1 << (ID_SSC1 & 0x1F))
+#define ID_LCDC_MSK           (1 << (ID_LCDC & 0x1F))
+#define ID_ISC_MSK            (1 << (ID_ISC & 0x1F))
+#define ID_TRNG_MSK           (1 << (ID_TRNG & 0x1F))
+#define ID_PDMIC_MSK          (1 << (ID_PDMIC & 0x1F))
+#define ID_AIC_IRQ_MSK        (1 << (ID_AIC_IRQ & 0x1F))
+#define ID_SFC_MSK            (1 << (ID_SFC & 0x1F))
+#define ID_SECURAM_MSK        (1 << (ID_SECURAM & 0x1F))
+#define ID_QSPI0_MSK          (1 << (ID_QSPI0 & 0x1F))
+#define ID_QSPI1_MSK          (1 << (ID_QSPI1 & 0x1F))
+#define ID_I2SC0_MSK          (1 << (ID_I2SC0 & 0x1F))
+#define ID_I2SC1_MSK          (1 << (ID_I2SC1 & 0x1F))
+#define ID_CAN0_INT0_MSK      (1 << (ID_CAN0_INT0 & 0x1F))
+#define ID_CAN1_INT0_MSK      (1 << (ID_CAN1_INT0 & 0x1F))
+#define ID_CLASSD_MSK         (1 << (ID_CLASSD & 0x1F))
+#define ID_SFR_MSK            (1 << (ID_SFR & 0x1F))
+#define ID_SAIC_MSK           (1 << (ID_SAIC & 0x1F))
+#define ID_AIC_MSK            (1 << (ID_AIC & 0x1F))
+#define ID_L2CC_MSK           (1 << (ID_L2CC & 0x1F))
+#define ID_CAN0_INT1_MSK      (1 << (ID_CAN0_INT1 & 0x1F))
+#define ID_CAN1_INT1_MSK      (1 << (ID_CAN1_INT1 & 0x1F))
+#define ID_GMAC0_Q1_MSK       (1 << (ID_GMAC0_Q1 & 0x1F))
+#define ID_GMAC0_Q2_MSK       (1 << (ID_GMAC0_Q2 & 0x1F))
+#define ID_PIOB_MSK           (1 << (ID_PIOB & 0x1F))
+#define ID_PIOC_MSK           (1 << (ID_PIOC & 0x1F))
+#define ID_PIOD_MSK           (1 << (ID_PIOD & 0x1F))
+#define ID_SDMMC0_TIMER_MSK   (1 << (ID_SDMMC0_TIMER & 0x1F))
+#define ID_SDMMC1_TIMER_MSK   (1 << (ID_SDMMC1_TIMER & 0x1F))
+#define ID_SYSC_MSK           (1 << (ID_SYSC & 0x1F))
+#define ID_ACC_MSK            (1 << (ID_ACC & 0x1F))
+#define ID_RXLP_MSK           (1 << (ID_RXLP & 0x1F))
+#define ID_CHIPID_MSK         (1 << (ID_CHIPID & 0x1F))
+
 /**@} */
 
 #ifdef __cplusplus