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* Added matrix H64H32 clock ratio.isiora2017-08-171-0/+13
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10447 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Added matrix clock ratio setting.isiora2017-08-171-2/+8
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* Fixed SAMA_PIT define. Now it includes the dependency on busses clock ratio.isiora2017-08-171-1/+1
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* Fixed compiler warning.isiora2017-08-161-4/+6
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* Added debug asserts.isiora2017-08-162-6/+17
| | | | | | | | Fixed slow clock select. Added mainf measurement Tested XT main clock. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10438 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Add LLD directory to the AVR XMEGA Low Level Drivers.Theodore Ateba2017-08-168-29/+29
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* Modify AVR XMEGA platform according the new architecture.Theodore Ateba2017-08-161-10/+10
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* Add low level driver directory and platfor for AVR MEGA.Theodore Ateba2017-08-1635-0/+0
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* Added acknowledgement of PIT and AIC interrupt.isiora2017-08-141-2/+2
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* Changed ST interrupt priority to 0, the lowest one.isiora2017-08-141-1/+1
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* Fixed disable/enable macro.isiora2017-08-141-4/+4
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* Fixed PLLA_MUL.isiora2017-08-141-1/+1
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* Added a macro to acknowledge the current interrupt.isiora2017-08-141-0/+8
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* Remove the not implemented TIM lld files.Theodore Ateba2017-08-136-1922/+0
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* Remove the not implemented USART lld files.Theodore Ateba2017-08-132-566/+0
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* Update AVR tiny platform path according the new architecture and correct ↵Theodore Ateba2017-08-131-6/+6
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10417 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Update the platform name and comments.Theodore Ateba2017-08-131-3/+3
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* Change the ATTiny GPIO files path according the new architecture and correct ↵Theodore Ateba2017-08-133-7/+8
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10415 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Change the ATTiny TIM files path according the new architecture and correct ↵Theodore Ateba2017-08-133-12/+12
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10414 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Change the ATTiny USART files path according the new architecture and ↵Theodore Ateba2017-08-133-7/+7
| | | | | | correct comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10413 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Update the AVR Tiny Architecture.Theodore Ateba2017-08-1322-2/+2
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* Fixed Bug #870Rocco Marco Guglielmi2017-08-131-1/+1
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* Fixed number of vectors for newer devices.Giovanni Di Sirio2017-08-121-1/+1
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* Added PIT implementation for ATSAMA5D2 (Still incomplete)Rocco Marco Guglielmi2017-08-112-0/+50
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* Minor changes in sama_pmc helper headerRocco Marco Guglielmi2017-08-111-3/+3
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* Minor changes in AIC pseudo driver.Rocco Marco Guglielmi2017-08-112-29/+39
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* Added platform file aic.cedolomb2017-08-111-1/+1
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* Added aic headeredolomb2017-08-111-0/+2
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* Added macros Enabled/Disabled write protectionedolomb2017-08-112-6/+24
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* Fixed Bug #869Rocco Marco Guglielmi2017-08-114-144/+155
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* Moved peripheral id definitions in sama5d2x.h.isiora2017-08-111-154/+0
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* Added PID 64-78isiora2017-08-111-4/+35
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* Changed name of functionsedolomb2017-08-112-20/+16
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* Revertedisiora2017-08-101-3/+2
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* Movedisiora2017-08-101-0/+0
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* Movedisiora2017-08-101-0/+0
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* Added SAMA Advanced Interrupt Controller aicedolomb2017-08-101-2/+2
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* Added aicInit() functionedolomb2017-08-101-0/+1
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* add aic initedolomb2017-08-101-0/+1
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10382 ↵edolomb2017-08-101-8/+8
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* Add SAMA advanced interrupt controlleredolomb2017-08-102-0/+260
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* Improved SAMA registryRocco Marco Guglielmi2017-08-091-61/+124
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* Added sama_pmc and improved clock initRocco Marco Guglielmi2017-08-093-10/+173
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* Add Mattair Tech, MT Atmel AVR XMega 44-pin USB development board.Theodore Ateba2017-08-093-0/+159
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* Add AVR XMega PAL low level driver files.Theodore Ateba2017-08-093-0/+480
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* Add AVR XMega system tick low level driver files.Theodore Ateba2017-08-093-0/+281
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* Add AVR XMega hall and platform files.Theodore Ateba2017-08-093-0/+144
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* Fixed typoRocco Marco Guglielmi2017-08-081-1/+1
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* Added SAMA5D2x registryRocco Marco Guglielmi2017-08-082-0/+121
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* Complete clock tree initialization for ATSAMA5D2.Rocco Marco Guglielmi2017-08-073-23/+115
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generated by cgit v1.2.3 (git 2.25.1) at 2025-03-25 07:21:44 +0000