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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2017-08-09 21:37:20 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2017-08-09 21:37:20 +0000 |
| commit | 4075ea4f8bbddca665ebfb4c6dfb78f4cc82ef62 (patch) | |
| tree | 42f4c53eb752f6758204ea2f8b4fcc62c9bd87b8 /os/hal | |
| parent | f9ec8eaed614de52e2877308dd1a7800d4b2637f (diff) | |
| download | ChibiOS-4075ea4f8bbddca665ebfb4c6dfb78f4cc82ef62.tar.gz ChibiOS-4075ea4f8bbddca665ebfb4c6dfb78f4cc82ef62.tar.bz2 ChibiOS-4075ea4f8bbddca665ebfb4c6dfb78f4cc82ef62.zip | |
Improved SAMA registry
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10380 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/sama_registry.h | 185 |
1 files changed, 124 insertions, 61 deletions
diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_registry.h b/os/hal/ports/SAMA/SAMA5D2x/sama_registry.h index 689f56959..88d8802a5 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/sama_registry.h +++ b/os/hal/ports/SAMA/SAMA5D2x/sama_registry.h @@ -47,69 +47,132 @@ /*===========================================================================*/
/* SAMA5D27. */
/*===========================================================================*/
+
#if defined(SAMA5D27) || defined(__DOXYGEN__)
+
+/* AIC IDs. */
+#define SAMA_AIC_ARM 2U /**< ARM AIC Identifier. */
+#define SAMA_AIC_PIT 3U /**< PIT AIC Identifier. */
+#define SAMA_AIC_WDT 4U /**< WDT AIC Identifier. */
+#define SAMA_AIC_GMAC 5U /**< GMAC AIC Identifier. */
+#define SAMA_AIC_XDMAC0 6U /**< XDMAC0 AIC Identifier. */
+#define SAMA_AIC_XDMAC1 7U /**< XDMAC1 AIC Identifier. */
+#define SAMA_AIC_ICM 8U /**< ICM AIC Identifier. */
+#define SAMA_AIC_AES 9U /**< AES AIC Identifier. */
+#define SAMA_AIC_AESB 10U /**< AESB AIC Identifier. */
+#define SAMA_AIC_TDES 11U /**< TDES AIC Identifier. */
+#define SAMA_AIC_SHA 12U /**< SHA AIC Identifier. */
+#define SAMA_AIC_MPDDRC 13U /**< MPDDRC AIC Identifier. */
+#define SAMA_AIC_H32MX 14U /**< H32MX AIC Identifier. */
+#define SAMA_AIC_H64MX 15U /**< H64MX AIC Identifier. */
+#define SAMA_AIC_SECUMOD 16U /**< SECUMOD AIC Identifier. */
+#define SAMA_AIC_HSMC 17U /**< HSMC AIC Identifier. */
+#define SAMA_AIC_PIOA 18U /**< PIOA AIC Identifier. */
+#define SAMA_AIC_FLEXCOM0 19U /**< FLEXCOM0 AIC Identifier. */
+#define SAMA_AIC_FLEXCOM1 20U /**< FLEXCOM1 AIC Identifier. */
+#define SAMA_AIC_FLEXCOM2 21U /**< FLEXCOM2 AIC Identifier. */
+#define SAMA_AIC_FLEXCOM3 22U /**< FLEXCOM3 AIC Identifier. */
+#define SAMA_AIC_FLEXCOM4 23U /**< FLEXCOM4 AIC Identifier. */
+#define SAMA_AIC_UART0 24U /**< UART0 AIC Identifier. */
+#define SAMA_AIC_UART1 25U /**< UART1 AIC Identifier. */
+#define SAMA_AIC_UART2 26U /**< UART2 AIC Identifier. */
+#define SAMA_AIC_UART3 27U /**< UART3 AIC Identifier. */
+#define SAMA_AIC_UART4 28U /**< UART4 AIC Identifier. */
+#define SAMA_AIC_TWIHS0 29U /**< TWIHS0 AIC Identifier. */
+#define SAMA_AIC_TWIHS1 30U /**< TWIHS1 AIC Identifier. */
+#define SAMA_AIC_SDMMC0 31U /**< SDMMC0 AIC Identifier. */
+#define SAMA_AIC_SDMMC1 32U /**< SDMMC1 AIC Identifier. */
+#define SAMA_AIC_SPI0 33U /**< SPI0 AIC Identifier. */
+#define SAMA_AIC_SPI1 34U /**< SPI1 AIC Identifier. */
+#define SAMA_AIC_TC0 35U /**< TC0 AIC Identifier. */
+#define SAMA_AIC_TC1 36U /**< TC1 AIC Identifier. */
+#define SAMA_AIC_PWM 38U /**< PWM AIC Identifier. */
+#define SAMA_AIC_ADC 40U /**< ADC AIC Identifier. */
+#define SAMA_AIC_UHPHS 41U /**< UHPHS AIC Identifier. */
+#define SAMA_AIC_UDPHS 42U /**< UDPHS AIC Identifier. */
+#define SAMA_AIC_SSC0 43U /**< SSC0 AIC Identifier. */
+#define SAMA_AIC_SSC1 44U /**< SSC1 AIC Identifier. */
+#define SAMA_AIC_LCDC 45U /**< LCDC AIC Identifier. */
+#define SAMA_AIC_ISC 46U /**< ISC AIC Identifier. */
+#define SAMA_AIC_TRNG 47U /**< TRNG AIC Identifier. */
+#define SAMA_AIC_PDMIC 48U /**< PDMIC AIC Identifier. */
+#define SAMA_AIC_AIC0 49U /**< AIC AIC Identifier. */
+#define SAMA_AIC_SFC 50U /**< SFC AIC Identifier. */
+#define SAMA_AIC_SECURAM 51U /**< SECURAM AIC Identifier. */
+#define SAMA_AIC_QSPI0 52U /**< QSPI0 AIC Identifier. */
+#define SAMA_AIC_QSPI1 53U /**< QSPI1 AIC Identifier. */
+#define SAMA_AIC_I2SC0 54U /**< I2SC0 AIC Identifier. */
+#define SAMA_AIC_I2SC1 55U /**< I2SC1 AIC Identifier. */
+#define SAMA_AIC_MCAN0 56U /**< MCAN0 AIC Identifier. */
+#define SAMA_AIC_MCAN1 57U /**< MCAN1 AIC Identifier. */
+#define SAMA_AIC_PTC 58U /**< PTC AIC Identifier. */
+#define SAMA_AIC_CLASSD 59U /**< CLASSD AIC Identifier. */
+#define SAMA_AIC_SFR 60U /**< SFR AIC Identifier. */
+#define SAMA_AIC_SAIC1 61U /**< SAIC AIC Identifier. */
+#define SAMA_AIC_AIC1 62U /**< AIC AIC Identifier. */
+#define SAMA_AIC_L2CC 63U /**< L2CC AIC Identifier. */
+
/* PCM Peripheral IDs.*/
-#define SAMA_PID_SAIC0 (1 << 0) /**< SAIC0 FIQ PID. */
-#define SAMA_PID_ARM (1 << 2) /**< ARM PID. */
-#define SAMA_PID_PIT (1 << 3) /**< PIT PID. */
-#define SAMA_PID_WDT (1 << 4) /**< WDT PID. */
-#define SAMA_PID_GMAC (1 << 5) /**< GMAC PID. */
-#define SAMA_PID_XDMAC0 (1 << 6) /**< XDMAC0 PID. */
-#define SAMA_PID_XDMAC1 (1 << 7) /**< XDMAC1 PID. */
-#define SAMA_PID_ICM (1 << 8) /**< ICM PID. */
-#define SAMA_PID_AES (1 << 9) /**< AES PID. */
-#define SAMA_PID_AESB (1 << 10) /**< AESB PID. */
-#define SAMA_PID_TDES (1 << 11) /**< TDES PID. */
-#define SAMA_PID_SHA (1 << 12) /**< SHA PID. */
-#define SAMA_PID_MPDDRC (1 << 13) /**< MPDDRC PID. */
-#define SAMA_PID_H32MX (1 << 14) /**< H32MX PID. */
-#define SAMA_PID_H64MX (1 << 15) /**< H64MX PID. */
-#define SAMA_PID_SECUMOD (1 << 16) /**< SECUMOD PID. */
-#define SAMA_PID_HSMC (1 << 17) /**< HSMC PID. */
-#define SAMA_PID_PIOA (1 << 18) /**< PIOA PID. */
-#define SAMA_PID_FLEXCOM0 (1 << 19) /**< FLEXCOM0 PID. */
-#define SAMA_PID_FLEXCOM1 (1 << 20) /**< FLEXCOM1 PID. */
-#define SAMA_PID_FLEXCOM2 (1 << 21) /**< FLEXCOM2 PID. */
-#define SAMA_PID_FLEXCOM3 (1 << 22) /**< FLEXCOM3 PID. */
-#define SAMA_PID_FLEXCOM4 (1 << 23) /**< FLEXCOM4 PID. */
-#define SAMA_PID_UART0 (1 << 24) /**< UART0 PID. */
-#define SAMA_PID_UART1 (1 << 25) /**< UART1 PID. */
-#define SAMA_PID_UART2 (1 << 26) /**< UART2 PID. */
-#define SAMA_PID_UART3 (1 << 27) /**< UART3 PID. */
-#define SAMA_PID_UART4 (1 << 28) /**< UART4 PID. */
-#define SAMA_PID_TWIHS0 (1 << 29) /**< TWIHS0 PID. */
-#define SAMA_PID_TWIHS1 (1 << 30) /**< TWIHS1 PID. */
-#define SAMA_PID_SDMMC0 (1 << 31) /**< SDMMC0 PID. */
-#define SAMA_PID_SDMMC1 (1 << 0) /**< SDMMC1 PID. */
-#define SAMA_PID_SPI0 (1 << 1) /**< SPI0 PID. */
-#define SAMA_PID_SPI1 (1 << 2) /**< SPI1 PID. */
-#define SAMA_PID_TC0 (1 << 3) /**< TC0 PID. */
-#define SAMA_PID_TC1 (1 << 4) /**< TC1 PID. */
-#define SAMA_PID_PWM (1 << 6) /**< PWM PID. */
-#define SAMA_PID_ADC (1 << 8) /**< ADC PID. */
-#define SAMA_PID_UHPHS (1 << 9) /**< UHPHS PID. */
-#define SAMA_PID_UDPHS (1 << 10) /**< UDPHS PID. */
-#define SAMA_PID_SSC0 (1 << 11) /**< SSC0 PID. */
-#define SAMA_PID_SSC1 (1 << 12) /**< SSC1 PID. */
-#define SAMA_PID_LCDC (1 << 13) /**< LCDC PID. */
-#define SAMA_PID_ISC (1 << 14) /**< ISC PID. */
-#define SAMA_PID_TRNG (1 << 15) /**< TRNG PID. */
-#define SAMA_PID_PDMIC (1 << 16) /**< PDMIC PID. */
-#define SAMA_PID_AIC0 (1 << 17) /**< AIC PID. */
-#define SAMA_PID_SFC (1 << 18) /**< SFC PID. */
-#define SAMA_PID_SECURAM (1 << 19) /**< SECURAM PID. */
-#define SAMA_PID_QSPI0 (1 << 20) /**< QSPI0 PID. */
-#define SAMA_PID_QSPI1 (1 << 21) /**< QSPI1 PID. */
-#define SAMA_PID_I2SC0 (1 << 22) /**< I2SC0 PID. */
-#define SAMA_PID_I2SC1 (1 << 23) /**< I2SC1 PID. */
-#define SAMA_PID_MCAN0 (1 << 24) /**< MCAN0 PID. */
-#define SAMA_PID_MCAN1 (1 << 25) /**< MCAN1 PID. */
-#define SAMA_PID_PTC (1 << 26) /**< PTC PID. */
-#define SAMA_PID_CLASSD (1 << 27) /**< CLASSD PID. */
-#define SAMA_PID_SFR (1 << 28) /**< SFR PID. */
-#define SAMA_PID_SAIC1 (1 << 29) /**< SAIC PID. */
-#define SAMA_PID_AIC1 (1 << 30) /**< AIC PID. */
-#define SAMA_PID_L2CC (1 << 31) /**< L2CC PID. */
+#define SAMA_PID_ARM (1 << (SAMA_AIC_ARM & 0x1F))
+#define SAMA_PID_PIT (1 << (SAMA_AIC_PIT & 0x1F))
+#define SAMA_PID_WDT (1 << (SAMA_AIC_WDT & 0x1F))
+#define SAMA_PID_GMAC (1 << (SAMA_AIC_GMAC & 0x1F))
+#define SAMA_PID_XDMAC0 (1 << (SAMA_AIC_XDMAC0 & 0x1F))
+#define SAMA_PID_XDMAC1 (1 << (SAMA_AIC_XDMAC1 & 0x1F))
+#define SAMA_PID_ICM (1 << (SAMA_AIC_ICM & 0x1F))
+#define SAMA_PID_AES (1 << (SAMA_AIC_AES & 0x1F))
+#define SAMA_PID_AESB (1 << (SAMA_AIC_AESB & 0x1F))
+#define SAMA_PID_TDES (1 << (SAMA_AIC_TDES & 0x1F))
+#define SAMA_PID_SHA (1 << (SAMA_AIC_SHA & 0x1F))
+#define SAMA_PID_MPDDRC (1 << (SAMA_AIC_MPDDRC & 0x1F))
+#define SAMA_PID_H32MX (1 << (SAMA_AIC_H32MX & 0x1F))
+#define SAMA_PID_H64MX (1 << (SAMA_AIC_H64MX & 0x1F))
+#define SAMA_PID_SECUMOD (1 << (SAMA_AIC_SECUMOD & 0x1F))
+#define SAMA_PID_HSMC (1 << (SAMA_AIC_HSMC & 0x1F))
+#define SAMA_PID_FLEXCOM0 (1 << (SAMA_AIC_FLEXCOM0 & 0x1F))
+#define SAMA_PID_PIOA (1 << (SAMA_AIC_PIOA & 0x1F))
+#define SAMA_PID_FLEXCOM1 (1 << (SAMA_AIC_FLEXCOM1 & 0x1F))
+#define SAMA_PID_FLEXCOM2 (1 << (SAMA_AIC_FLEXCOM2 & 0x1F))
+#define SAMA_PID_FLEXCOM3 (1 << (SAMA_AIC_FLEXCOM3 & 0x1F))
+#define SAMA_PID_FLEXCOM4 (1 << (SAMA_AIC_FLEXCOM4 & 0x1F))
+#define SAMA_PID_UART0 (1 << (SAMA_AIC_UART0 & 0x1F))
+#define SAMA_PID_UART1 (1 << (SAMA_AIC_UART1 & 0x1F))
+#define SAMA_PID_UART2 (1 << (SAMA_AIC_UART2 & 0x1F))
+#define SAMA_PID_UART3 (1 << (SAMA_AIC_UART3 & 0x1F))
+#define SAMA_PID_UART4 (1 << (SAMA_AIC_UART4 & 0x1F))
+#define SAMA_PID_TWIHS0 (1 << (SAMA_AIC_TWIHS0 & 0x1F))
+#define SAMA_PID_TWIHS1 (1 << (SAMA_AIC_TWIHS1 & 0x1F))
+#define SAMA_PID_SDMMC0 (1 << (SAMA_AIC_SDMMC0 & 0x1F))
+#define SAMA_PID_SDMMC1 (1 << (SAMA_AIC_SDMMC1 & 0x1F))
+#define SAMA_PID_SPI0 (1 << (SAMA_AIC_SPI0 & 0x1F))
+#define SAMA_PID_SPI1 (1 << (SAMA_AIC_SPI1 & 0x1F))
+#define SAMA_PID_TC0 (1 << (SAMA_AIC_TC0 & 0x1F))
+#define SAMA_PID_TC1 (1 << (SAMA_AIC_TC1 & 0x1F))
+#define SAMA_PID_PWM (1 << (SAMA_AIC_PWM & 0x1F))
+#define SAMA_PID_ADC (1 << (SAMA_AIC_ADC & 0x1F))
+#define SAMA_PID_UHPHS (1 << (SAMA_AIC_UHPHS & 0x1F))
+#define SAMA_PID_UDPHS (1 << (SAMA_AIC_UDPHS & 0x1F))
+#define SAMA_PID_SSC0 (1 << (SAMA_AIC_SSC0 & 0x1F))
+#define SAMA_PID_SSC1 (1 << (SAMA_AIC_SSC1 & 0x1F))
+#define SAMA_PID_LCDC (1 << (SAMA_AIC_LCDC & 0x1F))
+#define SAMA_PID_ISC (1 << (SAMA_AIC_ISC & 0x1F))
+#define SAMA_PID_TRNG (1 << (SAMA_AIC_TRNG & 0x1F))
+#define SAMA_PID_PDMIC (1 << (SAMA_AIC_PDMIC & 0x1F))
+#define SAMA_PID_AIC0 (1 << (SAMA_AIC_AIC0 & 0x1F))
+#define SAMA_PID_SFC (1 << (SAMA_AIC_SFC & 0x1F))
+#define SAMA_PID_SECURAM (1 << (SAMA_AIC_SECURAM & 0x1F))
+#define SAMA_PID_QSPI0 (1 << (SAMA_AIC_QSPI0 & 0x1F))
+#define SAMA_PID_QSPI1 (1 << (SAMA_AIC_QSPI1 & 0x1F))
+#define SAMA_PID_I2SC0 (1 << (SAMA_AIC_I2SC0 & 0x1F))
+#define SAMA_PID_I2SC1 (1 << (SAMA_AIC_I2SC1 & 0x1F))
+#define SAMA_PID_MCAN0 (1 << (SAMA_AIC_MCAN0 & 0x1F))
+#define SAMA_PID_MCAN1 (1 << (SAMA_AIC_MCAN1 & 0x1F))
+#define SAMA_PID_PTC (1 << (SAMA_AIC_PTC & 0x1F))
+#define SAMA_PID_CLASSD (1 << (SAMA_AIC_CLASSD & 0x1F))
+#define SAMA_PID_SFR (1 << (SAMA_AIC_SFR & 0x1F))
+#define SAMA_PID_SAIC1 (1 << (SAMA_AIC_SAIC1 & 0x1F))
+#define SAMA_PID_AIC1 (1 << (SAMA_AIC_AIC1 & 0x1F))
+#define SAMA_PID_L2CC (1 << (SAMA_AIC_L2CC & 0x1F))
#endif /* defined(SAMA5D27) */
/** @} */
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