aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/ports
Commit message (Expand)AuthorAgeFilesLines
...
* Added dmaInit()edolomb2017-08-241-1/+1
* Fixed bug #878.Giovanni Di Sirio2017-08-241-5/+4
* Fixed bug #877.Giovanni Di Sirio2017-08-241-1/+11
* Fixed bug #876.Giovanni Di Sirio2017-08-241-0/+6
* Fixed bug #874.Giovanni Di Sirio2017-08-221-2/+2
* Fixed bug #873.Giovanni Di Sirio2017-08-221-6/+6
* Tentative fix for L4 OTG.Giovanni Di Sirio2017-08-221-37/+39
* Tentative workaround for L4 OTG driver.Giovanni Di Sirio2017-08-203-3/+14
* Added check to verify that the matrix H64H32 clock ratio is compatible with m...isiora2017-08-181-12/+15
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10450 35acf78f-673a-041...isiora2017-08-181-2/+3
* Added matrix H64H32 clock ratio.isiora2017-08-171-0/+13
* Added matrix clock ratio setting.isiora2017-08-171-2/+8
* Fixed SAMA_PIT define. Now it includes the dependency on busses clock ratio.isiora2017-08-171-1/+1
* Fixed compiler warning.isiora2017-08-161-4/+6
* Added debug asserts.isiora2017-08-162-6/+17
* Add LLD directory to the AVR XMEGA Low Level Drivers.Theodore Ateba2017-08-168-29/+29
* Modify AVR XMEGA platform according the new architecture.Theodore Ateba2017-08-161-10/+10
* Add low level driver directory and platfor for AVR MEGA.Theodore Ateba2017-08-1635-0/+0
* Added acknowledgement of PIT and AIC interrupt.isiora2017-08-141-2/+2
* Changed ST interrupt priority to 0, the lowest one.isiora2017-08-141-1/+1
* Fixed disable/enable macro.isiora2017-08-141-4/+4
* Fixed PLLA_MUL.isiora2017-08-141-1/+1
* Added a macro to acknowledge the current interrupt.isiora2017-08-141-0/+8
* Remove the not implemented TIM lld files.Theodore Ateba2017-08-136-1922/+0
* Remove the not implemented USART lld files.Theodore Ateba2017-08-132-566/+0
* Update AVR tiny platform path according the new architecture and correct comm...Theodore Ateba2017-08-131-6/+6
* Update the platform name and comments.Theodore Ateba2017-08-131-3/+3
* Change the ATTiny GPIO files path according the new architecture and correct ...Theodore Ateba2017-08-133-7/+8
* Change the ATTiny TIM files path according the new architecture and correct c...Theodore Ateba2017-08-133-12/+12
* Change the ATTiny USART files path according the new architecture and correct...Theodore Ateba2017-08-133-7/+7
* Update the AVR Tiny Architecture.Theodore Ateba2017-08-1322-2/+2
* Fixed Bug #870Rocco Marco Guglielmi2017-08-131-1/+1
* Fixed number of vectors for newer devices.Giovanni Di Sirio2017-08-121-1/+1
* Added PIT implementation for ATSAMA5D2 (Still incomplete)Rocco Marco Guglielmi2017-08-112-0/+50
* Minor changes in sama_pmc helper headerRocco Marco Guglielmi2017-08-111-3/+3
* Minor changes in AIC pseudo driver.Rocco Marco Guglielmi2017-08-112-29/+39
* Added platform file aic.cedolomb2017-08-111-1/+1
* Added aic headeredolomb2017-08-111-0/+2
* Added macros Enabled/Disabled write protectionedolomb2017-08-112-6/+24
* Moved peripheral id definitions in sama5d2x.h.isiora2017-08-111-154/+0
* Added PID 64-78isiora2017-08-111-4/+35
* Changed name of functionsedolomb2017-08-112-20/+16
* Revertedisiora2017-08-101-3/+2
* Movedisiora2017-08-101-0/+0
* Movedisiora2017-08-101-0/+0
* Added SAMA Advanced Interrupt Controller aicedolomb2017-08-101-2/+2
* Added aicInit() functionedolomb2017-08-101-0/+1
* add aic initedolomb2017-08-101-0/+1
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10382 35acf78f-673a-041...edolomb2017-08-101-8/+8
* Add SAMA advanced interrupt controlleredolomb2017-08-102-0/+260
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-03 00:28:47 +0000