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| author | edolomb <none@example.com> | 2017-08-11 13:54:22 +0000 |
|---|---|---|
| committer | edolomb <none@example.com> | 2017-08-11 13:54:22 +0000 |
| commit | b2bd02f3df7e59ea4e8618f3bcdb14cf860e797b (patch) | |
| tree | 48829f982e0eb600b5aead6e7259bbaa71ffbe01 /os/hal/ports | |
| parent | a152d4e54534be7ee3c00d47e656d8cc7e439379 (diff) | |
| download | ChibiOS-b2bd02f3df7e59ea4e8618f3bcdb14cf860e797b.tar.gz ChibiOS-b2bd02f3df7e59ea4e8618f3bcdb14cf860e797b.tar.bz2 ChibiOS-b2bd02f3df7e59ea4e8618f3bcdb14cf860e797b.zip | |
Added macros Enabled/Disabled write protection
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10398 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports')
| -rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/aic.c | 12 | ||||
| -rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/aic.h | 18 |
2 files changed, 24 insertions, 6 deletions
diff --git a/os/hal/ports/SAMA/SAMA5D2x/aic.c b/os/hal/ports/SAMA/SAMA5D2x/aic.c index 5be032cf0..311324a10 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/aic.c +++ b/os/hal/ports/SAMA/SAMA5D2x/aic.c @@ -83,7 +83,7 @@ void aicConfigureInt(uint32_t source, uint8_t prior) { Aic *aic = SAIC;
/* Disable write protection */
- aic->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD;
+ aicDisableWP(aic);
/* Set source id */
aic->AIC_SSR = source;
/* Disable the interrupt first */
@@ -93,7 +93,7 @@ void aicConfigureInt(uint32_t source, uint8_t prior) { /* Clear interrupt */
aic->AIC_ICCR = AIC_ICCR_INTCLR;
/* Enable write protection */
- aic->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD | AIC_WPMR_WPEN;
+ aicEnableWP(aic);
}
/**
@@ -107,12 +107,12 @@ void aicSetSourceVector(uint32_t source, bool (*handler)(void)) { Aic *aic = SAIC;
/* Disable write protection */
- aic->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD;
+ aicDisableWP(aic);
/* Select source and assign handler */
aic->AIC_SSR = AIC_SSR_INTSEL(source);
aic->AIC_SVR = (uint32_t)handler;
/* Enable write protection */
- aic->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD | AIC_WPMR_WPEN;
+ aicEnableWP(aic);
}
/**
@@ -125,11 +125,11 @@ void aicSetSpuriousVector(bool (*handler)(void)) { Aic *aic = SAIC;
/* Disable write protection */
- aic->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD;
+ aicDisableWP(aic);
/* Assign handler */
aic->AIC_SPU = (uint32_t)handler;
/* Enable write protection */
- aic->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD | AIC_WPMR_WPEN;
+ aicEnableWP(aic);
}
/**
diff --git a/os/hal/ports/SAMA/SAMA5D2x/aic.h b/os/hal/ports/SAMA/SAMA5D2x/aic.h index 8ee0fa8f7..efecaf6bb 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/aic.h +++ b/os/hal/ports/SAMA/SAMA5D2x/aic.h @@ -44,7 +44,25 @@ /*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
+/**
+ * @brief Enable write protection on AIC registers block.
+ *
+ * @param[in] aicx pointer to a AIC register block
+ * @api
+ */
+#define aicEnableWP(aic) { \
+ aic->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD | AIC_WPMR_WPEN; \
+}
+/**
+ * @brief Disable write protection on AIC registers block.
+ *
+ * @param[in] aicx pointer to a AIC register block
+ * @api
+ */
+#define aicDisableWP(aic) { \
+ aic->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD; \
+}
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
|