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* Added check to verify that the matrix H64H32 clock ratio is compatible with m...isiora2017-08-181-12/+15
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10450 35acf78f-673a-041...isiora2017-08-181-2/+3
* Added matrix H64H32 clock ratio.isiora2017-08-171-0/+13
* Added matrix clock ratio setting.isiora2017-08-171-2/+8
* Fixed SAMA_PIT define. Now it includes the dependency on busses clock ratio.isiora2017-08-171-1/+1
* Fixed compiler warning.isiora2017-08-161-4/+6
* Added debug asserts.isiora2017-08-162-6/+17
* Added acknowledgement of PIT and AIC interrupt.isiora2017-08-141-2/+2
* Changed ST interrupt priority to 0, the lowest one.isiora2017-08-141-1/+1
* Fixed disable/enable macro.isiora2017-08-141-4/+4
* Fixed PLLA_MUL.isiora2017-08-141-1/+1
* Added a macro to acknowledge the current interrupt.isiora2017-08-141-0/+8
* Added PIT implementation for ATSAMA5D2 (Still incomplete)Rocco Marco Guglielmi2017-08-112-0/+50
* Minor changes in sama_pmc helper headerRocco Marco Guglielmi2017-08-111-3/+3
* Minor changes in AIC pseudo driver.Rocco Marco Guglielmi2017-08-112-29/+39
* Added platform file aic.cedolomb2017-08-111-1/+1
* Added aic headeredolomb2017-08-111-0/+2
* Added macros Enabled/Disabled write protectionedolomb2017-08-112-6/+24
* Moved peripheral id definitions in sama5d2x.h.isiora2017-08-111-154/+0
* Added PID 64-78isiora2017-08-111-4/+35
* Changed name of functionsedolomb2017-08-112-20/+16
* Revertedisiora2017-08-101-3/+2
* Movedisiora2017-08-101-0/+73
* Movedisiora2017-08-101-0/+187
* Added aicInit() functionedolomb2017-08-101-0/+1
* add aic initedolomb2017-08-101-0/+1
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10382 35acf78f-673a-041...edolomb2017-08-101-8/+8
* Improved SAMA registryRocco Marco Guglielmi2017-08-091-61/+124
* Added sama_pmc and improved clock initRocco Marco Guglielmi2017-08-093-10/+173
* Fixed typoRocco Marco Guglielmi2017-08-081-1/+1
* Added SAMA5D2x registryRocco Marco Guglielmi2017-08-082-0/+121
* Complete clock tree initialization for ATSAMA5D2.Rocco Marco Guglielmi2017-08-072-19/+111
* iMPROVED clock tree management for ATSAMA5D2 (Still uncomplete)Rocco Marco Guglielmi2017-08-071-30/+48
* Added clock tree management for ATSAMA5D2 (Still uncomplete)Rocco Marco Guglielmi2017-08-063-12/+238
* Started Clock tree development on SAMA5 portRocco Marco Guglielmi2017-08-052-9/+139
* Created hierarchy to add SAMA5 support.Rocco Marco Guglielmi2017-07-295-0/+404
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