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path: root/os/hal/ports/SAMA
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* Removed AIC redirection codeisiora2017-09-221-6/+0
* Minor changes in hal_serial_lld driveredolomb2017-09-211-1/+35
* Added check on GS status in dmaChannelDisable()edolomb2017-09-211-18/+42
* Removed GS check status in DMAHandleredolomb2017-09-211-22/+58
* Added secure/non-secure configuration capability in SAMA PAL driverRocco Marco Guglielmi2017-09-192-6/+78
* Minor fix on default demo and PAL driverRocco Marco Guglielmi2017-09-171-9/+4
* Added PAL driver Rocco Marco Guglielmi2017-09-175-1/+593
* Fixed smart building for SAMA driversRocco Marco Guglielmi2017-09-171-0/+1
* Added smart building for SAMA driversRocco Marco Guglielmi2017-09-172-1/+18
* Added PIO related macrosRocco Marco Guglielmi2017-09-172-0/+48
* Improved AIC to work with both secure and non secure mode.Rocco Marco Guglielmi2017-09-172-3/+17
* Added SAMA_HAL_IS_SECURE switchRocco Marco Guglielmi2017-09-171-0/+9
* Added Matrix clock enable in SAMA/SAMA5D2x/hal_lld.cRocco Marco Guglielmi2017-09-171-0/+11
* Style fixesRocco Marco Guglielmi2017-09-161-2/+2
* Improved clock tree configuration for SAMA5Rocco Marco Guglielmi2017-09-161-1/+5
* Cosmetic changes in SAMA clock initRocco Marco Guglielmi2017-09-131-15/+5
* Added USARTv1 driveredolomb2017-09-043-0/+827
* Included USARTv1 Driveredolomb2017-09-041-0/+1
* Added pmc functions for UARTxedolomb2017-09-041-1/+70
* Added clock definition for UARTxedolomb2017-09-041-0/+9
* Minor changes in hal_spi_lld driveredolomb2017-08-281-8/+0
* Added SPIv1 driveredolomb2017-08-283-0/+657
* Included SPIv1 Driveredolomb2017-08-281-1/+1
* Added pmc functions for SPIxedolomb2017-08-281-0/+29
* Minor changes in sama_xdmac driveredolomb2017-08-252-16/+15
* Added control on callback callingedolomb2017-08-251-2/+2
* Added XDMAC driveredolomb2017-08-243-0/+593
* Added pmc functions for XDMACxedolomb2017-08-241-2/+30
* Added sama_xdmac.hedolomb2017-08-241-1/+1
* Included DMAv1 Driveredolomb2017-08-241-1/+1
* Added dmaInit()edolomb2017-08-241-1/+1
* Added check to verify that the matrix H64H32 clock ratio is compatible with m...isiora2017-08-181-12/+15
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10450 35acf78f-673a-041...isiora2017-08-181-2/+3
* Added matrix H64H32 clock ratio.isiora2017-08-171-0/+13
* Added matrix clock ratio setting.isiora2017-08-171-2/+8
* Fixed SAMA_PIT define. Now it includes the dependency on busses clock ratio.isiora2017-08-171-1/+1
* Fixed compiler warning.isiora2017-08-161-4/+6
* Added debug asserts.isiora2017-08-162-6/+17
* Added acknowledgement of PIT and AIC interrupt.isiora2017-08-141-2/+2
* Changed ST interrupt priority to 0, the lowest one.isiora2017-08-141-1/+1
* Fixed disable/enable macro.isiora2017-08-141-4/+4
* Fixed PLLA_MUL.isiora2017-08-141-1/+1
* Added a macro to acknowledge the current interrupt.isiora2017-08-141-0/+8
* Added PIT implementation for ATSAMA5D2 (Still incomplete)Rocco Marco Guglielmi2017-08-112-0/+50
* Minor changes in sama_pmc helper headerRocco Marco Guglielmi2017-08-111-3/+3
* Minor changes in AIC pseudo driver.Rocco Marco Guglielmi2017-08-112-29/+39
* Added platform file aic.cedolomb2017-08-111-1/+1
* Added aic headeredolomb2017-08-111-0/+2
* Added macros Enabled/Disabled write protectionedolomb2017-08-112-6/+24
* Moved peripheral id definitions in sama5d2x.h.isiora2017-08-111-154/+0
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