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* Fixed bugsedolomb2018-04-131-0/+4
* Added ARM_SUPPORTS_L2CC.isiora2018-04-131-2/+2
* Added the L2 management, and an option on cache disable.isiora2018-04-132-29/+58
* Added the L2 management, and an option on cache disable.isiora2018-04-132-29/+56
* Added ARM_SUPPORTS_L2CC.isiora2018-04-131-1/+3
* FIxed the path of mmu.cisiora2018-04-131-1/+1
* Mapped the sdmmc memory region as non secure.isiora2018-04-131-4/+34
* Fixed ID number 1 and 73 as per datasheet errata.isiora2018-04-131-7/+3
* Added ID_PMC and ID_RSTCedolomb2018-04-131-0/+2
* Added ID_PMC and ID_RSTCedolomb2018-04-131-0/+2
* Fixed bug #935.Giovanni Di Sirio2018-04-1311-108/+109
* Re-added temporary Aes wrapperedolomb2018-04-111-1/+6
* STM32L4+ preliminary work.Giovanni Di Sirio2018-04-0424-387547/+386494
* Fixed a problem in the new clean rule.Giovanni Di Sirio2018-03-236-24/+60
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11832 110e8d01-0319-4d1...isiora2018-03-211-0/+46
* Minor changes.isiora2018-03-212-1/+13
* update hal crypto sha lld, added integration with wolfcryptareviu2018-03-191-6/+0
* Minor changes.isiora2018-03-161-4/+5
* Changed domains in TLB from 'manager' to 'client' in order to enable the sect...isiora2018-03-151-27/+27
* Added TSSI version service.isiora2018-03-152-30/+51
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11729 110e8d01-0319-4d1...Giovanni Di Sirio2018-03-136-11/+17
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11722 110e8d01-0319-4d1...Giovanni Di Sirio2018-03-1315-4543/+0
* Unified OS Library header, preparation for separate subsystem.Giovanni Di Sirio2018-03-134-259/+310
* Documentation related fixes.Giovanni Di Sirio2018-03-111-2/+2
* Changed domains in TLB from 'manager' to 'client' in order to enable the sect...isiora2018-03-081-27/+27
* Added TLB invalidation.isiora2018-03-081-6/+7
* Aligned SPC5 GHS linker scripts.Giovanni Di Sirio2018-03-0812-180/+54
* Fixed weak definitions.isiora2018-03-071-0/+5
* New memory layout.isiora2018-03-071-2/+2
* Default ARM_ENABLE_WFI_IDLE to FALSE.isiora2018-03-071-1/+1
* New memory layout.isiora2018-03-071-2/+2
* New TSSI interface.isiora2018-03-072-0/+530
* Obsolete.isiora2018-03-072-383/+0
* New TSSI interface.isiora2018-03-072-16/+16
* Added option to enable L2.isiora2018-02-271-0/+13
* Small changes.isiora2018-02-271-7/+7
* Added option to enable L2.isiora2018-02-271-0/+2
* Cleanup interworking code.isiora2018-02-273-31/+6
* Added option to enable L2.isiora2018-02-272-26/+13
* Cleanup interworking code.isiora2018-02-273-30/+6
* Small changes.isiora2018-02-273-12/+12
* Fixed L2C_310 defines.isiora2018-02-271-2/+2
* Added temporary Aes wrapperedolomb2018-02-261-1/+5
* Minor changesedolomb2018-02-261-1/+2
* AVR: Correct a bad comment, and the description and remove a wrong details.Theodore Ateba2018-02-191-5/+3
* AVR: Correct the file name.Theodore Ateba2018-02-191-1/+1
* Commented inclusionedolomb2018-02-161-1/+1
* Commented inclusionedolomb2018-02-161-1/+1
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11478 35acf78f-673a-041...Giovanni Di Sirio2018-02-111-1/+0
* MISRA-related changes.Giovanni Di Sirio2018-02-101-0/+6
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