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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11432 35acf78f-673a-041...Giovanni Di Sirio2018-02-041-1/+1
* Fixed r12 (ip) saving.isiora2018-01-301-62/+56
* Code cleanup.isiora2018-01-302-25/+31
* Fixed the saving of lr_mon and spsr_mon in smc exception entry.isiora2018-01-242-13/+20
* Added saving of banked register.isiora2018-01-243-22/+16
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11398 35acf78f-673a-041...isiora2018-01-241-4/+13
* Review of service register.isiora2018-01-241-67/+112
* Added saving of banked register.isiora2018-01-241-5/+120
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11379 35acf78f-673a-041...isiora2018-01-203-25/+46
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11378 35acf78f-673a-041...isiora2018-01-201-195/+193
* Mass update of the Apache 2.0 license statement.Giovanni Di Sirio2018-01-202-196/+196
* Mass update of GPL license statement.Giovanni Di Sirio2018-01-2049-49/+49
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11356 35acf78f-673a-041...isiora2018-01-192-8/+8
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11354 35acf78f-673a-041...isiora2018-01-191-1/+6
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11352 35acf78f-673a-041...isiora2018-01-192-16/+47
* Added proto of smcServiceWaitRequest()isiora2018-01-191-0/+1
* SMC first release.isiora2018-01-192-30/+55
* Added trampoline to non secure world.isiora2018-01-181-9/+38
* Added SMC related sources.isiora2018-01-182-0/+236
* Added SMC related sources.isiora2018-01-181-1/+2
* Deleted thumb code.isiora2018-01-181-131/+0
* Fixed broken changes.Giovanni Di Sirio2018-01-141-6/+22
* PORT_SUPPORTS_RT for Cortex-A5 and Cortex-A9edolomb2018-01-101-1/+24
* PORT_SUPPORTS_RT for Cortex-A5 and Cortex-A9edolomb2018-01-101-1/+24
* Unified MPU handler.Giovanni Di Sirio2018-01-081-0/+6
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11128 35acf78f-673a-041...Giovanni Di Sirio2017-12-071-2/+2
* e200 make files adjustmentsGiovanni Di Sirio2017-12-071-1/+1
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11054 35acf78f-673a-041...isiora2017-11-221-3/+3
* Modified some names for consistency.Giovanni Di Sirio2017-11-218-24/+24
* Improved make system.Giovanni Di Sirio2017-11-218-0/+40
* Added monitor.Sisiora2017-11-141-1/+2
* Turst zone monitor and smc code.isiora2017-11-141-0/+166
* Moved monitor code in monitor.Sisiora2017-11-141-139/+7
* More GHS changes, SPC56ECxx demo compiles now.Giovanni Di Sirio2017-09-221-1/+1
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10670 35acf78f-673a-041...Giovanni Di Sirio2017-09-221-1/+1
* More GHS stuff.Giovanni Di Sirio2017-09-225-4/+548
* AVR: Remove the programming target from the generic makefile rule.Theodore Ateba2017-09-161-13/+0
* Add AVR makefile rules for compilation.Theodore Ateba2017-09-131-0/+297
* Remove a compilation warning.Theodore Ateba2017-09-131-0/+3
* The IRQ handlers are normal functions: deleted interrupt attribute to them.isiora2017-08-141-2/+2
* Enabled FIQ in _port_thread_startisiora2017-08-141-5/+6
* Fixed comments.isiora2017-08-111-3/+3
* Changed interrupt macro in order to disallow the IRQsisiora2017-08-051-12/+13
* Added monitor code to switch between secure and non-secure state.isiora2017-07-291-23/+32
* Renamed ports/ARMCMAx-TZ as ports/ARMCAx-TZRocco Marco Guglielmi2017-07-297-13/+13
* Add NIL support for AVR Tiny architecture.Theodore Ateba2017-07-141-1/+6
* Updated some comments.isiora2017-07-081-6/+6
* Added monitor code to route IRQ to non-secure world.isiora2017-07-071-15/+56
* Modified MON_S_SCRisiora2017-07-041-1/+1
* Added monitor code to switch between secure and non-secure stateisiora2017-07-041-5/+89
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