| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Defaulted clock sources to XT | isiora | 2017-09-22 | 1 | -3/+3 |
| * | Added SAMA_HAL_IS_SECURE switch | Rocco Marco Guglielmi | 2017-09-17 | 1 | -0/+1 |
| * | Added Blinking and Serial Thread | edolomb | 2017-09-14 | 1 | -1/+1 |
| * | Added UART driver system settings | edolomb | 2017-09-04 | 1 | -2/+17 |
| * | Added SPI driver system settings | edolomb | 2017-08-28 | 1 | -3/+12 |
| * | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10452 35acf78f-673a-041... | isiora | 2017-08-18 | 1 | -1/+1 |
| * | Added clock ratio setting of the matrix busses, | isiora | 2017-08-17 | 1 | -0/+2 |
| * | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10439 35acf78f-673a-041... | isiora | 2017-08-16 | 1 | -3/+3 |
| * | Complete clock tree initialization for ATSAMA5D2. | Rocco Marco Guglielmi | 2017-08-07 | 1 | -4/+4 |
| * | Added clock tree management for ATSAMA5D2 (Still uncomplete) | Rocco Marco Guglielmi | 2017-08-06 | 1 | -3/+8 |
| * | Started Clock tree development on SAMA5 port | Rocco Marco Guglielmi | 2017-08-05 | 1 | -0/+8 |
| * | Created hierarchy to add SAMA5 support. | Rocco Marco Guglielmi | 2017-07-29 | 1 | -0/+22 |
 |
index : avr/qmk/ChibiOS | |
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