diff options
Diffstat (limited to 'testhal/STM32F1xx')
81 files changed, 5159 insertions, 598 deletions
diff --git a/testhal/STM32F1xx/ADC/Makefile b/testhal/STM32F1xx/ADC/Makefile index f93aeb073..0f7e20317 100644 --- a/testhal/STM32F1xx/ADC/Makefile +++ b/testhal/STM32F1xx/ADC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -201,4 +206,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
-include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index b42f9088b..b1de4bf39 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -185,6 +199,13 @@ /* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -235,16 +256,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +330,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index 214f28b5f..bfe8997f9 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -21,10 +21,14 @@ #include "ch.h"
#include "hal.h"
-#define ADC_GRP1_NUM_CHANNELS 8
-#define ADC_GRP1_BUF_DEPTH 16
+#define ADC_GRP1_NUM_CHANNELS 1
+#define ADC_GRP1_BUF_DEPTH 8
-static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
+#define ADC_GRP2_NUM_CHANNELS 8
+#define ADC_GRP2_BUF_DEPTH 16
+
+static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
+static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH];
/*
* ADC streaming callback.
@@ -33,7 +37,7 @@ size_t nx = 0, ny = 0; static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
(void)adcp;
- if (samples == buffer) {
+ if (samples2 == buffer) {
nx += n;
}
else {
@@ -41,20 +45,45 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { }
}
+static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
+
+ (void)adcp;
+ (void)err;
+}
+
+/*
+ * ADC conversion group.
+ * Mode: Linear buffer, 8 samples of 1 channel, SW triggered.
+ * Channels: IN10.
+ */
+static const ADCConversionGroup adcgrpcfg1 = {
+ FALSE,
+ ADC_GRP1_NUM_CHANNELS,
+ NULL,
+ adcerrorcallback,
+ 0, 0, /* CR1, CR2 */
+ ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5),
+ 0, /* SMPR2 */
+ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
+ 0, /* SQR2 */
+ ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10)
+};
+
/*
* ADC conversion group.
- * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered.
+ * Mode: Continuous, 16 samples of 8 channels, SW triggered.
* Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef.
*/
-static const ADCConversionGroup adcgrpcfg = {
+static const ADCConversionGroup adcgrpcfg2 = {
TRUE,
- ADC_GRP1_NUM_CHANNELS,
+ ADC_GRP2_NUM_CHANNELS,
adccallback,
- 0,
- ADC_CR2_TSVREFE,
- 0,
- 0,
- ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
+ adcerrorcallback,
+ 0, ADC_CR2_TSVREFE, /* CR1, CR2 */
+ ADC_SMPR1_SMP_AN11(ADC_SAMPLE_41P5) | ADC_SMPR1_SMP_AN10(ADC_SAMPLE_41P5) |
+ ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_239P5) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_239P5),
+ 0, /* SMPR2 */
+ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS),
ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT),
ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) |
ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) |
@@ -105,10 +134,20 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
/*
- * Starts an ADC continuous conversion.
+ * Activates the ADC1 driver and the thermal sensor.
*/
adcStart(&ADCD1, NULL);
- adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
+
+ /*
+ * Linear conversion.
+ */
+ adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH);
+ chThdSleepMilliseconds(1000);
+
+ /*
+ * Starts an ADC continuous conversion.
+ */
+ adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH);
/*
* Normal main() thread activity, in this demo it does nothing.
diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index 558c0773d..bce5518d6 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/ADC/readme.txt b/testhal/STM32F1xx/ADC/readme.txt index e0cf0adea..9d6bbd192 100644 --- a/testhal/STM32F1xx/ADC/readme.txt +++ b/testhal/STM32F1xx/ADC/readme.txt @@ -4,7 +4,7 @@ ** TARGET **
-The demo will on an Olimex STM32-P103 board.
+The demo runs on an Olimex STM32-P103 board.
** The Demo **
diff --git a/testhal/STM32F1xx/CAN/Makefile b/testhal/STM32F1xx/CAN/Makefile index f93aeb073..0f7e20317 100644 --- a/testhal/STM32F1xx/CAN/Makefile +++ b/testhal/STM32F1xx/CAN/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -201,4 +206,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
-include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index a7ae76b45..03b395896 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -185,6 +199,13 @@ /* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -235,16 +256,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +330,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index 558c0773d..bce5518d6 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/CAN/readme.txt b/testhal/STM32F1xx/CAN/readme.txt index 3b92f4fa3..81ef4c60a 100644 --- a/testhal/STM32F1xx/CAN/readme.txt +++ b/testhal/STM32F1xx/CAN/readme.txt @@ -4,7 +4,7 @@ ** TARGET **
-The demo will on an Olimex STM32-P103 board.
+The demo runs on an Olimex STM32-P103 board.
** The Demo **
diff --git a/testhal/STM32F1xx/EXT/Makefile b/testhal/STM32F1xx/EXT/Makefile new file mode 100644 index 000000000..190662d49 --- /dev/null +++ b/testhal/STM32F1xx/EXT/Makefile @@ -0,0 +1,208 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Enable this if you really want to use the STM FWLib.
+ifeq ($(USE_FWLIB),)
+ USE_FWLIB = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../..
+include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk
+include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk
+include $(CHIBIOS)/os/kernel/kernel.mk
+
+# Define linker script file here
+LDSCRIPT= $(PORTLD)/STM32F103xB.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+ $(KERNSRC) \
+ $(TESTSRC) \
+ $(HALSRC) \
+ $(PLATFORMSRC) \
+ $(BOARDSRC) \
+ $(CHIBIOS)/os/various/evtimer.c \
+ $(CHIBIOS)/os/various/syscalls.c \
+ main.c +
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ $(HALINC) $(PLATFORMINC) $(BOARDINC) \
+ $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m3
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of default section
+#
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+ifeq ($(USE_FWLIB),yes)
+ include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
+ CSRC += $(STM32SRC)
+ INCDIR += $(STM32INC)
+ USE_OPT += -DUSE_STDPERIPH_DRIVER
+endif
+
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/SDIO/chconf.h b/testhal/STM32F1xx/EXT/chconf.h index a5d129956..a5d129956 100644 --- a/testhal/STM32F1xx/SDIO/chconf.h +++ b/testhal/STM32F1xx/EXT/chconf.h diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h new file mode 100644 index 000000000..775428e22 --- /dev/null +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -0,0 +1,335 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT TRUE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Block size for MMC transfers.
+ */
+#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
+#define MMC_SECTOR_SIZE 512
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/**
+ * @brief Number of positive insertion queries before generating the
+ * insertion event.
+ */
+#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
+#define MMC_POLLING_INTERVAL 10
+#endif
+
+/**
+ * @brief Interval, in milliseconds, between insertion queries.
+ */
+#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
+#define MMC_POLLING_DELAY 10
+#endif
+
+/**
+ * @brief Uses the SPI polled API for small data transfers.
+ * @details Polled transfers usually improve performance because it
+ * saves two context switches and interrupt servicing. Note
+ * that this option has no effect on large transfers which
+ * are always performed using DMAs/IRQs.
+ */
+#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
+#define MMC_USE_SPI_POLLING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intevals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM32F1xx/EXT/main.c b/testhal/STM32F1xx/EXT/main.c new file mode 100644 index 000000000..fc82a7786 --- /dev/null +++ b/testhal/STM32F1xx/EXT/main.c @@ -0,0 +1,119 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+static VirtualTimer vt;
+
+/* LED set to OFF after 200mS.*/
+static void ledoff(void *arg) {
+
+ (void)arg;
+ palSetPad(GPIOC, GPIOC_LED);
+}
+
+/* Triggered when the button is pressed or released. The LED is set to ON.*/
+static void extcb1(EXTDriver *extp, expchannel_t channel) {
+
+ (void)extp;
+ (void)channel;
+ palClearPad(GPIOC, GPIOC_LED);
+ chSysLockFromIsr();
+ if (!chVTIsArmedI(&vt))
+ chVTSetI(&vt, MS2ST(200), ledoff, NULL);
+ chSysUnlockFromIsr();
+}
+
+/* Triggered when the LED goes OFF.*/
+static void extcb2(EXTDriver *extp, expchannel_t channel) {
+
+ (void)extp;
+ (void)channel;
+}
+
+static const EXTConfig extcfg = {
+ {
+ {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, extcb2},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ },
+ EXT_MODE_EXTI(EXT_MODE_GPIOA,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ EXT_MODE_GPIOC,
+ 0,
+ 0,
+ 0)
+};
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Activates the EXT driver 1.
+ */
+ extStart(&EXTD1, &extcfg);
+
+ /*
+ * Normal main() thread activity, in this demo it enables and disables the
+ * button EXT channel using 5 seconds intervals.
+ */
+ while (TRUE) {
+ chThdSleepMilliseconds(5000);
+ extChannelDisable(&EXTD1, 0);
+ chThdSleepMilliseconds(5000);
+ extChannelEnable(&EXTD1, 0);
+ }
+}
diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h new file mode 100644 index 000000000..c6dc0ce8a --- /dev/null +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -0,0 +1,173 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * STM32 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE 9
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV2
+#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_ADCPRE STM32_ADCPRE_DIV4
+#define STM32_USBPRE STM32_USBPRE_DIV1P5
+#define STM32_MCO STM32_MCO_NOCLOCK
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1 TRUE
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC1_IRQ_PRIORITY 5
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 TRUE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM5 FALSE
+#define STM32_GPT_USE_TIM8 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM5_IRQ_PRIORITY 7
+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 TRUE
+#define STM32_ICU_USE_TIM5 FALSE
+#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM5_IRQ_PRIORITY 7
+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED TRUE
+#define STM32_PWM_USE_TIM1 TRUE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM3 FALSE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM5 FALSE
+#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM5_IRQ_PRIORITY 7
+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 TRUE
+#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 TRUE
+#define STM32_SPI_USE_SPI2 TRUE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 TRUE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
diff --git a/testhal/STM32F1xx/EXT/readme.txt b/testhal/STM32F1xx/EXT/readme.txt new file mode 100644 index 000000000..514c0d5c6 --- /dev/null +++ b/testhal/STM32F1xx/EXT/readme.txt @@ -0,0 +1,26 @@ +*****************************************************************************
+** ChibiOS/RT HAL - EXT driver demo for STM32. **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on an Olimex STM32-P103 board.
+
+** The Demo **
+
+The application demonstrates the use of the STM32 EXT driver.
+
+** Build Procedure **
+
+The demo has been tested by using the free Codesourcery GCC-based toolchain
+and YAGARTO.
+Just modify the TRGT line in the makefile in order to use different GCC ports.
+
+** Notes **
+
+Some files used by the demo are not part of ChibiOS/RT but are copyright of
+ST Microelectronics and are licensed under a different license.
+Also note that not all the files present in the ST library are distribited
+with ChibiOS/RT, you can find the whole library on the ST web site:
+
+ http://www.st.com
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/Makefile b/testhal/STM32F1xx/EXT_WAKEUP/Makefile new file mode 100644 index 000000000..be2ae829f --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/Makefile @@ -0,0 +1,210 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Enable this if you really want to use the STM FWLib.
+ifeq ($(USE_FWLIB),)
+ USE_FWLIB = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../..
+include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk
+include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk
+include $(CHIBIOS)/os/kernel/kernel.mk
+
+# Define linker script file here
+LDSCRIPT= $(PORTLD)/STM32F103xB.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+ $(KERNSRC) \
+ $(TESTSRC) \
+ $(HALSRC) \
+ $(PLATFORMSRC) \
+ $(BOARDSRC) \
+ $(CHIBIOS)/os/various/evtimer.c \
+ $(CHIBIOS)/os/various/syscalls.c \
+ $(CHIBIOS)/os/various/shell.c \
+ $(CHIBIOS)/os/various/chprintf.c \
+ main.c +
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ $(HALINC) $(PLATFORMINC) $(BOARDINC) \
+ $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m3
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of default section
+#
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+ifeq ($(USE_FWLIB),yes)
+ include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
+ CSRC += $(STM32SRC)
+ INCDIR += $(STM32INC)
+ USE_OPT += -DUSE_STDPERIPH_DRIVER
+endif
+
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/chconf.h b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h @@ -0,0 +1,535 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 1000
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ *
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 20
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_MEMCORE.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 0
+#endif
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread automatically. The application has
+ * then the responsibility to do one of the following:
+ * - Spawn a custom idle thread at priority @p IDLEPRIO.
+ * - Change the main() thread priority to @p IDLEPRIO then enter
+ * an endless loop. In this scenario the @p main() thread acts as
+ * the idle thread.
+ * .
+ * @note Unless an idle thread is spawned the @p main() thread must not
+ * enter a sleep state.
+ */
+#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
+#define CH_NO_IDLE_THREAD FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
+#define CH_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemSignalWait() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
+#endif
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS TRUE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS TRUE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE TRUE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS TRUE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitily from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
+#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_TICK_EVENT_HOOK() { \
+ /* System tick event code here.*/ \
+}
+#endif
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_HALT_HOOK() { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h new file mode 100644 index 000000000..e77cc2ae7 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -0,0 +1,335 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT TRUE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Block size for MMC transfers.
+ */
+#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
+#define MMC_SECTOR_SIZE 512
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/**
+ * @brief Number of positive insertion queries before generating the
+ * insertion event.
+ */
+#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
+#define MMC_POLLING_INTERVAL 10
+#endif
+
+/**
+ * @brief Interval, in milliseconds, between insertion queries.
+ */
+#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
+#define MMC_POLLING_DELAY 10
+#endif
+
+/**
+ * @brief Uses the SPI polled API for small data transfers.
+ * @details Polled transfers usually improve performance because it
+ * saves two context switches and interrupt servicing. Note
+ * that this option has no effect on large transfers which
+ * are always performed using DMAs/IRQs.
+ */
+#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
+#define MMC_USE_SPI_POLLING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intevals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 57600
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c new file mode 100644 index 000000000..986721fc9 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -0,0 +1,167 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * This program demonstrate how to use interrupt from EXTI line for waking
+ * up MCU from stop mode. EXTI line connected to UART RX pin and generate
+ * interrupt on falling edge of start bit.
+ */
+
+#include "ch.h"
+#include "hal.h"
+
+#include "shell.h"
+#include "chprintf.h"
+
+
+
+/* Wake up callback.*/
+static void extcb2(EXTDriver *extp, expchannel_t channel) {
+
+ (void)extp;
+ (void)channel;
+
+ chSysLockFromIsr();
+ /* we must reinit clocks after waking up ESPECIALLY if use HSE or HSI+PLL */
+ stm32_clock_init();
+
+ extChannelDisableI(&EXTD1, 10);
+ chSysUnlockFromIsr();
+}
+
+
+static const EXTConfig extcfg = {
+ {
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_FALLING_EDGE, extcb2},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ {EXT_CH_MODE_DISABLED, NULL},
+ },
+ EXT_MODE_EXTI(0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ EXT_MODE_GPIOA,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0)
+};
+
+
+
+static void cmd_reboot(BaseChannel *chp, int argc, char *argv[]){
+ (void)argv;
+ if (argc > 0) {
+ chprintf(chp, "Usage: rboot\r\n");
+ return;
+ }
+ chprintf(chp, "rebooting...\r\n");
+ chThdSleepMilliseconds(100); // time to print out message in terminal
+ NVIC_SystemReset();
+}
+
+static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){
+ (void)argv;
+ if (argc > 0) {
+ chprintf(chp, "Usage: sleep\r\n");
+ return;
+ }
+ chprintf(chp, "Going to sleep. Type any character to wake up.\r\n");
+
+ chThdSleepMilliseconds(200); // time to print out message in terminal
+ extChannelEnable(&EXTD1, 10);
+
+ PWR->CR |= (PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF);
+ PWR->CR &= ~PWR_CR_PDDS; // explicit clear PDDS, just to be safe
+ SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
+ __WFI();
+}
+
+
+static const ShellCommand commands[] = {
+ {"reboot", cmd_reboot},
+ {"sleep", cmd_sleep},
+ {NULL, NULL}
+};
+
+static const ShellConfig shell_cfg1 = {
+ (BaseChannel *)&SD1,
+ commands
+};
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Activates the EXT driver 1.
+ */
+ extStart(&EXTD1, &extcfg);
+
+ /* Activates the serial driver using the driver default configuration. */
+ sdStart(&SD1, NULL);
+
+ /* Setting up ports. */
+ palSetPadMode(IOPORT1, 9, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
+ palSetPadMode(IOPORT1, 10, PAL_MODE_INPUT);
+
+ /* Shell manager initialization. */
+ shellInit();
+ static WORKING_AREA(waShell, 512);
+ shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO);
+
+ /* Start blink indicating. */
+ chThdSleepMilliseconds(2000); // timeuot to differ reboot and wake up from sleep
+ while (TRUE) {
+ chThdSleepMilliseconds(100);
+ palTogglePad(IOPORT3, GPIOC_LED);
+ }
+}
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h new file mode 100644 index 000000000..bf077cbae --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -0,0 +1,173 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * STM32 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_SW STM32_SW_HSI
+//#define STM32_PLLSRC STM32_PLLSRC_HSE
+//#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+//#define STM32_PLLMUL_VALUE 9
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV1
+#define STM32_PPRE2 STM32_PPRE2_DIV1
+#define STM32_ADCPRE STM32_ADCPRE_DIV4
+//#define STM32_USBPRE STM32_USBPRE_DIV1P5
+#define STM32_MCO STM32_MCO_NOCLOCK
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1 FALSE
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC1_IRQ_PRIORITY 5
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM5 FALSE
+#define STM32_GPT_USE_TIM8 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM5_IRQ_PRIORITY 7
+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 TRUE
+#define STM32_ICU_USE_TIM5 FALSE
+#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM5_IRQ_PRIORITY 7
+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED TRUE
+#define STM32_PWM_USE_TIM1 TRUE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM3 FALSE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM5 FALSE
+#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM5_IRQ_PRIORITY 7
+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 TRUE
+#define STM32_SERIAL_USE_USART2 FALSE
+#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 TRUE
+#define STM32_SPI_USE_SPI2 TRUE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 FALSE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 FALSE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/readme.txt b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt new file mode 100644 index 000000000..514c0d5c6 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt @@ -0,0 +1,26 @@ +*****************************************************************************
+** ChibiOS/RT HAL - EXT driver demo for STM32. **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on an Olimex STM32-P103 board.
+
+** The Demo **
+
+The application demonstrates the use of the STM32 EXT driver.
+
+** Build Procedure **
+
+The demo has been tested by using the free Codesourcery GCC-based toolchain
+and YAGARTO.
+Just modify the TRGT line in the makefile in order to use different GCC ports.
+
+** Notes **
+
+Some files used by the demo are not part of ChibiOS/RT but are copyright of
+ST Microelectronics and are licensed under a different license.
+Also note that not all the files present in the ST library are distribited
+with ChibiOS/RT, you can find the whole library on the ST web site:
+
+ http://www.st.com
diff --git a/testhal/STM32F1xx/GPT/Makefile b/testhal/STM32F1xx/GPT/Makefile index f93aeb073..0f7e20317 100644 --- a/testhal/STM32F1xx/GPT/Makefile +++ b/testhal/STM32F1xx/GPT/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -201,4 +206,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
-include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index b4361f9b9..3be209376 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -185,6 +199,13 @@ /* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -235,16 +256,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +330,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c index 57b2977d1..01bd86452 100644 --- a/testhal/STM32F1xx/GPT/main.c +++ b/testhal/STM32F1xx/GPT/main.c @@ -77,9 +77,9 @@ int main(void) { * Initializes the GPT drivers 1 and 2.
*/
gptStart(&GPTD1, &gpt1cfg);
- gptPolledDelay(&GPTD1, 10); /* Small dealy.*/
+ gptPolledDelay(&GPTD1, 10); /* Small delay.*/
gptStart(&GPTD2, &gpt2cfg);
- gptPolledDelay(&GPTD2, 10); /* Small dealy.*/
+ gptPolledDelay(&GPTD2, 10); /* Small delay.*/
/*
* Normal main() thread activity, it changes the GPT1 period every
@@ -88,8 +88,10 @@ int main(void) { while (TRUE) {
gptStartContinuous(&GPTD1, 5000);
chThdSleepMilliseconds(5000);
+ gptStopTimer(&GPTD1);
gptStartContinuous(&GPTD1, 2500);
chThdSleepMilliseconds(5000);
+ gptStopTimer(&GPTD1);
}
return 0;
}
diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index eb0774a23..011b609ae 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 TRUE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/GPT/run b/testhal/STM32F1xx/GPT/run deleted file mode 100644 index 818d0e307..000000000 --- a/testhal/STM32F1xx/GPT/run +++ /dev/null @@ -1,8 +0,0 @@ -soft_reset_halt
-wait_halt
-poll
-flash probe 0
-stm32x mass_erase 0
-flash write_bank 0 ch.bin 0
-soft_reset_halt
-resume
diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index b8b1b0741..829c472df 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -9,6 +9,11 @@ ifeq ($(USE_OPT),) #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -24,9 +29,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -58,7 +63,7 @@ LDSCRIPT= $(PORTLD)/STM32F103xB.ld # Imported source files
CHIBIOS = ../../..
-include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk
+include $(CHIBIOS)/boards/OLIMEX_STM32_103STK/board.mk
include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk
@@ -77,9 +82,9 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/syscalls.c \
main.c \
i2c_pns.c \
- tmp75.c\
- max1236.c\
- lis3.c\
+ lis3.c \
+ tmp75.c \
+ fake.c
@@ -122,7 +127,6 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings
#
-# -lm äîáàâëåí èìåííî çäåñü, ïîòîìó ÷òî áîëüøå íåêóäà
MCU = cortex-m3
#TRGT = arm-elf-
diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c new file mode 100644 index 000000000..b06ffbdfd --- /dev/null +++ b/testhal/STM32F1xx/I2C/fake.c @@ -0,0 +1,58 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * Not responding slave test
+ */
+
+#include <stdlib.h>
+
+#include "ch.h"
+#include "hal.h"
+
+#include "fake.h"
+
+
+/* input buffer */
+static uint8_t rx_data[2];
+
+/* temperature value */
+static int16_t temperature = 0;
+
+static i2cflags_t errors = 0;
+
+#define addr 0b1001100
+
+/* This is main function. */
+void request_fake(void){
+
+ i2cAcquireBus(&I2CD1);
+ i2cMasterReceive(&I2CD1, addr, rx_data, 2, &errors, TIME_INFINITE);
+ i2cReleaseBus(&I2CD1);
+
+ if (errors == I2CD_ACK_FAILURE){
+ __NOP();
+ }
+ else{
+ temperature = (rx_data[0] << 8) + rx_data[1];
+ }
+}
+
+
diff --git a/testhal/STM32F1xx/I2C/fake.h b/testhal/STM32F1xx/I2C/fake.h new file mode 100644 index 000000000..04f4206bf --- /dev/null +++ b/testhal/STM32F1xx/I2C/fake.h @@ -0,0 +1,26 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef FAKE_H_
+#define FAKE_H_
+
+void request_fake(void);
+
+#endif /* FAKE_H_ */
diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index da52785c0..54a69c2f7 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -44,7 +44,7 @@ * @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC TRUE
+#define HAL_USE_ADC FALSE
#endif
/**
@@ -55,6 +55,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -93,7 +100,14 @@ * @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM TRUE
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
#endif
/**
@@ -107,7 +121,7 @@ * @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL TRUE
+#define HAL_USE_SERIAL FALSE
#endif
/**
@@ -178,7 +192,7 @@ * @note Disabling this option saves both code and data space.
*/
#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__)
-#define I2C_USE_WAIT FALSE
+#define I2C_USE_WAIT TRUE
#endif
/**
@@ -188,17 +202,17 @@ #define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
-/**
- * @brief Switch to asynchronouse driver with callbacks.
- */
-#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__)
-#define I2C_SUPPORTS_CALLBACKS TRUE
-#endif
-
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -249,16 +263,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -330,10 +337,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index 44f4a8a33..1c73482e3 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -1,32 +1,35 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
#include "ch.h"
#include "hal.h"
#include "i2c_pns.h"
-
#include "lis3.h"
-#include "tmp75.h"
-#include "max1236.h"
+
/* I2C1 */
static const I2CConfig i2cfg1 = {
OPMODE_I2C,
- 100000,
- STD_DUTY_CYCLE,
- 0,
- 0,
- 0,
- 0,
-};
-
-/* I2C2 */
-static const I2CConfig i2cfg2 = {
- OPMODE_I2C,
- 100000,
- STD_DUTY_CYCLE,
- 0,
- 0,
- 0,
- 0,
+ 400000,
+ FAST_DUTY_CYCLE_16_9,
};
@@ -35,22 +38,14 @@ void I2CInit_pns(void){ i2cInit();
i2cStart(&I2CD1, &i2cfg1);
- i2cStart(&I2CD2, &i2cfg2);
/* tune ports for I2C1*/
palSetPadMode(IOPORT2, 6, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
palSetPadMode(IOPORT2, 7, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
- /* tune ports for I2C2*/
- palSetPadMode(IOPORT2, 10, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
- palSetPadMode(IOPORT2, 11, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
-
/* startups. Pauses added just to be safe */
- chThdSleepMilliseconds(1000);
- init_max1236();
- chThdSleepMilliseconds(1000);
+ chThdSleepMilliseconds(100);
init_lis3();
- chThdSleepMilliseconds(1000);
}
diff --git a/testhal/STM32F1xx/I2C/i2c_pns.h b/testhal/STM32F1xx/I2C/i2c_pns.h index 4dfdf320e..dae359ecf 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.h +++ b/testhal/STM32F1xx/I2C/i2c_pns.h @@ -1,3 +1,23 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
#ifndef I2C_PNS_H_
#define I2C_PNS_H_
diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index 401f56199..6f697f8f7 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -1,7 +1,26 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
/**
- * This is most complex and difficult device.
- * It realize "read through write" paradigm. This is not standard, but
- * most of I2C devices use this paradigm.
+ * This is device realize "read through write" paradigm. This is not
+ * standard, but most of I2C devices use this paradigm.
* You must write to device reading address, send restart to bus,
* and then begin reading process.
*/
@@ -18,34 +37,15 @@ /* buffers */
-static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH];
-static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH];
+static uint8_t accel_rx_data[ACCEL_RX_DEPTH];
+static uint8_t accel_tx_data[ACCEL_TX_DEPTH];
+
+static i2cflags_t errors = 0;
static int16_t acceleration_x = 0;
static int16_t acceleration_y = 0;
static int16_t acceleration_z = 0;
-/* Error trap */
-static void i2c_lis3_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
- (void)i2cscfg;
- int status = 0;
- status = i2cp->id_i2c->SR1;
- while(TRUE);
-}
-
-/* This callback raise up when transfer finished */
-static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
- (void)i2cp;
- (void)i2cscfg;
-}
-
-
-/* Accelerometer lis3lv02dq config */
-static const I2CSlaveConfig lis3 = {
- i2c_lis3_cb,
- i2c_lis3_error_cb,
-};
-
/**
* Init function. Here we will also start personal serving thread.
@@ -58,7 +58,9 @@ int init_lis3(void){ accel_tx_data[3] = 0b00000000;
/* sending */
- i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 4, accel_rx_data, 0);
+ i2cAcquireBus(&I2CD1);
+ i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 4, accel_rx_data, 0, &errors, TIME_INFINITE);
+ i2cReleaseBus(&I2CD1);
return 0;
}
@@ -67,9 +69,9 @@ int init_lis3(void){ */
void request_acceleration_data(void){
accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address
- //i2cAcquireBus(&I2CD1);
- i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 1, accel_rx_data, 6);
- //i2cReleaseBus(&I2CD1);
+ i2cAcquireBus(&I2CD1);
+ i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 1, accel_rx_data, 6, &errors, TIME_INFINITE);
+ i2cReleaseBus(&I2CD1);
acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8);
acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8);
diff --git a/testhal/STM32F1xx/I2C/lis3.h b/testhal/STM32F1xx/I2C/lis3.h index e50359bde..0c2eefa5d 100644 --- a/testhal/STM32F1xx/I2C/lis3.h +++ b/testhal/STM32F1xx/I2C/lis3.h @@ -1,3 +1,23 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
#include <stdlib.h>
#include "ch.h"
diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index b828953c5..60cb1f3ae 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -1,21 +1,22 @@ -/**
- * Lets imagine that we have board with LIS3LV02DL accelerometer on channel #1
- * and MAX1236 ADC, TMP75 thermometer on channel #2.
- *
- * NOTE: I assume, that you have datasheets on all this stuff.
- *
- * NOTE: Also, I assume, that you know how to I2C works.
- *
- * In order from simplicity to complexity:
- * TMP75
- * MAX1236
- * LIS3LV02DL
- *
- * Project splitted to separate source files for each device.
- *
- * Data from sensors we will be read from different thread sleeping different
- * amount of time.
- */
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
#include <stdlib.h>
@@ -23,10 +24,9 @@ #include "hal.h"
#include "i2c_pns.h"
-#include "tmp75.h"
-#include "max1236.h"
#include "lis3.h"
-
+#include "tmp75.h"
+#include "fake.h"
/*
@@ -44,55 +44,51 @@ static msg_t Blink(void *arg) { return 0;
}
-
-
-/* Temperature polling thread */
-static WORKING_AREA(PollTmp75ThreadWA, 128);
-static msg_t PollTmp75Thread(void *arg) {
+/*
+ * Accelerometer thread
+ */
+static WORKING_AREA(PollAccelThreadWA, 128);
+static msg_t PollAccelThread(void *arg) {
+ chRegSetThreadName("PollAccel");
(void)arg;
- systime_t time = chTimeNow();
-
while (TRUE) {
- time += MS2ST(1001);
- /* Call reading function */
- request_temperature();
- chThdSleepUntil(time);
+// chThdSleepMilliseconds(rand() & 31);
+ chThdSleepMilliseconds(32);
+ request_acceleration_data();
}
return 0;
}
-/* MAX1236 polling thread */
-static WORKING_AREA(PollMax1236ThreadWA, 128);
-static msg_t PollMax1236Thread(void *arg) {
- (void)arg;
- systime_t time = chTimeNow();
+/* Temperature polling thread */
+static WORKING_AREA(PollTmp75ThreadWA, 128);
+static msg_t PollTmp75Thread(void *arg) {
+ chRegSetThreadName("PollTmp75");
+ (void)arg;
while (TRUE) {
- time += MS2ST(200);
+// chThdSleepMilliseconds(rand() & 31);
+ chThdSleepMilliseconds(15);
/* Call reading function */
- read_max1236();
- chThdSleepUntil(time);
+ request_temperature();
}
return 0;
}
-static WORKING_AREA(PollAccelThreadWA, 128);
-static msg_t PollAccelThread(void *arg) {
+/* Temperature polling thread */
+static WORKING_AREA(PollFakeThreadWA, 128);
+static msg_t PollFakeThread(void *arg) {
+ chRegSetThreadName("PollFake");
(void)arg;
- systime_t time = chTimeNow();
-
while (TRUE) {
- time += MS2ST(20);
- request_acceleration_data();
- chThdSleepUntil(time);
+ chThdSleepMilliseconds(16);
+ /* Call reading function */
+ request_fake();
}
return 0;
}
-
-
/*
* Entry point, note, the main() function is already a thread in the system
* on entry.
@@ -102,8 +98,16 @@ int main(void) { halInit();
chSysInit();
+ chThdSleepMilliseconds(200);
I2CInit_pns();
+ /* Create accelerometer thread */
+ chThdCreateStatic(PollAccelThreadWA,
+ sizeof(PollAccelThreadWA),
+ NORMALPRIO,
+ PollAccelThread,
+ NULL);
+
/* Create temperature thread */
chThdCreateStatic(PollTmp75ThreadWA,
sizeof(PollTmp75ThreadWA),
@@ -111,24 +115,15 @@ int main(void) { PollTmp75Thread,
NULL);
-
- /* Create max1236 thread */
- chThdCreateStatic(PollMax1236ThreadWA,
- sizeof(PollMax1236ThreadWA),
+ /* Create not responding thread */
+ chThdCreateStatic(PollFakeThreadWA,
+ sizeof(PollFakeThreadWA),
NORMALPRIO,
- PollMax1236Thread,
- NULL);
-
-
- /* Create accelerometer thread */
- chThdCreateStatic(PollAccelThreadWA,
- sizeof(PollAccelThreadWA),
- HIGHPRIO,
- PollAccelThread,
+ PollFakeThread,
NULL);
/* Creates the blinker thread. */
- chThdCreateStatic(BlinkWA, sizeof(BlinkWA), LOWPRIO, Blink, NULL);
+ chThdCreateStatic(BlinkWA, sizeof(BlinkWA), HIGHPRIO, Blink, NULL);
/* main loop that do nothing */
while (TRUE) {
diff --git a/testhal/STM32F1xx/I2C/main.h b/testhal/STM32F1xx/I2C/main.h deleted file mode 100644 index 1435a05e5..000000000 --- a/testhal/STM32F1xx/I2C/main.h +++ /dev/null @@ -1,19 +0,0 @@ -/*
- * main.h
- *
- * Created on: 25.03.2011
- * Author: barthess
- */
-
-#ifndef MAIN_H_
-#define MAIN_H_
-
-
-// ãëîáàëüíûå ôëàãè
-#define GET_FILTERED_RAW_GYRO TRUE
-#define GET_FILTERED_RAW_ACCEL TRUE
-
-
-
-
-#endif /* MAIN_H_ */
diff --git a/testhal/STM32F1xx/I2C/max1236.c b/testhal/STM32F1xx/I2C/max1236.c deleted file mode 100644 index 09e2c8b35..000000000 --- a/testhal/STM32F1xx/I2C/max1236.c +++ /dev/null @@ -1,75 +0,0 @@ -/**
- * Maxim ADC has not so suitable default settings after startup.
- * So we will create init function to tune this ADC.
- */
-
-#include <stdlib.h>
-
-#include "ch.h"
-#include "hal.h"
-
-#include "max1236.h"
-
-
-#define max1236_addr 0b0110100
-
-
-/* Data buffers */
-static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH];
-static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH];
-/* ADC results */
-static uint16_t ch1 = 0, ch2 = 0, ch3 = 0, ch4 = 0;
-
-
-/* Error trap */
-static void i2c_max1236_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
- (void)i2cscfg;
- int status = 0;
- status = i2cp->id_i2c->SR1;
- while(TRUE);
-}
-
-
-/* This callback raise up when transfer finished */
-static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
- (void)*i2cp;
- (void)*i2cscfg;
- /* get ADC data */
-}
-
-
-/* ADC maxim MAX1236 config */
-
-static const I2CSlaveConfig max1236 = {
- i2c_max1236_cb,
- i2c_max1236_error_cb,
-};
-
-
-/**
- * Initilization routine. See datasheet on page 13 to understand
- * how to initialize ADC.
- */
-void init_max1236(void){
- /* this data we must send via IC to setup ADC */
- max1236_tx_data[0] = 0b10000011; /* config register content. Consult datasheet */
- max1236_tx_data[1] = 0b00000111; /* config register content. Consult datasheet */
-
- /* transmit out 2 bytes */
- i2cAcquireBus(&I2CD2);
- i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, max1236_tx_data, 2, max1236_rx_data, 0);
- i2cReleaseBus(&I2CD2);
-}
-
-
-/* Now simply read 8 bytes to get all 4 ADC channels */
-void read_max1236(void){
- i2cAcquireBus(&I2CD2);
- i2cMasterReceive(&I2CD2, &max1236, max1236_addr, max1236_rx_data, 8);
- i2cReleaseBus(&I2CD2);
-
- ch1 = ((max1236_rx_data[0] & 0xF) << 8) + max1236_rx_data[1];
- ch2 = ((max1236_rx_data[2] & 0xF) << 8) + max1236_rx_data[3];
- ch3 = ((max1236_rx_data[4] & 0xF) << 8) + max1236_rx_data[5];
- ch4 = ((max1236_rx_data[6] & 0xF) << 8) + max1236_rx_data[7];
-}
diff --git a/testhal/STM32F1xx/I2C/max1236.h b/testhal/STM32F1xx/I2C/max1236.h deleted file mode 100644 index aff466cf4..000000000 --- a/testhal/STM32F1xx/I2C/max1236.h +++ /dev/null @@ -1,14 +0,0 @@ -#include "ch.h"
-
-#ifndef MAX1236_H_
-#define MAX1236_H_
-
-
-#define MAX1236_RX_DEPTH 8
-#define MAX1236_TX_DEPTH 2
-
-
-void init_max1236(void);
-void read_max1236(void);
-
-#endif /* MAX1236_H_ */
diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 809c3abd2..dc4d3960c 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -47,7 +47,7 @@ /*
* ADC driver system settings.
*/
-#define STM32_ADC_USE_ADC1 TRUE
+#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_ADC1_DMA_PRIORITY 3
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt()
@@ -59,6 +59,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 TRUE
@@ -107,22 +122,24 @@ /*
* SERIAL driver system settings.
*/
-#define STM32_SERIAL_USE_USART1 TRUE
-#define STM32_SERIAL_USE_USART2 TRUE
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 FALSE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
*/
-#define STM32_SPI_USE_SPI1 TRUE
-#define STM32_SPI_USE_SPI2 TRUE
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI2 FALSE
#define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
@@ -150,25 +167,18 @@ * I2C driver system settings.
*/
#define STM32_I2C_USE_I2C1 TRUE
-#define STM32_I2C_USE_I2C2 TRUE
+#define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_I2C1_IRQ_PRIORITY 10
#define STM32_I2C_I2C2_IRQ_PRIORITY 10
-#define STM32_I2C_I2C1_DMA_PRIORITY 4
-#define STM32_I2C_I2C2_DMA_PRIORITY 4
+#define STM32_I2C_I2C1_DMA_PRIORITY 1
+#define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
-/* I2C1 */
-#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1
-#define STM32_I2C_I2C1_USE_POLLING_WAIT TRUE
-/* I2C2 */
-#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2
-#define STM32_I2C_I2C2_USE_POLLING_WAIT TRUE
-
/*
* USB driver system settings.
*/
-#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_USE_USB1 FALSE
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c index 72e634527..23410843f 100644 --- a/testhal/STM32F1xx/I2C/tmp75.c +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -1,3 +1,23 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
/**
* TMP75 is most simple I2C device in our case. It is already useful with
* default settings after powerup.
@@ -13,40 +33,26 @@ /* input buffer */
-static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH];
+static uint8_t tmp75_rx_data[TMP75_RX_DEPTH];
/* temperature value */
static int16_t temperature = 0;
-/* Simple error trap */
-static void i2c_tmp75_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
- (void)i2cscfg;
- int status = 0;
- status = i2cp->id_i2c->SR1;
- while(TRUE);
-}
-
-/* This callback raise up when transfer finished */
-static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){
- (void)*i2cp;
- (void)*i2cscfg;
- /* store temperature value */
-}
-
-/* Fill TMP75 config. */
-static const I2CSlaveConfig tmp75 = {
- i2c_tmp75_cb,
- i2c_tmp75_error_cb,
-};
+static i2cflags_t errors = 0;
#define tmp75_addr 0b1001000
/* This is main function. */
void request_temperature(void){
- i2cAcquireBus(&I2CD2);
- i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, tmp75_rx_data, 2);
- i2cReleaseBus(&I2CD2);
- temperature = (tmp75_rx_data[0] << 8) + tmp75_rx_data[1];
+ int16_t t_int = 0, t_frac = 0;
+
+ i2cAcquireBus(&I2CD1);
+ i2cMasterReceive(&I2CD1, tmp75_addr, tmp75_rx_data, 2, &errors, TIME_INFINITE);
+ i2cReleaseBus(&I2CD1);
+
+ t_int = tmp75_rx_data[0] * 100;
+ t_frac = (tmp75_rx_data[1] * 100) >> 8;
+ temperature = t_int + t_frac;
}
diff --git a/testhal/STM32F1xx/I2C/tmp75.h b/testhal/STM32F1xx/I2C/tmp75.h index ab4b5fa9b..13648b154 100644 --- a/testhal/STM32F1xx/I2C/tmp75.h +++ b/testhal/STM32F1xx/I2C/tmp75.h @@ -1,3 +1,23 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
#ifndef TMP75_H_
#define TMP75_H_
diff --git a/testhal/STM32F1xx/IRQ_STORM/Makefile b/testhal/STM32F1xx/IRQ_STORM/Makefile index f93aeb073..0f7e20317 100644 --- a/testhal/STM32F1xx/IRQ_STORM/Makefile +++ b/testhal/STM32F1xx/IRQ_STORM/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -201,4 +206,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
-include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index 249e2a621..f9a1b78f6 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -185,6 +199,13 @@ /* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -235,16 +256,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +330,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/IRQ_STORM/main.c b/testhal/STM32F1xx/IRQ_STORM/main.c index 7dcc62d61..fd963553c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/main.c +++ b/testhal/STM32F1xx/IRQ_STORM/main.c @@ -237,9 +237,11 @@ int main(void) { println("***");
print("*** Kernel: ");
println(CH_KERNEL_VERSION);
-#ifdef __GNUC__
- print("*** GCC Version: ");
- println(__VERSION__);
+ print("*** Compiled: ");
+ println(__DATE__ " - " __TIME__);
+#ifdef CH_COMPILER_NAME
+ print("*** Compiler: ");
+ println(CH_COMPILER_NAME);
#endif
print("*** Architecture: ");
println(CH_ARCHITECTURE_NAME);
@@ -247,6 +249,10 @@ int main(void) { print("*** Core Variant: ");
println(CH_CORE_VARIANT_NAME);
#endif
+#ifdef CH_PORT_INFO
+ print("*** Port Info: ");
+ println(CH_PORT_INFO);
+#endif
#ifdef PLATFORM_NAME
print("*** Platform: ");
println(PLATFORM_NAME);
diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 2341d5626..f37ecca3c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 TRUE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/IRQ_STORM/readme.txt b/testhal/STM32F1xx/IRQ_STORM/readme.txt index 32aad05b5..94dfa4cd6 100644 --- a/testhal/STM32F1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F1xx/IRQ_STORM/readme.txt @@ -4,12 +4,16 @@ ** TARGET **
-The demo will on an Olimex STM32-P103 board.
+The demo runs on an Olimex STM32-P103 board.
** The Demo **
-The application demonstrates the use of the STM32 GPT, PAL and Serial drivers
-in order to implement a system stress demo.
+The application demonstrates the use of the STM32F1xx GPT, PAL and Serial
+drivers in order to implement a system stress demo.
+
+** Board Setup **
+
+None.
** Build Procedure **
diff --git a/testhal/STM32F1xx/MAC/Makefile b/testhal/STM32F1xx/MAC/Makefile new file mode 100644 index 000000000..626ff0b9d --- /dev/null +++ b/testhal/STM32F1xx/MAC/Makefile @@ -0,0 +1,208 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Enable this if you really want to use the STM FWLib.
+ifeq ($(USE_FWLIB),)
+ USE_FWLIB = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../..
+include $(CHIBIOS)/boards/OLIMEX_STM32_P107/board.mk
+include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk
+include $(CHIBIOS)/os/kernel/kernel.mk
+
+# Define linker script file here
+LDSCRIPT= $(PORTLD)/STM32F103xB.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+ $(KERNSRC) \
+ $(TESTSRC) \
+ $(HALSRC) \
+ $(PLATFORMSRC) \
+ $(BOARDSRC) \
+ $(CHIBIOS)/os/various/evtimer.c \
+ $(CHIBIOS)/os/various/syscalls.c \
+ main.c +
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ $(HALINC) $(PLATFORMINC) $(BOARDINC) \
+ $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m3
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of default section
+#
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+ifeq ($(USE_FWLIB),yes)
+ include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
+ CSRC += $(STM32SRC)
+ INCDIR += $(STM32INC)
+ USE_OPT += -DUSE_STDPERIPH_DRIVER
+endif
+
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/MAC/chconf.h b/testhal/STM32F1xx/MAC/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F1xx/MAC/chconf.h @@ -0,0 +1,535 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 1000
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ *
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 20
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_MEMCORE.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 0
+#endif
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread automatically. The application has
+ * then the responsibility to do one of the following:
+ * - Spawn a custom idle thread at priority @p IDLEPRIO.
+ * - Change the main() thread priority to @p IDLEPRIO then enter
+ * an endless loop. In this scenario the @p main() thread acts as
+ * the idle thread.
+ * .
+ * @note Unless an idle thread is spawned the @p main() thread must not
+ * enter a sleep state.
+ */
+#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
+#define CH_NO_IDLE_THREAD FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
+#define CH_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemSignalWait() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
+#endif
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS TRUE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS TRUE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE TRUE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS TRUE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitily from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
+#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_TICK_EVENT_HOOK() { \
+ /* System tick event code here.*/ \
+}
+#endif
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_HALT_HOOK() { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM32F1xx/MAC/halconf.h b/testhal/STM32F1xx/MAC/halconf.h new file mode 100644 index 000000000..8ccf4de5c --- /dev/null +++ b/testhal/STM32F1xx/MAC/halconf.h @@ -0,0 +1,335 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC TRUE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Block size for MMC transfers.
+ */
+#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
+#define MMC_SECTOR_SIZE 512
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/**
+ * @brief Number of positive insertion queries before generating the
+ * insertion event.
+ */
+#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
+#define MMC_POLLING_INTERVAL 10
+#endif
+
+/**
+ * @brief Interval, in milliseconds, between insertion queries.
+ */
+#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
+#define MMC_POLLING_DELAY 10
+#endif
+
+/**
+ * @brief Uses the SPI polled API for small data transfers.
+ * @details Polled transfers usually improve performance because it
+ * saves two context switches and interrupt servicing. Note
+ * that this option has no effect on large transfers which
+ * are always performed using DMAs/IRQs.
+ */
+#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
+#define MMC_USE_SPI_POLLING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intevals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c new file mode 100644 index 000000000..6e6081162 --- /dev/null +++ b/testhal/STM32F1xx/MAC/main.c @@ -0,0 +1,51 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Activates the EXT driver 1.
+ */
+/* macStart(ÐD1, NULL);*/
+
+ /*
+ * Normal main() thread activity, in this demo it enables and disables the
+ * button EXT channel using 5 seconds intervals.
+ */
+ while (TRUE) {
+ chThdSleepMilliseconds(500);
+ }
+}
diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h new file mode 100644 index 000000000..b8d72d861 --- /dev/null +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -0,0 +1,183 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * STM32 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_ACTIVATE_PLL1 TRUE
+#define STM32_ACTIVATE_PLL2 TRUE
+#define STM32_ACTIVATE_PLL3 TRUE
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_PREDIV1
+#define STM32_PREDIV1SRC STM32_PREDIV1SRC_PLL2
+#define STM32_PREDIV1_VALUE 5
+#define STM32_PLLMUL_VALUE 9
+#define STM32_PREDIV2_VALUE 5
+#define STM32_PLL2MUL_VALUE 8
+#define STM32_PLL3MUL_VALUE 10
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV2
+#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_ADCPRE STM32_ADCPRE_DIV4
+#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3
+#define STM32_MCO STM32_MCO_PLL3
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1 TRUE
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC1_IRQ_PRIORITY 5
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 TRUE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM5 FALSE
+#define STM32_GPT_USE_TIM8 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM5_IRQ_PRIORITY 7
+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 TRUE
+#define STM32_ICU_USE_TIM5 FALSE
+#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM5_IRQ_PRIORITY 7
+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED TRUE
+#define STM32_PWM_USE_TIM1 TRUE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM3 FALSE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM5 FALSE
+#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM5_IRQ_PRIORITY 7
+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 FALSE
+#define STM32_SERIAL_USE_USART3 TRUE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI2 FALSE
+#define STM32_SPI_USE_SPI3 TRUE
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 TRUE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
diff --git a/testhal/STM32F1xx/MAC/readme.txt b/testhal/STM32F1xx/MAC/readme.txt new file mode 100644 index 000000000..5c40b1c3f --- /dev/null +++ b/testhal/STM32F1xx/MAC/readme.txt @@ -0,0 +1,26 @@ +*****************************************************************************
+** ChibiOS/RT HAL - MAC driver demo for STM32. **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on an Olimex STM32-P107 board.
+
+** The Demo **
+
+The application demonstrates the use of the STM32 MAC driver.
+
+** Build Procedure **
+
+The demo has been tested by using the free Codesourcery GCC-based toolchain
+and YAGARTO.
+Just modify the TRGT line in the makefile in order to use different GCC ports.
+
+** Notes **
+
+Some files used by the demo are not part of ChibiOS/RT but are copyright of
+ST Microelectronics and are licensed under a different license.
+Also note that not all the files present in the ST library are distribited
+with ChibiOS/RT, you can find the whole library on the ST web site:
+
+ http://www.st.com
diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile index 93cf17eff..0f7e20317 100644 --- a/testhal/STM32F1xx/PWM-ICU/Makefile +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -61,6 +66,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk
#include $(CHIBIOS)/test/test.mk
+# Define linker script file here
+LDSCRIPT= $(PORTLD)/STM32F103xB.ld
+
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
@@ -198,4 +206,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
-include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 9656ff0aa..5d3985cdd 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -185,6 +199,13 @@ /* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -235,16 +256,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +330,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 558c0773d..bce5518d6 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/PWM-ICU/readme.txt b/testhal/STM32F1xx/PWM-ICU/readme.txt index 97476205d..520f2feeb 100644 --- a/testhal/STM32F1xx/PWM-ICU/readme.txt +++ b/testhal/STM32F1xx/PWM-ICU/readme.txt @@ -4,7 +4,7 @@ ** TARGET **
-The demo will on an Olimex STM32-P103 board.
+The demo runs on an Olimex STM32-P103 board.
** The Demo **
diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile index 2f471c293..e0c032c91 100644 --- a/testhal/STM32F1xx/RTC/Makefile +++ b/testhal/STM32F1xx/RTC/Makefile @@ -12,13 +12,18 @@ ifeq ($(USE_OPT),) # If all calls to a given function are integrated, and the function is declared static, then the function is normally not output as assembler code in its own right.
# Enabled at level '-O3'.
- USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
#USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline
#USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing
#USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16
#USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -34,9 +39,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -86,7 +91,6 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/evtimer.c \
$(CHIBIOS)/os/various/syscalls.c \
main.c \
-
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
@@ -215,6 +219,3 @@ ifeq ($(USE_FWLIB),yes) endif
include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
-
-
-
diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 553decda8..12944d159 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -55,6 +55,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -97,6 +104,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC TRUE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -138,13 +152,6 @@ #define HAL_USE_USB FALSE
#endif
-/**
- * @brief Enables the USB subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC TRUE
-#endif
-
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
@@ -205,24 +212,18 @@ /*===========================================================================*/
/* RTC driver related settings. */
/*===========================================================================*/
-/**
- * @brief Switch to TRUE if you need callbacks from RTC.
- */
-#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__)
-#define RTC_SUPPORTS_CALLBACKS FALSE
-#endif
-
-/**
- * @brief Clock source selecting. LSE by default.
- */
-#if !defined(RTC_CLOCK_SOURCE) || defined(__DOXYGEN__)
-#define RTC_CLOCK_SOURCE RCC_BDCR_RTCSEL_LSE
-#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -273,16 +274,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -354,10 +348,6 @@ #define SPI_USE_MUTUAL_EXCLUSION FALSE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index 497b7f0cf..ea7155f47 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -21,30 +21,33 @@ #include "ch.h"
#include "hal.h"
-#define TEST_DEEPSLEEP_ENABLE
+RTCTime timespec;
+RTCAlarm alarmspec;
-#ifdef TEST_DEEPSLEEP_ENABLE
+#define TEST_ALARM_WAKEUP FALSE
+#if TEST_ALARM_WAKEUP
+
+/* sleep indicator thread */
static WORKING_AREA(blinkWA, 128);
static msg_t blink_thd(void *arg){
(void)arg;
while (TRUE) {
- chThdSleepMilliseconds(500);
+ chThdSleepMilliseconds(100);
palTogglePad(IOPORT3, GPIOC_LED);
}
return 0;
}
-
-
-
int main(void) {
halInit();
chSysInit();
chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL);
/* set alarm in near future */
- rtcSetAlarm(rtcGetSec() + 60);
+ rtcGetTime(×pec);
+ alarmspec.tv_sec = timespec.tv_sec + 60;
+ rtcSetAlarm(&alarmspec);
while (TRUE){
chThdSleepSeconds(10);
@@ -58,43 +61,40 @@ int main(void) { return 0;
}
+#else /* TEST_ALARM_WAKEUP */
+static void my_cb(RTCDriver *rtcp, rtcevent_t event) {
-#else /* TEST_DEEPSLEEP_ENABLE */
-
-static void my_secondcb(RTCDriver *rtcp){
(void)rtcp;
- //palTogglePad(IOPORT3, GPIOC_LED);
-}
-static void my_alarmcb(RTCDriver *rtcp){
- (void)rtcp;
- palTogglePad(IOPORT3, GPIOC_LED);
- rtcSetAlarm(rtcGetSec() + 10);
-}
-
-static void my_overflowcb(RTCDriver *rtcp){
- (void)rtcp;
- palTogglePad(IOPORT3, GPIOC_LED);
- rtcSetAlarm(rtcGetSec() + 10);
+ switch (event) {
+ case RTC_EVENT_OVERFLOW:
+ palTogglePad(GPIOC, GPIOC_LED);
+ break;
+ case RTC_EVENT_SECOND:
+ //palTogglePad(GPIOC, GPIOC_LED);
+ break;
+ case RTC_EVENT_ALARM:
+ palTogglePad(GPIOC, GPIOC_LED);
+ rtcGetTime(&RTCD1, ×pec);
+ alarmspec.tv_sec = timespec.tv_sec + 10;
+ rtcSetAlarm(&RTCD1, 0, &alarmspec);
+ break;
+ }
}
-static const RTCConfig rtccfg={
- my_overflowcb,
- my_secondcb,
- my_alarmcb,
-};
-
int main(void) {
halInit();
chSysInit();
- rtcSetAlarm(rtcGetSec() + 10);
- rtcStart(&RTCD, &rtccfg);
+ rtcGetTime(&RTCD1, ×pec);
+ alarmspec.tv_sec = timespec.tv_sec + 10;
+ rtcSetAlarm(&RTCD1, 0, &alarmspec);
+ rtcSetCallback(&RTCD1, my_cb);
while (TRUE){
chThdSleepMilliseconds(500);
}
return 0;
}
-#endif /* TEST_DEEPSLEEP_ENABLE */
+#endif /* TEST_ALARM_WAKEUP */
diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index fc7ce0053..8413e2421 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -43,6 +43,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_RTC STM32_RTC_LSE
/*
* ADC driver system settings.
@@ -59,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -115,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
-#define STM32_SERIAL_USART1_PRIORITY 9
-#define STM32_SERIAL_USART2_PRIORITY 10
-#define STM32_SERIAL_USART3_PRIORITY 2
-#define STM32_SERIAL_UART4_PRIORITY 2
-#define STM32_SERIAL_UART5_PRIORITY 2
+#define STM32_SERIAL_USE_USART6 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/SDIO/Makefile b/testhal/STM32F1xx/SDC/Makefile index c56c5eadb..4e25ee845 100644 --- a/testhal/STM32F1xx/SDIO/Makefile +++ b/testhal/STM32F1xx/SDC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -204,4 +209,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
-include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/SDC/chconf.h b/testhal/STM32F1xx/SDC/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F1xx/SDC/chconf.h @@ -0,0 +1,535 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 1000
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ *
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 20
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_MEMCORE.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 0
+#endif
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread automatically. The application has
+ * then the responsibility to do one of the following:
+ * - Spawn a custom idle thread at priority @p IDLEPRIO.
+ * - Change the main() thread priority to @p IDLEPRIO then enter
+ * an endless loop. In this scenario the @p main() thread acts as
+ * the idle thread.
+ * .
+ * @note Unless an idle thread is spawned the @p main() thread must not
+ * enter a sleep state.
+ */
+#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
+#define CH_NO_IDLE_THREAD FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
+#define CH_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemSignalWait() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
+#endif
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS TRUE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS TRUE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE TRUE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS TRUE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitily from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
+#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_TICK_EVENT_HOOK() { \
+ /* System tick event code here.*/ \
+}
+#endif
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_HALT_HOOK() { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM32F1xx/SDIO/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index 682167d84..978dbc65c 100644 --- a/testhal/STM32F1xx/SDIO/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -185,6 +199,13 @@ /* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -235,16 +256,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +330,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/SDIO/main.c b/testhal/STM32F1xx/SDC/main.c index 9736f0268..9736f0268 100644 --- a/testhal/STM32F1xx/SDIO/main.c +++ b/testhal/STM32F1xx/SDC/main.c diff --git a/testhal/STM32F1xx/SDIO/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index 658924fc2..d70b08473 100644 --- a/testhal/STM32F1xx/SDIO/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -124,11 +138,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/SDIO/readme.txt b/testhal/STM32F1xx/SDC/readme.txt index caeb7bce7..de5af6948 100644 --- a/testhal/STM32F1xx/SDIO/readme.txt +++ b/testhal/STM32F1xx/SDC/readme.txt @@ -4,7 +4,7 @@ ** TARGET **
-The demo will on an Olimex ST_STM3210E_EVAL board.
+The demo runs on an Olimex ST_STM3210E_EVAL board.
** The Demo **
diff --git a/testhal/STM32F1xx/SPI/Makefile b/testhal/STM32F1xx/SPI/Makefile index f93aeb073..0f7e20317 100644 --- a/testhal/STM32F1xx/SPI/Makefile +++ b/testhal/STM32F1xx/SPI/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -201,4 +206,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
-include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index eaf7f9673..b3bbd85fd 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -185,6 +199,13 @@ /* MAC driver related settings. */
/*===========================================================================*/
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@@ -235,16 +256,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +330,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index 558c0773d..bce5518d6 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/SPI/readme.txt b/testhal/STM32F1xx/SPI/readme.txt index 590fd8299..b3d53c5a2 100644 --- a/testhal/STM32F1xx/SPI/readme.txt +++ b/testhal/STM32F1xx/SPI/readme.txt @@ -4,7 +4,7 @@ ** TARGET **
-The demo will on an Olimex STM32-P103 board.
+The demo runs on an Olimex STM32-P103 board.
** The Demo **
diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile index f93aeb073..0f7e20317 100644 --- a/testhal/STM32F1xx/UART/Makefile +++ b/testhal/STM32F1xx/UART/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
@@ -201,4 +206,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
-include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index d353272b7..8a458d702 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -235,16 +249,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index c8dd60ca1..4b23c2e7d 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/UART/readme.txt b/testhal/STM32F1xx/UART/readme.txt index fc111a298..0fc5de144 100644 --- a/testhal/STM32F1xx/UART/readme.txt +++ b/testhal/STM32F1xx/UART/readme.txt @@ -4,7 +4,7 @@ ** TARGET **
-The demo will on an Olimex STM32-P103 board.
+The demo runs on an Olimex STM32-P103 board.
** The Demo **
diff --git a/testhal/STM32F1xx/USB_CDC/Makefile b/testhal/STM32F1xx/USB_CDC/Makefile index 45218c328..0c781d14c 100644 --- a/testhal/STM32F1xx/USB_CDC/Makefile +++ b/testhal/STM32F1xx/USB_CDC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index 3895ff70a..cfe13f216 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -235,16 +249,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 601b6ce0b..9e05edbdb 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -332,22 +332,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { }
static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) {
- static const char *states[] = {
- "READY",
- "CURRENT",
- "SUSPENDED",
- "WTSEM",
- "WTMTX",
- "WTCOND",
- "SLEEPING",
- "WTEXIT",
- "WTOREVT",
- "WTANDEVT",
- "SNDMSGQ",
- "SNDMSG",
- "WTMSG",
- "FINAL"
- };
+ static const char *states[] = {THD_STATE_NAMES};
Thread *tp;
(void)argv;
@@ -436,6 +421,7 @@ int main(void) { */
sduObjectInit(&SDU1);
sduStart(&SDU1, &serusbcfg);
+ usbConnectBus(serusbcfg.usbp);
palClearPad(GPIOC, GPIOC_USB_DISC);
/*
diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index 558c0773d..bce5518d6 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
diff --git a/testhal/STM32F1xx/USB_MSC/Makefile b/testhal/STM32F1xx/USB_MSC/Makefile index 651b7b346..1f76375fe 100644 --- a/testhal/STM32F1xx/USB_MSC/Makefile +++ b/testhal/STM32F1xx/USB_MSC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#
diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 2302e0179..726ec0a55 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -56,6 +56,13 @@ #endif
/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
@@ -98,6 +105,13 @@ #endif
/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
@@ -235,16 +249,9 @@ #endif
/*===========================================================================*/
-/* PAL driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* PWM driver related settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
+
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@@ -316,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
#endif /* _HALCONF_H_ */
/** @} */
diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index 558c0773d..bce5518d6 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -61,6 +60,21 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
@@ -117,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
|