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-rw-r--r--testhal/STM32/STM32L4xx/ADC/mcuconf.h4
-rw-r--r--testhal/STM32/STM32L4xx/CAN/mcuconf.h4
-rw-r--r--testhal/STM32/STM32L4xx/EXT/mcuconf.h4
-rw-r--r--testhal/STM32/STM32L4xx/GPT-ADC/mcuconf.h4
-rw-r--r--testhal/STM32/STM32L4xx/I2C-LIS3MLD/mcuconf.h4
-rw-r--r--testhal/STM32/STM32L4xx/I2C-LSM6DS0/mcuconf.h4
-rw-r--r--testhal/STM32/STM32L4xx/IRQ_STORM/mcuconf.h4
-rw-r--r--testhal/STM32/STM32L4xx/QSPI-N25Q128/mcuconf.h4
-rw-r--r--testhal/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h4
9 files changed, 18 insertions, 18 deletions
diff --git a/testhal/STM32/STM32L4xx/ADC/mcuconf.h b/testhal/STM32/STM32L4xx/ADC/mcuconf.h
index 7e7b89666..30ed18ef0 100644
--- a/testhal/STM32/STM32L4xx/ADC/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/ADC/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
diff --git a/testhal/STM32/STM32L4xx/CAN/mcuconf.h b/testhal/STM32/STM32L4xx/CAN/mcuconf.h
index c775e65c6..ccc501b0f 100644
--- a/testhal/STM32/STM32L4xx/CAN/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/CAN/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
diff --git a/testhal/STM32/STM32L4xx/EXT/mcuconf.h b/testhal/STM32/STM32L4xx/EXT/mcuconf.h
index 686432776..d8773b13c 100644
--- a/testhal/STM32/STM32L4xx/EXT/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/EXT/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
diff --git a/testhal/STM32/STM32L4xx/GPT-ADC/mcuconf.h b/testhal/STM32/STM32L4xx/GPT-ADC/mcuconf.h
index 7f1fe64cc..58f23cd60 100644
--- a/testhal/STM32/STM32L4xx/GPT-ADC/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/GPT-ADC/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
diff --git a/testhal/STM32/STM32L4xx/I2C-LIS3MLD/mcuconf.h b/testhal/STM32/STM32L4xx/I2C-LIS3MLD/mcuconf.h
index bd898f54d..907e0a880 100644
--- a/testhal/STM32/STM32L4xx/I2C-LIS3MLD/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/I2C-LIS3MLD/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
diff --git a/testhal/STM32/STM32L4xx/I2C-LSM6DS0/mcuconf.h b/testhal/STM32/STM32L4xx/I2C-LSM6DS0/mcuconf.h
index bd898f54d..907e0a880 100644
--- a/testhal/STM32/STM32L4xx/I2C-LSM6DS0/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/I2C-LSM6DS0/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
diff --git a/testhal/STM32/STM32L4xx/IRQ_STORM/mcuconf.h b/testhal/STM32/STM32L4xx/IRQ_STORM/mcuconf.h
index 3183adc94..fc8d078e2 100644
--- a/testhal/STM32/STM32L4xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/IRQ_STORM/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
diff --git a/testhal/STM32/STM32L4xx/QSPI-N25Q128/mcuconf.h b/testhal/STM32/STM32L4xx/QSPI-N25Q128/mcuconf.h
index 1422bc0b6..294f0a700 100644
--- a/testhal/STM32/STM32L4xx/QSPI-N25Q128/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/QSPI-N25Q128/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
diff --git a/testhal/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h b/testhal/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h
index 5125552ca..75c7b4092 100644
--- a/testhal/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h
+++ b/testhal/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h
@@ -239,8 +239,8 @@
*/
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDMMC_WRITE_TIMEOUT 250
-#define STM32_SDC_SDMMC_READ_TIMEOUT 25
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9