diff options
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/platforms/STM32/GPIOv2/pal_lld.c | 9 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F4xx/hal_lld.h | 7 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F4xx/stm32_dma.h | 2 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F4xx/stm32f4xx.h | 4 | ||||
| -rw-r--r-- | os/hal/platforms/STM32L1xx/stm32l1xx.h | 2 | ||||
| -rw-r--r-- | os/ports/common/ARMCMx/CMSIS/include/core_cmFunc.h | 3 |
6 files changed, 21 insertions, 6 deletions
diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.c b/os/hal/platforms/STM32/GPIOv2/pal_lld.c index bde24db25..affdaaedb 100644 --- a/os/hal/platforms/STM32/GPIOv2/pal_lld.c +++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.c @@ -40,7 +40,14 @@ RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN | \
RCC_AHB1ENR_GPIOEEN | RCC_AHB1ENR_GPIOFEN | \
RCC_AHB1ENR_GPIOGEN | RCC_AHB1ENR_GPIOHEN | \
- RCC_AHB1ENR_GPIOIEN)
+ RCC_AHB1ENR_GPIOIEN)
+#define AHB1_LPEN_MASK AHB1_EN_MASK
+#elif defined(STM32F4XX)
+#define AHB1_EN_MASK (RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | \
+ RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN | \
+ RCC_AHB1ENR_GPIOEEN | RCC_AHB1ENR_GPIOFEN | \
+ RCC_AHB1ENR_GPIOGEN | RCC_AHB1ENR_GPIOHEN | \
+ RCC_AHB1ENR_GPIOIEN)
#define AHB1_LPEN_MASK AHB1_EN_MASK
#else
#error "missing or usupported platform for GPIOv2 PAL driver"
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h index 337b67b55..ca46e5287 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.h +++ b/os/hal/platforms/STM32F4xx/hal_lld.h @@ -781,13 +781,13 @@ #error "STM32_LSECLK outside acceptable range (STM32_LSECLK_MIN...STM32_LSECLK_MAX)"
#endif
-#else /* !#if STM32_LSE_ENABLED */
+#else /* !STM32_LSE_ENABLED */
#if STM32_RTCSEL == STM32_RTCSEL_LSE
#error "LSE not enabled, required by STM32_RTCSEL"
#endif
-#endif /* !#if STM32_LSE_ENABLED */
+#endif /* !STM32_LSE_ENABLED */
/**
* @brief STM32_PLLM field.
@@ -1208,8 +1208,9 @@ /* External declarations. */
/*===========================================================================*/
-/* STM32 DMA support code.*/
+/* STM32 DMA and RCC helpers.*/
#include "stm32_dma.h"
+#include "stm32_rcc.h"
#ifdef __cplusplus
extern "C" {
diff --git a/os/hal/platforms/STM32F4xx/stm32_dma.h b/os/hal/platforms/STM32F4xx/stm32_dma.h index a1266fec4..327b1bc55 100644 --- a/os/hal/platforms/STM32F4xx/stm32_dma.h +++ b/os/hal/platforms/STM32F4xx/stm32_dma.h @@ -155,7 +155,7 @@ * @brief STM32 DMA stream descriptor structure.
*/
typedef struct {
- DMA_Channel_TypeDef *channel; /**< @brief Associated DMA channel. */
+ DMA_Stream_TypeDef *stream; /**< @brief Associated DMA channel. */
volatile uint32_t *ifcr; /**< @brief Associated IFCR reg. */
uint8_t ishift; /**< @brief Bits offset in xIFCR
register. */
diff --git a/os/hal/platforms/STM32F4xx/stm32f4xx.h b/os/hal/platforms/STM32F4xx/stm32f4xx.h index 60dc0622a..ccc1a3565 100644 --- a/os/hal/platforms/STM32F4xx/stm32f4xx.h +++ b/os/hal/platforms/STM32F4xx/stm32f4xx.h @@ -646,7 +646,8 @@ typedef struct /**
* @brief General Purpose I/O
*/
-
+/* CHIBIOS FIX */
+#if 0
typedef struct
{
__IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */
@@ -660,6 +661,7 @@ typedef struct __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */
__IO uint32_t AFR[2]; /*!< GPIO alternate function registers, Address offset: 0x20-0x24 */
} GPIO_TypeDef;
+#endif
/**
* @brief System configuration controller
diff --git a/os/hal/platforms/STM32L1xx/stm32l1xx.h b/os/hal/platforms/STM32L1xx/stm32l1xx.h index 48be82360..9723158c8 100644 --- a/os/hal/platforms/STM32L1xx/stm32l1xx.h +++ b/os/hal/platforms/STM32L1xx/stm32l1xx.h @@ -411,6 +411,7 @@ typedef struct /**
* @brief General Purpose IO
*/
+/* CHIBIOS FIX */
#if 0
typedef struct
{
@@ -429,6 +430,7 @@ typedef struct __IO uint32_t AFR[2];
} GPIO_TypeDef;
#endif
+#endif
/**
* @brief SysTem Configuration
diff --git a/os/ports/common/ARMCMx/CMSIS/include/core_cmFunc.h b/os/ports/common/ARMCMx/CMSIS/include/core_cmFunc.h index c999b1c83..ecf22a6bf 100644 --- a/os/ports/common/ARMCMx/CMSIS/include/core_cmFunc.h +++ b/os/ports/common/ARMCMx/CMSIS/include/core_cmFunc.h @@ -586,6 +586,9 @@ __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fps {
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
+#else
+/* CHIBIOS FIX */
+ (void)fpscr;
#endif
}
|