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-rw-r--r--os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h2
-rw-r--r--os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c36
-rw-r--r--os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c39
-rw-r--r--os/hal/ports/STM32/STM32F37x/hal_lld.h1
-rw-r--r--os/hal/ports/STM32/STM32F37x/platform.mk1
-rw-r--r--os/hal/ports/STM32/STM32F37x/stm32_registry.h4
-rw-r--r--os/hal/ports/STM32/STM32H7xx/hal_lld.h1
-rw-r--r--os/hal/ports/STM32/STM32H7xx/platform.mk1
-rw-r--r--os/hal/ports/STM32/STM32H7xx/stm32_registry.h1
-rw-r--r--os/hal/ports/STM32/STM32L1xx/hal_lld.h1
-rw-r--r--os/hal/ports/STM32/STM32L1xx/platform.mk1
-rw-r--r--os/hal/ports/STM32/STM32L1xx/stm32_registry.h2
12 files changed, 34 insertions, 56 deletions
diff --git a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h
index 046eec162..63f192ee2 100644
--- a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h
+++ b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h
@@ -45,7 +45,7 @@
/** @} */
/* Handling differences in ST headers.*/
-#if !defined(STM32L4XX) && !defined(STM32L4XXP)
+#if !defined(STM32H7XX) && !defined(STM32L4XX) && !defined(STM32L4XXP)
#define EMR1 EMR
#define IMR1 IMR
#define PR1 PR
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c
index a8ce78f87..78d52b94d 100644
--- a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c
+++ b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c
@@ -160,13 +160,8 @@ void _pal_lld_enablepadevent(ioportid_t port,
/* Multiple channel setting of the same channel not allowed, first disable
it. This is done because on STM32 the same channel cannot be mapped on
multiple ports.*/
-#if defined(STM32_EXTI_ENHANCED)
osalDbgAssert(((EXTI->RTSR1 & padmask) == 0U) &&
((EXTI->FTSR1 & padmask) == 0U), "channel already in use");
-#else
- osalDbgAssert(((EXTI->RTSR & padmask) == 0U) &&
- ((EXTI->FTSR & padmask) == 0U), "channel already in use");
-#endif
/* Index and mask of the SYSCFG CR register to be used.*/
cridx = (uint32_t)pad >> 2U;
@@ -181,7 +176,6 @@ void _pal_lld_enablepadevent(ioportid_t port,
SYSCFG->EXTICR[cridx] = (SYSCFG->EXTICR[cridx] & crmask) | (portidx << croff);
/* Programming edge registers.*/
-#if defined(STM32_EXTI_ENHANCED)
if (mode & PAL_EVENT_MODE_RISING_EDGE)
EXTI->RTSR1 |= padmask;
else
@@ -192,21 +186,12 @@ void _pal_lld_enablepadevent(ioportid_t port,
EXTI->FTSR1 &= ~padmask;
/* Programming interrupt and event registers.*/
+#if defined(STM32_EXTI_ENHANCED)
EXTI_D1->IMR1 |= padmask;
EXTI_D1->EMR1 &= ~padmask;
#else
- if (mode & PAL_EVENT_MODE_RISING_EDGE)
- EXTI->RTSR |= padmask;
- else
- EXTI->RTSR &= ~padmask;
- if (mode & PAL_EVENT_MODE_FALLING_EDGE)
- EXTI->FTSR |= padmask;
- else
- EXTI->FTSR &= ~padmask;
-
- /* Programming interrupt and event registers.*/
- EXTI->IMR |= padmask;
- EXTI->EMR &= ~padmask;
+ EXTI->IMR1 |= padmask;
+ EXTI->EMR1 &= ~padmask;
#endif
}
@@ -222,13 +207,8 @@ void _pal_lld_enablepadevent(ioportid_t port,
void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) {
uint32_t padmask, rtsr1, ftsr1;
-#if defined(STM32_EXTI_ENHANCED)
rtsr1 = EXTI->RTSR1;
ftsr1 = EXTI->FTSR1;
-#else
- rtsr1 = EXTI->RTSR;
- ftsr1 = EXTI->FTSR;
-#endif
/* Mask of the pad.*/
padmask = 1U << (uint32_t)pad;
@@ -258,11 +238,11 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) {
EXTI_D1->PR1 = padmask;
#else
/* Disabling channel.*/
- EXTI->IMR &= ~padmask;
- EXTI->EMR &= ~padmask;
- EXTI->RTSR = rtsr1 & ~padmask;
- EXTI->FTSR = ftsr1 & ~padmask;
- EXTI->PR = padmask;
+ EXTI->IMR1 &= ~padmask;
+ EXTI->EMR1 &= ~padmask;
+ EXTI->RTSR1 = rtsr1 & ~padmask;
+ EXTI->FTSR1 = ftsr1 & ~padmask;
+ EXTI->PR1 = padmask;
#endif
#if PAL_USE_CALLBACKS || PAL_USE_WAIT
diff --git a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
index 7568ccc59..92b61b52b 100644
--- a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
+++ b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
@@ -30,15 +30,6 @@
/* Driver local definitions. */
/*===========================================================================*/
-/* Handling a difference in ST headers.*/
-#if defined(STM32L4XX) || defined(STM32L4XXP)
-#define EMR EMR1
-#define IMR IMR1
-#define PR PR1
-#define RTSR RTSR1
-#define FTSR FTSR1
-#endif
-
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@@ -174,8 +165,8 @@ void _pal_lld_enablepadevent(ioportid_t port,
/* Multiple channel setting of the same channel not allowed, first disable
it. This is done because on STM32 the same channel cannot be mapped on
multiple ports.*/
- osalDbgAssert(((EXTI->RTSR & padmask) == 0U) &&
- ((EXTI->FTSR & padmask) == 0U), "channel already in use");
+ osalDbgAssert(((EXTI->RTSR1 & padmask) == 0U) &&
+ ((EXTI->FTSR1 & padmask) == 0U), "channel already in use");
/* Index and mask of the SYSCFG CR register to be used.*/
cridx = (uint32_t)pad >> 2U;
@@ -191,17 +182,17 @@ void _pal_lld_enablepadevent(ioportid_t port,
/* Programming edge registers.*/
if (mode & PAL_EVENT_MODE_RISING_EDGE)
- EXTI->RTSR |= padmask;
+ EXTI->RTSR1 |= padmask;
else
- EXTI->RTSR &= ~padmask;
+ EXTI->RTSR1 &= ~padmask;
if (mode & PAL_EVENT_MODE_FALLING_EDGE)
- EXTI->FTSR |= padmask;
+ EXTI->FTSR1 |= padmask;
else
- EXTI->FTSR &= ~padmask;
+ EXTI->FTSR1 &= ~padmask;
/* Programming interrupt and event registers.*/
- EXTI->IMR |= padmask;
- EXTI->EMR &= ~padmask;
+ EXTI->IMR1 |= padmask;
+ EXTI->EMR1 &= ~padmask;
}
/**
@@ -216,8 +207,8 @@ void _pal_lld_enablepadevent(ioportid_t port,
void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) {
uint32_t padmask, rtsr1, ftsr1;
- rtsr1 = EXTI->RTSR;
- ftsr1 = EXTI->FTSR;
+ rtsr1 = EXTI->RTSR1;
+ ftsr1 = EXTI->FTSR1;
/* Mask of the pad.*/
padmask = 1U << (uint32_t)pad;
@@ -239,11 +230,11 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) {
osalDbgAssert(crport == portidx, "channel mapped on different port");
/* Disabling channel.*/
- EXTI->IMR &= ~padmask;
- EXTI->EMR &= ~padmask;
- EXTI->RTSR = rtsr1 & ~padmask;
- EXTI->FTSR = ftsr1 & ~padmask;
- EXTI->PR = padmask;
+ EXTI->IMR1 &= ~padmask;
+ EXTI->EMR1 &= ~padmask;
+ EXTI->RTSR1 = rtsr1 & ~padmask;
+ EXTI->FTSR1 = ftsr1 & ~padmask;
+ EXTI->PR1 = padmask;
#if PAL_USE_CALLBACKS || PAL_USE_WAIT
/* Callback cleared and/or thread reset.*/
diff --git a/os/hal/ports/STM32/STM32F37x/hal_lld.h b/os/hal/ports/STM32/STM32F37x/hal_lld.h
index 7dbdfbf57..82e46b8cc 100644
--- a/os/hal/ports/STM32/STM32F37x/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F37x/hal_lld.h
@@ -993,6 +993,7 @@
#include "stm32_registry.h"
#include "stm32_isr.h"
#include "stm32_dma.h"
+#include "stm32_exti.h"
#include "stm32_rcc.h"
#ifdef __cplusplus
diff --git a/os/hal/ports/STM32/STM32F37x/platform.mk b/os/hal/ports/STM32/STM32F37x/platform.mk
index 6fa673330..f807d3dae 100644
--- a/os/hal/ports/STM32/STM32F37x/platform.mk
+++ b/os/hal/ports/STM32/STM32F37x/platform.mk
@@ -32,6 +32,7 @@ endif
include $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
diff --git a/os/hal/ports/STM32/STM32F37x/stm32_registry.h b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
index c2729188a..b5fe4f32a 100644
--- a/os/hal/ports/STM32/STM32F37x/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
@@ -103,7 +103,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -356,7 +356,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.h b/os/hal/ports/STM32/STM32H7xx/hal_lld.h
index 11af45327..c465a3910 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.h
@@ -2905,6 +2905,7 @@
#include "stm32_isr.h"
#include "stm32_dma.h"
#include "stm32_bdma.h"
+#include "stm32_exti.h"
#include "stm32_rcc.h"
#ifdef __cplusplus
diff --git a/os/hal/ports/STM32/STM32H7xx/platform.mk b/os/hal/ports/STM32/STM32H7xx/platform.mk
index 9853db181..2fd49d0df 100644
--- a/os/hal/ports/STM32/STM32H7xx/platform.mk
+++ b/os/hal/ports/STM32/STM32H7xx/platform.mk
@@ -30,6 +30,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/BDMAv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/CRYPv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv2/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv3/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/driver.mk
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_registry.h b/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
index 8c99d5f84..9dcdd99a2 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
@@ -133,6 +133,7 @@
#define STM32_ETH_NUMBER 61
/* EXTI attributes.*/
+#define STM32_EXTI_ENHANCED
#define STM32_EXTI_NUM_LINES 34
#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
diff --git a/os/hal/ports/STM32/STM32L1xx/hal_lld.h b/os/hal/ports/STM32/STM32L1xx/hal_lld.h
index cd0342a42..ea239aa12 100644
--- a/os/hal/ports/STM32/STM32L1xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L1xx/hal_lld.h
@@ -845,6 +845,7 @@
#include "mpu_v7m.h"
#include "stm32_isr.h"
#include "stm32_dma.h"
+#include "stm32_exti.h"
#include "stm32_rcc.h"
#ifdef __cplusplus
diff --git a/os/hal/ports/STM32/STM32L1xx/platform.mk b/os/hal/ports/STM32/STM32L1xx/platform.mk
index 813b1a200..43e7d1b0a 100644
--- a/os/hal/ports/STM32/STM32L1xx/platform.mk
+++ b/os/hal/ports/STM32/STM32L1xx/platform.mk
@@ -31,6 +31,7 @@ endif
# Drivers compatible with the platform.
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_registry.h b/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
index bc5485ab3..b71c88223 100644
--- a/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
@@ -130,7 +130,7 @@
#else
#define STM32_EXTI_NUM_LINES 24
#endif
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
#if (STM32L1XX_PROD_CAT == 1) || (STM32L1XX_PROD_CAT == 2) || \
(STM32L1XX_PROD_CAT == 3) || defined(__DOXYGEN__)
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-26 08:21:58 +0000