diff options
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/platforms/STM32F0xx/adc_lld.c | 1 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F0xx/ext_lld_isr.c | 46 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F0xx/stm32_registry.h | 34 | ||||
| -rw-r--r-- | os/rt/ports/ARMCMx/chcore_v6m.h | 4 |
4 files changed, 53 insertions, 32 deletions
diff --git a/os/hal/platforms/STM32F0xx/adc_lld.c b/os/hal/platforms/STM32F0xx/adc_lld.c index 932366184..1c4ffce7f 100644 --- a/os/hal/platforms/STM32F0xx/adc_lld.c +++ b/os/hal/platforms/STM32F0xx/adc_lld.c @@ -22,7 +22,6 @@ * @{
*/
-#include "ch.h"
#include "hal.h"
#if HAL_USE_ADC || defined(__DOXYGEN__)
diff --git a/os/hal/platforms/STM32F0xx/ext_lld_isr.c b/os/hal/platforms/STM32F0xx/ext_lld_isr.c index afccfdd8c..fb5100e8c 100644 --- a/os/hal/platforms/STM32F0xx/ext_lld_isr.c +++ b/os/hal/platforms/STM32F0xx/ext_lld_isr.c @@ -22,7 +22,6 @@ * @{
*/
-#include "ch.h"
#include "hal.h"
#if HAL_USE_EXT || defined(__DOXYGEN__)
@@ -54,10 +53,10 @@ *
* @isr
*/
-CH_IRQ_HANDLER(Vector54) {
+OSAL_IRQ_HANDLER(Vector54) {
uint32_t pr;
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 0) | (1 << 1));
EXTI->PR = pr;
@@ -66,7 +65,7 @@ CH_IRQ_HANDLER(Vector54) { if (pr & (1 << 1))
EXTD1.config->channels[1].cb(&EXTD1, 1);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
/**
@@ -74,10 +73,10 @@ CH_IRQ_HANDLER(Vector54) { *
* @isr
*/
-CH_IRQ_HANDLER(Vector58) {
+OSAL_IRQ_HANDLER(Vector58) {
uint32_t pr;
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 2) | (1 << 3));
EXTI->PR = pr;
@@ -86,7 +85,7 @@ CH_IRQ_HANDLER(Vector58) { if (pr & (1 << 3))
EXTD1.config->channels[3].cb(&EXTD1, 3);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
/**
@@ -94,10 +93,10 @@ CH_IRQ_HANDLER(Vector58) { *
* @isr
*/
-CH_IRQ_HANDLER(Vector5C) {
+OSAL_IRQ_HANDLER(Vector5C) {
uint32_t pr;
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) |
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) |
@@ -128,7 +127,7 @@ CH_IRQ_HANDLER(Vector5C) { if (pr & (1 << 15))
EXTD1.config->channels[15].cb(&EXTD1, 15);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
/**
@@ -136,14 +135,14 @@ CH_IRQ_HANDLER(Vector5C) { *
* @isr
*/
-CH_IRQ_HANDLER(Vector44) {
+OSAL_IRQ_HANDLER(Vector44) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 16);
EXTD1.config->channels[16].cb(&EXTD1, 16);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
/**
@@ -151,14 +150,14 @@ CH_IRQ_HANDLER(Vector44) { *
* @isr
*/
-CH_IRQ_HANDLER(Vector48) {
+OSAL_IRQ_HANDLER(Vector48) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 17);
EXTD1.config->channels[17].cb(&EXTD1, 17);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
/*===========================================================================*/
@@ -172,16 +171,11 @@ CH_IRQ_HANDLER(Vector48) { */
void ext_lld_exti_irq_enable(void) {
- nvicEnableVector(EXTI0_1_IRQn,
- CORTEX_PRIORITY_MASK(STM32_EXT_EXTI0_1_IRQ_PRIORITY));
- nvicEnableVector(EXTI2_3_IRQn,
- CORTEX_PRIORITY_MASK(STM32_EXT_EXTI2_3_IRQ_PRIORITY));
- nvicEnableVector(EXTI4_15_IRQn,
- CORTEX_PRIORITY_MASK(STM32_EXT_EXTI4_15_IRQ_PRIORITY));
- nvicEnableVector(PVD_IRQn,
- CORTEX_PRIORITY_MASK(STM32_EXT_EXTI16_IRQ_PRIORITY));
- nvicEnableVector(RTC_IRQn,
- CORTEX_PRIORITY_MASK(STM32_EXT_EXTI17_IRQ_PRIORITY));
+ nvicEnableVector(EXTI0_1_IRQn, STM32_EXT_EXTI0_1_IRQ_PRIORITY);
+ nvicEnableVector(EXTI2_3_IRQn, STM32_EXT_EXTI2_3_IRQ_PRIORITY);
+ nvicEnableVector(EXTI4_15_IRQn, STM32_EXT_EXTI4_15_IRQ_PRIORITY);
+ nvicEnableVector(PVD_IRQn, STM32_EXT_EXTI16_IRQ_PRIORITY);
+ nvicEnableVector(RTC_IRQn, STM32_EXT_EXTI17_IRQ_PRIORITY);
}
/**
diff --git a/os/hal/platforms/STM32F0xx/stm32_registry.h b/os/hal/platforms/STM32F0xx/stm32_registry.h index 94d12567e..0b12f7bb0 100644 --- a/os/hal/platforms/STM32F0xx/stm32_registry.h +++ b/os/hal/platforms/STM32F0xx/stm32_registry.h @@ -100,11 +100,39 @@ /* TIM attributes.*/
#define STM32_HAS_TIM1 TRUE
+#define STM32_TIM1_IS_32BITS FALSE
+#define STM32_TIM1_CHANNELS 4
+
#define STM32_HAS_TIM2 TRUE
+#define STM32_TIM2_IS_32BITS TRUE
+#define STM32_TIM2_CHANNELS 4
+
#define STM32_HAS_TIM3 TRUE
+#define STM32_TIM3_IS_32BITS FALSE
+#define STM32_TIM3_CHANNELS 4
+
+#define STM32_HAS_TIM6 TRUE
+#define STM32_TIM6_IS_32BITS FALSE
+#define STM32_TIM6_CHANNELS 0
+
+#define STM32_HAS_TIM14 TRUE
+#define STM32_TIM14_IS_32BITS FALSE
+#define STM32_TIM14_CHANNELS 1
+
+#define STM32_HAS_TIM15 TRUE
+#define STM32_TIM15_IS_32BITS FALSE
+#define STM32_TIM15_CHANNELS 2
+
+#define STM32_HAS_TIM16 TRUE
+#define STM32_TIM16_IS_32BITS FALSE
+#define STM32_TIM16_CHANNELS 2
+
+#define STM32_HAS_TIM17 TRUE
+#define STM32_TIM17_IS_32BITS FALSE
+#define STM32_TIM17_CHANNELS 2
+
#define STM32_HAS_TIM4 FALSE
#define STM32_HAS_TIM5 FALSE
-#define STM32_HAS_TIM6 TRUE
#define STM32_HAS_TIM7 FALSE
#define STM32_HAS_TIM8 FALSE
#define STM32_HAS_TIM9 FALSE
@@ -112,10 +140,6 @@ #define STM32_HAS_TIM11 FALSE
#define STM32_HAS_TIM12 FALSE
#define STM32_HAS_TIM13 FALSE
-#define STM32_HAS_TIM14 TRUE
-#define STM32_HAS_TIM15 TRUE
-#define STM32_HAS_TIM16 TRUE
-#define STM32_HAS_TIM17 TRUE
#define STM32_HAS_TIM18 FALSE
#define STM32_HAS_TIM19 FALSE
diff --git a/os/rt/ports/ARMCMx/chcore_v6m.h b/os/rt/ports/ARMCMx/chcore_v6m.h index d16025640..35301730d 100644 --- a/os/rt/ports/ARMCMx/chcore_v6m.h +++ b/os/rt/ports/ARMCMx/chcore_v6m.h @@ -281,6 +281,10 @@ struct context { }
#endif
+#if CH_CFG_TIMEDELTA > 0
+#include "systick.h"
+#endif
+
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
|