diff options
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/platforms/LPC11xx/hal_lld.c | 10 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/hal_lld.c | 11 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCMx/LPC11xx/cmparams.h | 3 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCMx/STM32F103/cmparams.h | 3 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCMx/chcore.h | 3 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCMx/cmsis/core_cm0.h | 3 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCMx/cmsis/core_cm3.h | 3 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCMx/crt0.s | 2 |
8 files changed, 24 insertions, 14 deletions
diff --git a/os/hal/platforms/LPC11xx/hal_lld.c b/os/hal/platforms/LPC11xx/hal_lld.c index 7d831dfa9..d513a6156 100644 --- a/os/hal/platforms/LPC11xx/hal_lld.c +++ b/os/hal/platforms/LPC11xx/hal_lld.c @@ -53,6 +53,16 @@ */
void hal_lld_init(void) {
+ /* Note: PRIGROUP 2:0 (2:6).*/
+// SCB->AIRCR = AIRCR_VECTKEY | SCB_AIRCR_PRIGROUP_0 | SCB_AIRCR_PRIGROUP_1;
+ NVICSetSystemHandlerPriority(HANDLER_SVCALL, CORTEX_PRIORITY_SVCALL);
+ NVICSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);
+ NVICSetSystemHandlerPriority(HANDLER_PENDSV, CORTEX_PRIORITY_PENDSV);
+
+ /* Systick initialization.*/
+ SysTick->LOAD = LPC11xx_SYSCLK / (8000000 / CH_FREQUENCY) - 1;
+ SysTick->VAL = 0;
+ SysTick->CTRL = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk;
}
/**
diff --git a/os/hal/platforms/STM32/hal_lld.c b/os/hal/platforms/STM32/hal_lld.c index 59e4fee58..c98de5104 100644 --- a/os/hal/platforms/STM32/hal_lld.c +++ b/os/hal/platforms/STM32/hal_lld.c @@ -74,15 +74,18 @@ const STM32GPIOConfig pal_default_config = void hal_lld_init(void) {
/* Note: PRIGROUP 4:0 (4:4).*/
- SCB->AIRCR = AIRCR_VECTKEY | SCB_AIRCR_PRIGROUP_0 | SCB_AIRCR_PRIGROUP_1;
+ SCB->AIRCR = (0x05FA << SCB_AIRCR_VECTKEY_Pos) |
+ (3 << SCB_AIRCR_PRIGROUP_Pos);
NVICSetSystemHandlerPriority(HANDLER_SVCALL, CORTEX_PRIORITY_SVCALL);
NVICSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);
NVICSetSystemHandlerPriority(HANDLER_PENDSV, CORTEX_PRIORITY_PENDSV);
- /* Systick initialization.*/
- SysTick->LOAD = SYSCLK / (8000000 / CH_FREQUENCY) - 1;
+ /* Systick initialization using the system clock.*/
+ SysTick->LOAD = SYSCLK / CH_FREQUENCY - 1;
SysTick->VAL = 0;
- SysTick->CTRL = SysTick_CTRL_ENABLE | SysTick_CTRL_TICKINT;
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
+ SysTick_CTRL_ENABLE_Msk |
+ SysTick_CTRL_TICKINT_Msk;
#if CH_HAL_USE_ADC || CH_HAL_USE_SPI
dmaInit();
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h b/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h index 790d529cb..7b8834ac9 100644 --- a/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h +++ b/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h @@ -35,6 +35,9 @@ /* Constants parameters. */
/*===========================================================================*/
+#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
+#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
+
/**
* @brief Cortex core model.
*/
diff --git a/os/ports/GCC/ARMCMx/STM32F103/cmparams.h b/os/ports/GCC/ARMCMx/STM32F103/cmparams.h index e810d1868..70c28e875 100644 --- a/os/ports/GCC/ARMCMx/STM32F103/cmparams.h +++ b/os/ports/GCC/ARMCMx/STM32F103/cmparams.h @@ -35,6 +35,9 @@ /* Constants parameters. */
/*===========================================================================*/
+#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
+#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
+
/**
* @brief Cortex core model.
*/
diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h index 2f69209ba..1927ccff0 100644 --- a/os/ports/GCC/ARMCMx/chcore.h +++ b/os/ports/GCC/ARMCMx/chcore.h @@ -39,9 +39,6 @@ #define ENABLE_WFI_IDLE 0
#endif
-#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
-#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
-
/**
* @brief Name of the implemented architecture.
*/
diff --git a/os/ports/GCC/ARMCMx/cmsis/core_cm0.h b/os/ports/GCC/ARMCMx/cmsis/core_cm0.h index 0173ec800..af27881d4 100644 --- a/os/ports/GCC/ARMCMx/cmsis/core_cm0.h +++ b/os/ports/GCC/ARMCMx/cmsis/core_cm0.h @@ -20,9 +20,6 @@ /*
* Parts of this files have been modified in ChibiOS/RT in order to fix
* some code quality issues.
- * ChibiOS/RT does not use any of the following code but this file is
- * included by the registers definition file so the warnings are still
- * propagated. */
/**************************************************************************//**
diff --git a/os/ports/GCC/ARMCMx/cmsis/core_cm3.h b/os/ports/GCC/ARMCMx/cmsis/core_cm3.h index 81934949b..5c75ec859 100644 --- a/os/ports/GCC/ARMCMx/cmsis/core_cm3.h +++ b/os/ports/GCC/ARMCMx/cmsis/core_cm3.h @@ -20,9 +20,6 @@ /*
* Parts of this files have been modified in ChibiOS/RT in order to fix
* some code quality issues.
- * ChibiOS/RT does not use any of the following code but this file is
- * included by the registers definition file so the warnings are still
- * propagated.
*/
/**************************************************************************//**
diff --git a/os/ports/GCC/ARMCMx/crt0.s b/os/ports/GCC/ARMCMx/crt0.s index fa92b97ea..15aed34a6 100644 --- a/os/ports/GCC/ARMCMx/crt0.s +++ b/os/ports/GCC/ARMCMx/crt0.s @@ -77,8 +77,8 @@ dloop: bge enddloop
ldr r0, [r1]
str r0, [r2]
- adds r0, r0, #4
adds r1, r1, #4
+ adds r2, r2, #4
b dloop
enddloop:
#else
|