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-rw-r--r--os/nil/ports/ARMCMx/nilcore_v7m.h2
-rw-r--r--os/rt/ports/ARMCMx/chcore_v7m.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/os/nil/ports/ARMCMx/nilcore_v7m.h b/os/nil/ports/ARMCMx/nilcore_v7m.h
index 3ee6f15a8..c9ffe87b8 100644
--- a/os/nil/ports/ARMCMx/nilcore_v7m.h
+++ b/os/nil/ports/ARMCMx/nilcore_v7m.h
@@ -390,7 +390,7 @@ static inline void port_init(void) {
/* DWT cycle counter enable.*/
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
#if CORTEX_MODEL == 7
- DWT->LAR = 0xC5ACCE55;
+ DWT->LAR = 0xC5ACCE55U;
#endif
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
diff --git a/os/rt/ports/ARMCMx/chcore_v7m.h b/os/rt/ports/ARMCMx/chcore_v7m.h
index 2d5b82a9e..df5d02e12 100644
--- a/os/rt/ports/ARMCMx/chcore_v7m.h
+++ b/os/rt/ports/ARMCMx/chcore_v7m.h
@@ -391,7 +391,7 @@ static inline void port_init(void) {
/* DWT cycle counter enable, note, the M7 requires DWT unlocking.*/
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
#if CORTEX_MODEL == 7
- DWT->LAR = 0xC5ACCE55;
+ DWT->LAR = 0xC5ACCE55U;
#endif
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;