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authorGiovanni Di Sirio <gdisirio@gmail.com>2016-01-04 15:19:26 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2016-01-04 15:19:26 +0000
commit31ff7676c6e2b7aee63fc2c06bd19c565a74ad7a (patch)
tree0055d227e43e0f8bff8d48e95f52768153c881b3 /os
parent788175c0883ca8b9aa5c46918c98cd906efdeb9b (diff)
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MISRA-related fixes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8688 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/nil/ports/ARMCMx/nilcore_v7m.h2
-rw-r--r--os/rt/ports/ARMCMx/chcore_v7m.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/os/nil/ports/ARMCMx/nilcore_v7m.h b/os/nil/ports/ARMCMx/nilcore_v7m.h
index 3ee6f15a8..c9ffe87b8 100644
--- a/os/nil/ports/ARMCMx/nilcore_v7m.h
+++ b/os/nil/ports/ARMCMx/nilcore_v7m.h
@@ -390,7 +390,7 @@ static inline void port_init(void) {
/* DWT cycle counter enable.*/
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
#if CORTEX_MODEL == 7
- DWT->LAR = 0xC5ACCE55;
+ DWT->LAR = 0xC5ACCE55U;
#endif
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
diff --git a/os/rt/ports/ARMCMx/chcore_v7m.h b/os/rt/ports/ARMCMx/chcore_v7m.h
index 2d5b82a9e..df5d02e12 100644
--- a/os/rt/ports/ARMCMx/chcore_v7m.h
+++ b/os/rt/ports/ARMCMx/chcore_v7m.h
@@ -391,7 +391,7 @@ static inline void port_init(void) {
/* DWT cycle counter enable, note, the M7 requires DWT unlocking.*/
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
#if CORTEX_MODEL == 7
- DWT->LAR = 0xC5ACCE55;
+ DWT->LAR = 0xC5ACCE55U;
#endif
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;