diff options
Diffstat (limited to 'os')
-rw-r--r-- | os/ports/GCC/PPC/SPC560Pxx/ivor.s | 219 | ||||
-rw-r--r-- | os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld | 173 | ||||
-rw-r--r-- | os/ports/GCC/PPC/SPC560Pxx/port.mk | 11 | ||||
-rw-r--r-- | os/ports/GCC/PPC/SPC560Pxx/ppcparams.h | 57 | ||||
-rw-r--r-- | os/ports/GCC/PPC/SPC560Pxx/vectors.s | 1109 | ||||
-rw-r--r-- | os/ports/GCC/PPC/SPC563Mxx/ivor.s | 20 | ||||
-rw-r--r-- | os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld | 20 | ||||
-rw-r--r-- | os/ports/GCC/PPC/SPC563Mxx/ppcparams.h | 5 |
8 files changed, 1610 insertions, 4 deletions
diff --git a/os/ports/GCC/PPC/SPC560Pxx/ivor.s b/os/ports/GCC/PPC/SPC560Pxx/ivor.s new file mode 100644 index 000000000..c57899b9a --- /dev/null +++ b/os/ports/GCC/PPC/SPC560Pxx/ivor.s @@ -0,0 +1,219 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC560Pxx/ivor.s
+ * @brief SPC560Pxx IVORx handlers.
+ *
+ * @addtogroup PPC_CORE
+ * @{
+ */
+
+/*
+ * Imports the PPC configuration headers.
+ */
+#define _FROM_ASM_
+#include "chconf.h"
+#include "chcore.h"
+
+#if !defined(__DOXYGEN__)
+ /*
+ * INTC registers address.
+ */
+ .equ INTC_IACKR, 0xfff48010
+ .equ INTC_EOIR, 0xfff48018
+
+ .section .handlers, "ax"
+
+ /*
+ * IVOR10 handler (Book-E decrementer).
+ */
+ .align 4
+ .globl IVOR10
+IVOR10:
+ /* Creation of the external stack frame (extctx structure).*/
+ stwu %sp, -80(%sp) /* Size of the extctx structure.*/
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
+ e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
+ e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
+#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+ stw %r0, 32(%sp) /* Saves GPR0. */
+ mfSRR0 %r0
+ stw %r0, 8(%sp) /* Saves PC. */
+ mfSRR1 %r0
+ stw %r0, 12(%sp) /* Saves MSR. */
+ mfCR %r0
+ stw %r0, 16(%sp) /* Saves CR. */
+ mfLR %r0
+ stw %r0, 20(%sp) /* Saves LR. */
+ mfCTR %r0
+ stw %r0, 24(%sp) /* Saves CTR. */
+ mfXER %r0
+ stw %r0, 28(%sp) /* Saves XER. */
+ stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
+ stw %r4, 40(%sp)
+ stw %r5, 44(%sp)
+ stw %r6, 48(%sp)
+ stw %r7, 52(%sp)
+ stw %r8, 56(%sp)
+ stw %r9, 60(%sp)
+ stw %r10, 64(%sp)
+ stw %r11, 68(%sp)
+ stw %r12, 72(%sp)
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+
+ /* Reset DIE bit in TSR register.*/
+ lis %r3, 0x0800 /* DIS bit mask. */
+ mtspr 336, %r3 /* TSR register. */
+
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl dbg_check_enter_isr
+ bl dbg_check_lock_from_isr
+#endif
+ bl chSysTimerHandlerI
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl dbg_check_unlock_from_isr
+ bl dbg_check_leave_isr
+#endif
+
+ /* System tick handler invocation.*/
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl dbg_check_lock
+#endif
+ bl chSchIsPreemptionRequired
+ cmpli cr0, %r3, 0
+ beq cr0, .ctxrestore
+ bl chSchDoReschedule
+ b .ctxrestore
+
+ /*
+ * IVOR4 handler (Book-E external interrupt).
+ */
+ .align 4
+ .globl IVOR4
+IVOR4:
+ /* Creation of the external stack frame (extctx structure).*/
+ stwu %sp, -80(%sp) /* Size of the extctx structure.*/
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
+ e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
+ e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
+#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+ stw %r0, 32(%sp) /* Saves GPR0. */
+ mfSRR0 %r0
+ stw %r0, 8(%sp) /* Saves PC. */
+ mfSRR1 %r0
+ stw %r0, 12(%sp) /* Saves MSR. */
+ mfCR %r0
+ stw %r0, 16(%sp) /* Saves CR. */
+ mfLR %r0
+ stw %r0, 20(%sp) /* Saves LR. */
+ mfCTR %r0
+ stw %r0, 24(%sp) /* Saves CTR. */
+ mfXER %r0
+ stw %r0, 28(%sp) /* Saves XER. */
+ stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
+ stw %r4, 40(%sp)
+ stw %r5, 44(%sp)
+ stw %r6, 48(%sp)
+ stw %r7, 52(%sp)
+ stw %r8, 56(%sp)
+ stw %r9, 60(%sp)
+ stw %r10, 64(%sp)
+ stw %r11, 68(%sp)
+ stw %r12, 72(%sp)
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+
+ /* Software vector address from the INTC register.*/
+ lis %r3, INTC_IACKR@h
+ ori %r3, %r3, INTC_IACKR@l /* IACKR register address. */
+ lwz %r3, 0(%r3) /* IACKR register value. */
+ lwz %r3, 0(%r3)
+ mtCTR %r3 /* Software handler address. */
+
+#if PPC_USE_IRQ_PREEMPTION
+ /* Allows preemption while executing the software handler.*/
+ wrteei 1
+#endif
+
+ /* Exectes the software handler.*/
+ bctrl
+
+#if PPC_USE_IRQ_PREEMPTION
+ /* Prevents preemption again.*/
+ wrteei 0
+#endif
+
+ /* Informs the INTC that the interrupt has been served.*/
+ mbar 0
+ lis %r3, INTC_EOIR@h
+ ori %r3, %r3, INTC_EOIR@l
+ stw %r3, 0(%r3) /* Writing any value should do. */
+
+ /* Verifies if a reschedule is required.*/
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl dbg_check_lock
+#endif
+ bl chSchIsPreemptionRequired
+ cmpli cr0, %r3, 0
+ beq cr0, .ctxrestore
+ bl chSchDoReschedule
+
+ /* Context restore.*/
+.ctxrestore:
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl dbg_check_unlock
+#endif
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
+ e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
+ e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
+#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+ lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
+ lwz %r4, 40(%sp)
+ lwz %r5, 44(%sp)
+ lwz %r6, 48(%sp)
+ lwz %r7, 52(%sp)
+ lwz %r8, 56(%sp)
+ lwz %r9, 60(%sp)
+ lwz %r10, 64(%sp)
+ lwz %r11, 68(%sp)
+ lwz %r12, 72(%sp)
+ lwz %r0, 8(%sp)
+ mtSRR0 %r0 /* Restores PC. */
+ lwz %r0, 12(%sp)
+ mtSRR1 %r0 /* Restores MSR. */
+ lwz %r0, 16(%sp)
+ mtCR %r0 /* Restores CR. */
+ lwz %r0, 20(%sp)
+ mtLR %r0 /* Restores LR. */
+ lwz %r0, 24(%sp)
+ mtCTR %r0 /* Restores CTR. */
+ lwz %r0, 28(%sp)
+ mtXER %r0 /* Restores XER. */
+ lwz %r0, 32(%sp) /* Restores GPR0. */
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+ addi %sp, %sp, 80 /* Back to the previous frame. */
+ rfi
+
+#endif /* !defined(__DOXYGEN__) */
+
+/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld b/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld new file mode 100644 index 000000000..c70a20194 --- /dev/null +++ b/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld @@ -0,0 +1,173 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * SPC560P44 memory setup.
+ */
+__irq_stack_size__ = 0x0000; /* Not yet used.*/
+__process_stack_size__ = 0x0800;
+
+MEMORY
+{
+ flash : org = 0x00000000, len = 512k
+ dataflash : org = 0x00800000, len = 64k
+ ram : org = 0x40000000, len = 40k
+}
+
+/*
+ * Derived constants.
+ */
+__flash_size__ = LENGTH(flash);
+__flash_start__ = ORIGIN(flash);
+__flash_end__ = ORIGIN(flash) + LENGTH(flash);
+
+__ram_size__ = LENGTH(ram);
+__ram_start__ = ORIGIN(ram);
+__ram_end__ = ORIGIN(ram) + LENGTH(ram);
+
+SECTIONS
+{
+ . = ORIGIN(flash);
+ .boot : ALIGN(16) SUBALIGN(16)
+ {
+ __ivpr_base__ = .;
+ KEEP(*(.bam))
+ KEEP(*(.crt0))
+ KEEP(*(.handlers))
+ . = ALIGN(0x800);
+ KEEP(*(.vectors))
+ } > flash
+
+ constructors : ALIGN(4) SUBALIGN(4)
+ {
+ PROVIDE(__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE(__init_array_end = .);
+ } > flash
+
+ destructors : ALIGN(4) SUBALIGN(4)
+ {
+ PROVIDE(__fini_array_start = .);
+ KEEP(*(.fini_array))
+ KEEP(*(SORT(.fini_array.*)))
+ PROVIDE(__fini_array_end = .);
+ } > flash
+
+ .text_vle : ALIGN(16) SUBALIGN(16)
+ {
+ *(.text_vle)
+ *(.text_vle.*)
+ *(.gnu.linkonce.t_vle.*)
+ } > flash
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t.*)
+ } > flash
+
+ .rodata : ALIGN(16) SUBALIGN(16)
+ {
+ *(.glue_7t)
+ *(.glue_7)
+ *(.gcc*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.rodata1)
+ } > flash
+
+ .sdata2 : ALIGN(16) SUBALIGN(16)
+ {
+ __sdata2_start__ = . + 0x8000;
+ *(.sdata2)
+ *(.sdata2.*)
+ *(.gnu.linkonce.s2.*)
+ *(.sbss2)
+ *(.sbss2.*)
+ *(.gnu.linkonce.sb2.*)
+ } > flash
+
+ .eh_frame_hdr :
+ {
+ *(.eh_frame_hdr)
+ } > flash
+
+ .eh_frame : ONLY_IF_RO
+ {
+ *(.eh_frame)
+ } > flash
+
+ .romdata : ALIGN(16) SUBALIGN(16)
+ {
+ __romdata_start__ = .;
+ } > flash
+
+ .stacks :
+ {
+ . = ALIGN(8);
+ __irq_stack_base__ = .;
+ . += __irq_stack_size__;
+ . = ALIGN(8);
+ __irq_stack_end__ = .;
+ __process_stack_base__ = .;
+ __main_thread_stack_base__ = .;
+ . += __process_stack_size__;
+ . = ALIGN(8);
+ __process_stack_end__ = .;
+ __main_thread_stack_end__ = .;
+ } > ram
+
+ .data : AT(__romdata_start__)
+ {
+ . = ALIGN(4);
+ __data_start__ = .;
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d.*)
+ __sdata_start__ = . + 0x8000;
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ __data_end__ = .;
+ } > ram
+
+ .sbss :
+ {
+ __bss_start__ = .;
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ } > ram
+
+ .bss :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ __bss_end__ = .;
+ } > ram
+
+ __heap_base__ = __bss_end__;
+ __heap_end__ = __ram_end__;
+}
diff --git a/os/ports/GCC/PPC/SPC560Pxx/port.mk b/os/ports/GCC/PPC/SPC560Pxx/port.mk new file mode 100644 index 000000000..460d4e1f9 --- /dev/null +++ b/os/ports/GCC/PPC/SPC560Pxx/port.mk @@ -0,0 +1,11 @@ +# List of the ChibiOS/RT SPC563Mxx port files.
+PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
+
+PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/vectors.s \
+ ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ivor.s \
+ ${CHIBIOS}/os/ports/GCC/PPC/crt0.s
+
+PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
+ ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx
+
+PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ld
diff --git a/os/ports/GCC/PPC/SPC560Pxx/ppcparams.h b/os/ports/GCC/PPC/SPC560Pxx/ppcparams.h new file mode 100644 index 000000000..1d3d34a45 --- /dev/null +++ b/os/ports/GCC/PPC/SPC560Pxx/ppcparams.h @@ -0,0 +1,57 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC560Pxx/ppcparams.h
+ * @brief PowerPC parameters for the SPC560Pxx.
+ *
+ * @defgroup PPC_SPC560Pxx SPC560Pxx/MPC560x Specific Parameters
+ * @ingroup PPC_SPECIFIC
+ * @details This file contains the PowerPC specific parameters for the
+ * SPC560Pxx/MPC560x platform.
+ * @{
+ */
+
+#ifndef _PPCPARAMS_H_
+#define _PPCPARAMS_H_
+
+/**
+ * @brief PPC core model.
+ */
+#define PPC_VARIANT PPC_VARIANT_e200z0
+
+/**
+ * @brief Book E instruction set support.
+ */
+#define PPC_SUPPORTS_BOOKE FALSE
+
+/**
+ * @brief VLE instruction set support.
+ */
+#define PPC_SUPPORTS_VLE TRUE
+
+/**
+ * @brief Supports VLS Load/Store Multiple Volatile instructions.
+ */
+#define PPC_SUPPORTS_VLE_MULTI TRUE
+
+#endif /* _PPCPARAMS_H_ */
+
+/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Pxx/vectors.s b/os/ports/GCC/PPC/SPC560Pxx/vectors.s new file mode 100644 index 000000000..52b2b1369 --- /dev/null +++ b/os/ports/GCC/PPC/SPC560Pxx/vectors.s @@ -0,0 +1,1109 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC560Pxx/vectors.s
+ * @brief SPC560Pxx vectors table.
+ *
+ * @addtogroup PPC_CORE
+ * @{
+ */
+
+/*
+ * Imports the PPC configuration headers.
+ */
+#define _FROM_ASM_
+#include "chconf.h"
+#include "chcore.h"
+
+#if !defined(__DOXYGEN__)
+
+ /* BAM info, SWT off, WTE off, VLE from settings.*/
+ .section .bam, "ax"
+#if PPC_USE_VLE
+ .long 0x015A0000
+#else
+ .long 0x005A0000
+#endif
+ .long _boot_address
+
+ /* Software vectors table. The vectors are accessed from the IVOR4
+ handler only. In order to declare an interrupt handler just create
+ a function withe the same name of a vector, the symbol will
+ override the weak symbol declared here.*/
+ .section .vectors, "ax"
+ .align 4
+ .globl _vectors
+_vectors:
+ .long vector0
+ .long vector1
+ .long vector2
+ .long vector3
+ .long vector4
+ .long vector5
+ .long vector6
+ .long vector7
+ .long vector8
+ .long vector9
+ .long vector10
+ .long vector11
+ .long vector12
+ .long vector13
+ .long vector14
+ .long vector15
+ .long vector16
+ .long vector17
+ .long vector18
+ .long vector19
+ .long vector20
+ .long vector21
+ .long vector22
+ .long vector23
+ .long vector24
+ .long vector25
+ .long vector26
+ .long vector27
+ .long vector28
+ .long vector29
+ .long vector30
+ .long vector31
+ .long vector32
+ .long vector33
+ .long vector34
+ .long vector35
+ .long vector36
+ .long vector37
+ .long vector38
+ .long vector39
+ .long vector40
+ .long vector41
+ .long vector42
+ .long vector43
+ .long vector44
+ .long vector45
+ .long vector46
+ .long vector47
+ .long vector48
+ .long vector49
+ .long vector50
+ .long vector51
+ .long vector52
+ .long vector53
+ .long vector54
+ .long vector55
+ .long vector56
+ .long vector57
+ .long vector58
+ .long vector59
+ .long vector60
+ .long vector61
+ .long vector62
+ .long vector63
+ .long vector64
+ .long vector65
+ .long vector66
+ .long vector67
+ .long vector68
+ .long vector69
+ .long vector70
+ .long vector71
+ .long vector72
+ .long vector73
+ .long vector74
+ .long vector75
+ .long vector76
+ .long vector77
+ .long vector78
+ .long vector79
+ .long vector80
+ .long vector81
+ .long vector82
+ .long vector83
+ .long vector84
+ .long vector85
+ .long vector86
+ .long vector87
+ .long vector88
+ .long vector89
+ .long vector90
+ .long vector91
+ .long vector92
+ .long vector93
+ .long vector94
+ .long vector95
+ .long vector96
+ .long vector97
+ .long vector98
+ .long vector99
+ .long vector100
+ .long vector101
+ .long vector102
+ .long vector103
+ .long vector104
+ .long vector105
+ .long vector106
+ .long vector107
+ .long vector108
+ .long vector109
+ .long vector110
+ .long vector111
+ .long vector112
+ .long vector113
+ .long vector114
+ .long vector115
+ .long vector116
+ .long vector117
+ .long vector118
+ .long vector119
+ .long vector120
+ .long vector121
+ .long vector122
+ .long vector123
+ .long vector124
+ .long vector125
+ .long vector126
+ .long vector127
+ .long vector128
+ .long vector129
+ .long vector130
+ .long vector131
+ .long vector132
+ .long vector133
+ .long vector134
+ .long vector135
+ .long vector136
+ .long vector137
+ .long vector138
+ .long vector139
+ .long vector140
+ .long vector141
+ .long vector142
+ .long vector143
+ .long vector144
+ .long vector145
+ .long vector146
+ .long vector147
+ .long vector148
+ .long vector149
+ .long vector150
+ .long vector151
+ .long vector152
+ .long vector153
+ .long vector154
+ .long vector155
+ .long vector156
+ .long vector157
+ .long vector158
+ .long vector159
+ .long vector160
+ .long vector161
+ .long vector162
+ .long vector163
+ .long vector164
+ .long vector165
+ .long vector166
+ .long vector167
+ .long vector168
+ .long vector169
+ .long vector170
+ .long vector171
+ .long vector172
+ .long vector173
+ .long vector174
+ .long vector175
+ .long vector176
+ .long vector177
+ .long vector178
+ .long vector179
+ .long vector180
+ .long vector181
+ .long vector182
+ .long vector183
+ .long vector184
+ .long vector185
+ .long vector186
+ .long vector187
+ .long vector188
+ .long vector189
+ .long vector190
+ .long vector191
+ .long vector192
+ .long vector193
+ .long vector194
+ .long vector195
+ .long vector196
+ .long vector197
+ .long vector198
+ .long vector199
+ .long vector200
+ .long vector201
+ .long vector202
+ .long vector203
+ .long vector204
+ .long vector205
+ .long vector206
+ .long vector207
+ .long vector208
+ .long vector209
+ .long vector210
+ .long vector211
+ .long vector212
+ .long vector213
+ .long vector214
+ .long vector215
+ .long vector216
+ .long vector217
+ .long vector218
+ .long vector219
+ .long vector220
+ .long vector221
+ .long vector222
+ .long vector223
+ .long vector224
+ .long vector225
+ .long vector226
+ .long vector227
+ .long vector228
+ .long vector229
+ .long vector230
+ .long vector231
+ .long vector232
+ .long vector233
+ .long vector234
+ .long vector235
+ .long vector236
+ .long vector237
+ .long vector238
+ .long vector239
+ .long vector240
+ .long vector241
+ .long vector242
+ .long vector243
+ .long vector244
+ .long vector245
+ .long vector246
+ .long vector247
+ .long vector248
+ .long vector249
+ .long vector250
+ .long vector251
+ .long vector252
+ .long vector253
+ .long vector254
+ .long vector255
+ .long vector256
+ .long vector257
+ .long vector258
+ .long vector259
+ .long vector260
+
+ .text
+ .align 2
+ .weak vector0
+vector0:
+
+ .weak vector1
+vector1:
+
+ .weak vector2
+vector2:
+
+ .weak vector3
+vector3:
+
+ .weak vector4
+vector4:
+
+ .weak vector5
+vector5:
+
+ .weak vector6
+vector6:
+
+ .weak vector7
+vector7:
+
+ .weak vector8
+vector8:
+
+ .weak vector9
+vector9:
+
+ .weak vector10
+vector10:
+
+ .weak vector11
+vector11:
+
+ .weak vector12
+vector12:
+
+ .weak vector13
+vector13:
+
+ .weak vector14
+vector14:
+
+ .weak vector15
+vector15:
+
+ .weak vector16
+vector16:
+
+ .weak vector17
+vector17:
+
+ .weak vector18
+vector18:
+
+ .weak vector19
+vector19:
+
+ .weak vector20
+vector20:
+
+ .weak vector21
+vector21:
+
+ .weak vector22
+vector22:
+
+ .weak vector23
+vector23:
+
+ .weak vector24
+vector24:
+
+ .weak vector25
+vector25:
+
+ .weak vector26
+vector26:
+
+ .weak vector27
+vector27:
+
+ .weak vector28
+vector28:
+
+ .weak vector29
+vector29:
+
+ .weak vector30
+vector30:
+
+ .weak vector31
+vector31:
+
+ .weak vector32
+vector32:
+
+ .weak vector33
+vector33:
+
+ .weak vector34
+vector34:
+
+ .weak vector35
+vector35:
+
+ .weak vector36
+vector36:
+
+ .weak vector37
+vector37:
+
+ .weak vector38
+vector38:
+
+ .weak vector39
+vector39:
+
+ .weak vector40
+vector40:
+
+ .weak vector41
+vector41:
+
+ .weak vector42
+vector42:
+
+ .weak vector43
+vector43:
+
+ .weak vector44
+vector44:
+
+ .weak vector45
+vector45:
+
+ .weak vector46
+vector46:
+
+ .weak vector47
+vector47:
+
+ .weak vector48
+vector48:
+
+ .weak vector49
+vector49:
+
+ .weak vector50
+vector50:
+
+ .weak vector51
+vector51:
+
+ .weak vector52
+vector52:
+
+ .weak vector53
+vector53:
+
+ .weak vector54
+vector54:
+
+ .weak vector55
+vector55:
+
+ .weak vector56
+vector56:
+
+ .weak vector57
+vector57:
+
+ .weak vector58
+vector58:
+
+ .weak vector59
+vector59:
+
+ .weak vector60
+vector60:
+
+ .weak vector61
+vector61:
+
+ .weak vector62
+vector62:
+
+ .weak vector63
+vector63:
+
+ .weak vector64
+vector64:
+
+ .weak vector65
+vector65:
+
+ .weak vector66
+vector66:
+
+ .weak vector67
+vector67:
+
+ .weak vector68
+vector68:
+
+ .weak vector69
+vector69:
+
+ .weak vector70
+vector70:
+
+ .weak vector71
+vector71:
+
+ .weak vector72
+vector72:
+
+ .weak vector73
+vector73:
+
+ .weak vector74
+vector74:
+
+ .weak vector75
+vector75:
+
+ .weak vector76
+vector76:
+
+ .weak vector77
+vector77:
+
+ .weak vector78
+vector78:
+
+ .weak vector79
+vector79:
+
+ .weak vector80
+vector80:
+
+ .weak vector81
+vector81:
+
+ .weak vector82
+vector82:
+
+ .weak vector83
+vector83:
+
+ .weak vector84
+vector84:
+
+ .weak vector85
+vector85:
+
+ .weak vector86
+vector86:
+
+ .weak vector87
+vector87:
+
+ .weak vector88
+vector88:
+
+ .weak vector89
+vector89:
+
+ .weak vector90
+vector90:
+
+ .weak vector91
+vector91:
+
+ .weak vector92
+vector92:
+
+ .weak vector93
+vector93:
+
+ .weak vector94
+vector94:
+
+ .weak vector95
+vector95:
+
+ .weak vector96
+vector96:
+
+ .weak vector97
+vector97:
+
+ .weak vector98
+vector98:
+
+ .weak vector99
+vector99:
+
+ .weak vector100
+vector100:
+
+ .weak vector101
+vector101:
+
+ .weak vector102
+vector102:
+
+ .weak vector103
+vector103:
+
+ .weak vector104
+vector104:
+
+ .weak vector105
+vector105:
+
+ .weak vector106
+vector106:
+
+ .weak vector107
+vector107:
+
+ .weak vector108
+vector108:
+
+ .weak vector109
+vector109:
+
+ .weak vector110
+vector110:
+
+ .weak vector111
+vector111:
+
+ .weak vector112
+vector112:
+
+ .weak vector113
+vector113:
+
+ .weak vector114
+vector114:
+
+ .weak vector115
+vector115:
+
+ .weak vector116
+vector116:
+
+ .weak vector117
+vector117:
+
+ .weak vector118
+vector118:
+
+ .weak vector119
+vector119:
+
+ .weak vector120
+vector120:
+
+ .weak vector121
+vector121:
+
+ .weak vector122
+vector122:
+
+ .weak vector123
+vector123:
+
+ .weak vector124
+vector124:
+
+ .weak vector125
+vector125:
+
+ .weak vector126
+vector126:
+
+ .weak vector127
+vector127:
+
+ .weak vector128
+vector128:
+
+ .weak vector129
+vector129:
+
+ .weak vector130
+vector130:
+
+ .weak vector131
+vector131:
+
+ .weak vector132
+vector132:
+
+ .weak vector133
+vector133:
+
+ .weak vector134
+vector134:
+
+ .weak vector135
+vector135:
+
+ .weak vector136
+vector136:
+
+ .weak vector137
+vector137:
+
+ .weak vector138
+vector138:
+
+ .weak vector139
+vector139:
+
+ .weak vector140
+vector140:
+
+ .weak vector141
+vector141:
+
+ .weak vector142
+vector142:
+
+ .weak vector143
+vector143:
+
+ .weak vector144
+vector144:
+
+ .weak vector145
+vector145:
+
+ .weak vector146
+vector146:
+
+ .weak vector147
+vector147:
+
+ .weak vector148
+vector148:
+
+ .weak vector149
+vector149:
+
+ .weak vector150
+vector150:
+
+ .weak vector151
+vector151:
+
+ .weak vector152
+vector152:
+
+ .weak vector153
+vector153:
+
+ .weak vector154
+vector154:
+
+ .weak vector155
+vector155:
+
+ .weak vector156
+vector156:
+
+ .weak vector157
+vector157:
+
+ .weak vector158
+vector158:
+
+ .weak vector159
+vector159:
+
+ .weak vector160
+vector160:
+
+ .weak vector161
+vector161:
+
+ .weak vector162
+vector162:
+
+ .weak vector163
+vector163:
+
+ .weak vector164
+vector164:
+
+ .weak vector165
+vector165:
+
+ .weak vector166
+vector166:
+
+ .weak vector167
+vector167:
+
+ .weak vector168
+vector168:
+
+ .weak vector169
+vector169:
+
+ .weak vector170
+vector170:
+
+ .weak vector171
+vector171:
+
+ .weak vector172
+vector172:
+
+ .weak vector173
+vector173:
+
+ .weak vector174
+vector174:
+
+ .weak vector175
+vector175:
+
+ .weak vector176
+vector176:
+
+ .weak vector177
+vector177:
+
+ .weak vector178
+vector178:
+
+ .weak vector179
+vector179:
+
+ .weak vector180
+vector180:
+
+ .weak vector181
+vector181:
+
+ .weak vector182
+vector182:
+
+ .weak vector183
+vector183:
+
+ .weak vector184
+vector184:
+
+ .weak vector185
+vector185:
+
+ .weak vector186
+vector186:
+
+ .weak vector187
+vector187:
+
+ .weak vector188
+vector188:
+
+ .weak vector189
+vector189:
+
+ .weak vector190
+vector190:
+
+ .weak vector191
+vector191:
+
+ .weak vector192
+vector192:
+
+ .weak vector193
+vector193:
+
+ .weak vector194
+vector194:
+
+ .weak vector195
+vector195:
+
+ .weak vector196
+vector196:
+
+ .weak vector197
+vector197:
+
+ .weak vector198
+vector198:
+
+ .weak vector199
+vector199:
+
+ .weak vector200
+vector200:
+
+ .weak vector201
+vector201:
+
+ .weak vector202
+vector202:
+
+ .weak vector203
+vector203:
+
+ .weak vector204
+vector204:
+
+ .weak vector205
+vector205:
+
+ .weak vector206
+vector206:
+
+ .weak vector207
+vector207:
+
+ .weak vector208
+vector208:
+
+ .weak vector209
+vector209:
+
+ .weak vector210
+vector210:
+
+ .weak vector211
+vector211:
+
+ .weak vector212
+vector212:
+
+ .weak vector213
+vector213:
+
+ .weak vector214
+vector214:
+
+ .weak vector215
+vector215:
+
+ .weak vector216
+vector216:
+
+ .weak vector217
+vector217:
+
+ .weak vector218
+vector218:
+
+ .weak vector219
+vector219:
+
+ .weak vector220
+vector220:
+
+ .weak vector221
+vector221:
+
+ .weak vector222
+vector222:
+
+ .weak vector223
+vector223:
+
+ .weak vector224
+vector224:
+
+ .weak vector225
+vector225:
+
+ .weak vector226
+vector226:
+
+ .weak vector227
+vector227:
+
+ .weak vector228
+vector228:
+
+ .weak vector229
+vector229:
+
+ .weak vector230
+vector230:
+
+ .weak vector231
+vector231:
+
+ .weak vector232
+vector232:
+
+ .weak vector233
+vector233:
+
+ .weak vector234
+vector234:
+
+ .weak vector235
+vector235:
+
+ .weak vector236
+vector236:
+
+ .weak vector237
+vector237:
+
+ .weak vector238
+vector238:
+
+ .weak vector239
+vector239:
+
+ .weak vector240
+vector240:
+
+ .weak vector241
+vector241:
+
+ .weak vector242
+vector242:
+
+ .weak vector243
+vector243:
+
+ .weak vector244
+vector244:
+
+ .weak vector245
+vector245:
+
+ .weak vector246
+vector246:
+
+ .weak vector247
+vector247:
+
+ .weak vector248
+vector248:
+
+ .weak vector249
+vector249:
+
+ .weak vector250
+vector250:
+
+ .weak vector251
+vector251:
+
+ .weak vector252
+vector252:
+
+ .weak vector253
+vector253:
+
+ .weak vector254
+vector254:
+
+ .weak vector255
+vector255:
+
+ .weak vector256
+vector256:
+
+ .weak vector257
+vector257:
+
+ .weak vector258
+vector258:
+
+ .weak vector259
+vector259:
+
+ .weak vector260
+vector260:
+
+ .globl _unhandled_irq
+ .type _unhandled_irq, @function
+_unhandled_irq:
+ b _unhandled_irq
+
+#endif /* !defined(__DOXYGEN__) */
+
+/** @} */
diff --git a/os/ports/GCC/PPC/SPC563Mxx/ivor.s b/os/ports/GCC/PPC/SPC563Mxx/ivor.s index de937ef17..19a8efd4e 100644 --- a/os/ports/GCC/PPC/SPC563Mxx/ivor.s +++ b/os/ports/GCC/PPC/SPC563Mxx/ivor.s @@ -20,7 +20,7 @@ /**
* @file SPC563Mxx/ivor.s
- * @brief PowerPC IVORx handlers.
+ * @brief SPC563Mxx IVORx handlers.
*
* @addtogroup PPC_CORE
* @{
@@ -50,6 +50,11 @@ IVOR10:
/* Creation of the external stack frame (extctx structure).*/
stwu %sp, -80(%sp) /* Size of the extctx structure.*/
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
+ e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
+ e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
+#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
stw %r0, 32(%sp) /* Saves GPR0. */
mfSRR0 %r0
stw %r0, 8(%sp) /* Saves PC. */
@@ -73,6 +78,7 @@ IVOR10: stw %r10, 64(%sp)
stw %r11, 68(%sp)
stw %r12, 72(%sp)
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Reset DIE bit in TSR register.*/
lis %r3, 0x0800 /* DIS bit mask. */
@@ -106,6 +112,11 @@ IVOR10: IVOR4:
/* Creation of the external stack frame (extctx structure).*/
stwu %sp, -80(%sp) /* Size of the extctx structure.*/
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
+ e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
+ e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
+#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
stw %r0, 32(%sp) /* Saves GPR0. */
mfSRR0 %r0
stw %r0, 8(%sp) /* Saves PC. */
@@ -129,6 +140,7 @@ IVOR4: stw %r10, 64(%sp)
stw %r11, 68(%sp)
stw %r12, 72(%sp)
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Software vector address from the INTC register.*/
lis %r3, INTC_IACKR@h
@@ -170,6 +182,11 @@ IVOR4: #if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
+ e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
+ e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
+#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
lwz %r4, 40(%sp)
lwz %r5, 44(%sp)
@@ -193,6 +210,7 @@ IVOR4: lwz %r0, 28(%sp)
mtXER %r0 /* Restores XER. */
lwz %r0, 32(%sp) /* Restores GPR0. */
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
addi %sp, %sp, 80 /* Back to the previous frame. */
rfi
diff --git a/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld b/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld index 9ae052e72..0d4475fd7 100644 --- a/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld +++ b/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld @@ -21,9 +21,8 @@ /*
* SPC563M64 memory setup.
*/
-__irq_stack_size__ = 0x0400;
+__irq_stack_size__ = 0x0000; /* Not yet used.*/
__process_stack_size__ = 0x0800;
-__stacks_total_size__ = __irq_stack_size__ + __process_stack_size__;
MEMORY
{
@@ -121,6 +120,21 @@ SECTIONS __romdata_start__ = .;
} > flash
+ .stacks :
+ {
+ . = ALIGN(8);
+ __irq_stack_base__ = .;
+ . += __irq_stack_size__;
+ . = ALIGN(8);
+ __irq_stack_end__ = .;
+ __process_stack_base__ = .;
+ __main_thread_stack_base__ = .;
+ . += __process_stack_size__;
+ . = ALIGN(8);
+ __process_stack_end__ = .;
+ __main_thread_stack_end__ = .;
+ } > ram
+
.data : AT(__romdata_start__)
{
. = ALIGN(4);
@@ -154,5 +168,5 @@ SECTIONS } > ram
__heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__ - __stacks_total_size__;
+ __heap_end__ = __ram_end__;
}
diff --git a/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h b/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h index eaecd2ed7..75823f629 100644 --- a/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h +++ b/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h @@ -47,6 +47,11 @@ */
#define PPC_SUPPORTS_VLE TRUE
+/**
+ * @brief Supports VLS Load/Store Multiple Volatile instructions.
+ */
+#define PPC_SUPPORTS_VLE_MULTI TRUE
+
#endif /* _PPCPARAMS_H_ */
/** @} */
|