diff options
Diffstat (limited to 'os/ports/GCC')
| -rw-r--r-- | os/ports/GCC/PPC/SPC56ELxx/bam.s | 32 | ||||
| -rw-r--r-- | os/ports/GCC/PPC/SPC56ELxx/core.s | 34 |
2 files changed, 34 insertions, 32 deletions
diff --git a/os/ports/GCC/PPC/SPC56ELxx/bam.s b/os/ports/GCC/PPC/SPC56ELxx/bam.s index 9bcb9acf4..bccf5d0c5 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/bam.s +++ b/os/ports/GCC/PPC/SPC56ELxx/bam.s @@ -83,38 +83,6 @@ b .cleareccloop
.cleareccend:
- /* Special function registers clearing, required in order to avoid
- possible problems with lockstep mode.*/
- mtcrf 0xFF, %r31
- mtspr 8, %r31 /* LR */
- mtspr 9, %r31 /* CTR */
-
- mtspr 272, %r31 /* SPRG1-7 */
- mtspr 273, %r31
- mtspr 274, %r31
- mtspr 275, %r31
- mtspr 276, %r31
- mtspr 277, %r31
- mtspr 278, %r31
- mtspr 279, %r31
- mtspr 604, %r31 /* SPRG8-9 */
- mtspr 605, %r31
- mtspr 26, %r31 /* SRR0-1 */
- mtspr 27, %r31
- mtspr 58, %r31 /* CSRR0-1 */
- mtspr 59, %r31
- mtspr 61, %r31 /* DEAR */
- mtspr 22, %r31 /* DEC */
- mtspr 54, %r31 /* DECAR */
- mtspr 285, %r31 /* TBU */
- mtspr 284, %r31 /* TBL */
- mtspr 570, %r31 /* MCSRR0 */
- mtspr 571, %r31 /* MCSRR1 */
- mtspr 256, %r31 /* USPRG0 */
- mtspr 562, %r31 /* DBCNT */
- mtspr 318, %r31 /* DVC1-2 */
- mtspr 319, %r31
-
/* HW configuration.*/
bl _coreinit
diff --git a/os/ports/GCC/PPC/SPC56ELxx/core.s b/os/ports/GCC/PPC/SPC56ELxx/core.s index 3d1bfb021..4d24e7ff9 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/core.s +++ b/os/ports/GCC/PPC/SPC56ELxx/core.s @@ -197,6 +197,40 @@ _unhandled_exception: .globl _coreinit
.type _coreinit, @function
_coreinit:
+ /*
+ * Special function registers clearing, required in order to avoid
+ * possible problems with lockstep mode.
+ */
+ xor %r31, %r31, %r31
+ mtcrf 0xFF, %r31
+ mtspr 8, %r31 /* LR */
+ mtspr 9, %r31 /* CTR */
+ mtspr 22, %r31 /* DEC */
+ mtspr 26, %r31 /* SRR0-1 */
+ mtspr 27, %r31
+ mtspr 54, %r31 /* DECAR */
+ mtspr 58, %r31 /* CSRR0-1 */
+ mtspr 59, %r31
+ mtspr 61, %r31 /* DEAR */
+ mtspr 256, %r31 /* USPRG0 */
+ mtspr 272, %r31 /* SPRG1-7 */
+ mtspr 273, %r31
+ mtspr 274, %r31
+ mtspr 275, %r31
+ mtspr 276, %r31
+ mtspr 277, %r31
+ mtspr 278, %r31
+ mtspr 279, %r31
+ mtspr 285, %r31 /* TBU */
+ mtspr 284, %r31 /* TBL */
+ mtspr 318, %r31 /* DVC1-2 */
+ mtspr 319, %r31
+ mtspr 562, %r31 /* DBCNT */
+ mtspr 570, %r31 /* MCSRR0 */
+ mtspr 571, %r31 /* MCSRR1 */
+ mtspr 604, %r31 /* SPRG8-9 */
+ mtspr 605, %r31
+
/* MSR initialization.*/
lis %r3, MSR_DEFAULT@h
ori %r3, %r3, MSR_DEFAULT@l
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