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-rw-r--r--os/ports/GCC/ARMCM3/chcore.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/os/ports/GCC/ARMCM3/chcore.c b/os/ports/GCC/ARMCM3/chcore.c
index fbf201a56..8f99d3dec 100644
--- a/os/ports/GCC/ARMCM3/chcore.c
+++ b/os/ports/GCC/ARMCM3/chcore.c
@@ -92,22 +92,22 @@ void SVCallVector(Thread *otp, Thread *ntp) {
asm volatile ("mrs r3, BASEPRI \n\t" \
"mrs r12, PSP \n\t" \
"stmdb r12!, {r3-r6,r8-r11, lr} \n\t" \
- "str r12, [r0, #16] \n\t" \
- "ldr r12, [r1, #16] \n\t" \
+ "str r12, [%0, #16] \n\t" \
+ "ldr r12, [%1, #16] \n\t" \
"ldmia r12!, {r3-r6,r8-r11, lr} \n\t" \
"msr PSP, r12 \n\t" \
"msr BASEPRI, r3 \n\t" \
- "bx lr ");
+ "bx lr" : : "r" (otp), "r" (ntp));
#else
asm volatile ("mrs r3, BASEPRI \n\t" \
"mrs r12, PSP \n\t" \
"stmdb r12!, {r3-r11, lr} \n\t" \
- "str r12, [r0, #16] \n\t" \
- "ldr r12, [r1, #16] \n\t" \
+ "str r12, [%0, #16] \n\t" \
+ "ldr r12, [%1, #16] \n\t" \
"ldmia r12!, {r3-r11, lr} \n\t" \
"msr PSP, r12 \n\t" \
"msr BASEPRI, r3 \n\t" \
- "bx lr ");
+ "bx lr" : : "r" (otp), "r" (ntp));
#endif
}