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-rw-r--r--os/halnew/platforms/STM32/SPIv2/spi_lld.c13
-rw-r--r--os/halnew/platforms/STM32/SPIv2/spi_lld.h12
-rw-r--r--os/halnew/platforms/STM32/icu_lld.c67
-rw-r--r--os/halnew/platforms/STM32/pwm_lld.c8
4 files changed, 46 insertions, 54 deletions
diff --git a/os/halnew/platforms/STM32/SPIv2/spi_lld.c b/os/halnew/platforms/STM32/SPIv2/spi_lld.c
index 752c2af66..712d824f6 100644
--- a/os/halnew/platforms/STM32/SPIv2/spi_lld.c
+++ b/os/halnew/platforms/STM32/SPIv2/spi_lld.c
@@ -22,7 +22,6 @@
* @{
*/
-#include "ch.h"
#include "hal.h"
#if HAL_USE_SPI || defined(__DOXYGEN__)
@@ -222,12 +221,12 @@ void spi_lld_start(SPIDriver *spip) {
STM32_SPI_SPI1_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #1", "stream already allocated");
+ osalDbgAssert(!b, "spi_lld_start(), #1", "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI1_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #2", "stream already allocated");
+ osalDbgAssert(!b, "spi_lld_start(), #2", "stream already allocated");
rccEnableSPI1(FALSE);
}
#endif
@@ -238,12 +237,12 @@ void spi_lld_start(SPIDriver *spip) {
STM32_SPI_SPI2_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #3", "stream already allocated");
+ osalDbgAssert(!b, "spi_lld_start(), #3", "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI2_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #4", "stream already allocated");
+ osalDbgAssert(!b, "spi_lld_start(), #4", "stream already allocated");
rccEnableSPI2(FALSE);
}
#endif
@@ -254,12 +253,12 @@ void spi_lld_start(SPIDriver *spip) {
STM32_SPI_SPI3_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #5", "stream already allocated");
+ osalDbgAssert(!b, "spi_lld_start(), #5", "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI3_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #6", "stream already allocated");
+ osalDbgAssert(!b, "spi_lld_start(), #6", "stream already allocated");
rccEnableSPI3(FALSE);
}
#endif
diff --git a/os/halnew/platforms/STM32/SPIv2/spi_lld.h b/os/halnew/platforms/STM32/SPIv2/spi_lld.h
index f4cc67da5..fc2b39fa5 100644
--- a/os/halnew/platforms/STM32/SPIv2/spi_lld.h
+++ b/os/halnew/platforms/STM32/SPIv2/spi_lld.h
@@ -339,19 +339,15 @@ struct SPIDriver{
const SPIConfig *config;
#if SPI_USE_WAIT || defined(__DOXYGEN__)
/**
- * @brief Waiting thread.
+ * @brief Waiting thread.
*/
- Thread *thread;
+ thread_reference_t thread;
#endif /* SPI_USE_WAIT */
#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
-#if CH_USE_MUTEXES || defined(__DOXYGEN__)
/**
- * @brief Mutex protecting the bus.
+ * @brief Mutex protecting the peripheral.
*/
- Mutex mutex;
-#elif CH_USE_SEMAPHORES
- Semaphore semaphore;
-#endif
+ mutex_t mutex;
#endif /* SPI_USE_MUTUAL_EXCLUSION */
#if defined(SPI_DRIVER_EXT_FIELDS)
SPI_DRIVER_EXT_FIELDS
diff --git a/os/halnew/platforms/STM32/icu_lld.c b/os/halnew/platforms/STM32/icu_lld.c
index 2e3c4334b..7941c7a44 100644
--- a/os/halnew/platforms/STM32/icu_lld.c
+++ b/os/halnew/platforms/STM32/icu_lld.c
@@ -26,7 +26,6 @@
* @{
*/
-#include "ch.h"
#include "hal.h"
#if HAL_USE_ICU || defined(__DOXYGEN__)
@@ -145,13 +144,13 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD1);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#if !defined(STM32_TIM1_CC_HANDLER)
@@ -165,13 +164,13 @@ CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD1);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_ICU_USE_TIM1 */
@@ -187,13 +186,13 @@ CH_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM2_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD2);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_ICU_USE_TIM2 */
@@ -209,13 +208,13 @@ CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM3_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD3);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_ICU_USE_TIM3 */
@@ -231,13 +230,13 @@ CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM4_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD4);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_ICU_USE_TIM4 */
@@ -253,13 +252,13 @@ CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM5_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD5);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_ICU_USE_TIM5 */
@@ -275,13 +274,13 @@ CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD8);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#if !defined(STM32_TIM8_CC_HANDLER)
@@ -295,13 +294,13 @@ CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD8);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_ICU_USE_TIM8 */
@@ -317,13 +316,13 @@ CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
*
* @isr
*/
-CH_IRQ_HANDLER(STM32_TIM9_HANDLER) {
+OSAL_IRQ_HANDLER(STM32_TIM9_HANDLER) {
- CH_IRQ_PROLOGUE();
+ OSAL_IRQ_PROLOGUE();
icu_lld_serve_interrupt(&ICUD9);
- CH_IRQ_EPILOGUE();
+ OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_ICU_USE_TIM9 */
@@ -391,9 +390,9 @@ void icu_lld_init(void) {
void icu_lld_start(ICUDriver *icup) {
uint32_t psc;
- chDbgAssert((icup->config->channel == ICU_CHANNEL_1) ||
- (icup->config->channel == ICU_CHANNEL_2),
- "icu_lld_start(), #1", "invalid input");
+ osalDbgAssert((icup->config->channel == ICU_CHANNEL_1) ||
+ (icup->config->channel == ICU_CHANNEL_2),
+ "icu_lld_start(), #1", "invalid input");
if (icup->state == ICU_STOP) {
/* Clock activation and timer reset.*/
@@ -477,9 +476,9 @@ void icu_lld_start(ICUDriver *icup) {
/* Timer configuration.*/
psc = (icup->clock / icup->config->frequency) - 1;
- chDbgAssert((psc <= 0xFFFF) &&
- ((psc + 1) * icup->config->frequency) == icup->clock,
- "icu_lld_start(), #1", "invalid frequency");
+ osalDbgAssert((psc <= 0xFFFF) &&
+ ((psc + 1) * icup->config->frequency) == icup->clock,
+ "icu_lld_start(), #1", "invalid frequency");
icup->tim->PSC = (uint16_t)psc;
icup->tim->ARR = 0xFFFF;
diff --git a/os/halnew/platforms/STM32/pwm_lld.c b/os/halnew/platforms/STM32/pwm_lld.c
index 1e9e0adfb..cd5bb4e57 100644
--- a/os/halnew/platforms/STM32/pwm_lld.c
+++ b/os/halnew/platforms/STM32/pwm_lld.c
@@ -22,7 +22,6 @@
* @{
*/
-#include "ch.h"
#include "hal.h"
#if HAL_USE_PWM || defined(__DOXYGEN__)
@@ -100,10 +99,9 @@ PWMDriver PWMD9;
/*===========================================================================*/
#if STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || STM32_PWM_USE_TIM4 || \
- STM32_PWM_USE_TIM5 || STM32_PWM_USE_TIM8 || STM32_PWM_USE_TIM9 || \
- defined(__DOXYGEN__)
+ STM32_PWM_USE_TIM5 || STM32_PWM_USE_TIM9 || defined(__DOXYGEN__)
/**
- * @brief Common TIM2...TIM5 IRQ handler.
+ * @brief Common TIM2...TIM5,TIM9 IRQ handler.
* @note It is assumed that the various sources are only activated if the
* associated callback pointer is not equal to @p NULL in order to not
* perform an extra check in a potentially critical interrupt handler.
@@ -127,7 +125,7 @@ static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
if ((sr & TIM_SR_UIF) != 0)
pwmp->config->callback(pwmp);
}
-#endif /* STM32_PWM_USE_TIM2 || ... || STM32_PWM_USE_TIM5 */
+#endif
/*===========================================================================*/
/* Driver interrupt handlers. */
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-03 01:16:17 +0000