diff options
Diffstat (limited to 'os/hal')
-rw-r--r-- | os/hal/platforms/STM32/DMAv1/stm32_dma.c | 3 | ||||
-rw-r--r-- | os/hal/platforms/STM32/DMAv1/stm32_dma.h | 1 | ||||
-rw-r--r-- | os/hal/platforms/STM32/DMAv2/stm32_dma.c | 42 | ||||
-rw-r--r-- | os/hal/platforms/STM32/DMAv2/stm32_dma.h | 23 |
4 files changed, 48 insertions, 21 deletions
diff --git a/os/hal/platforms/STM32/DMAv1/stm32_dma.c b/os/hal/platforms/STM32/DMAv1/stm32_dma.c index 1df93bb2f..e24ef565b 100644 --- a/os/hal/platforms/STM32/DMAv1/stm32_dma.c +++ b/os/hal/platforms/STM32/DMAv1/stm32_dma.c @@ -446,7 +446,8 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp, /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp);
dmaStreamClearInterrupt(dmastp);
- dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE;
+ dmastp->channel->CR = STM32_DMA_CR_RESET_VALUE;
+ dmastp->channel->FCR = STM32_DMA_FCR_RESET_VALUE;
/* Enables the associated IRQ vector if a callback is defined.*/
if (func != NULL)
diff --git a/os/hal/platforms/STM32/DMAv1/stm32_dma.h b/os/hal/platforms/STM32/DMAv1/stm32_dma.h index 0247c63cf..473bbe851 100644 --- a/os/hal/platforms/STM32/DMAv1/stm32_dma.h +++ b/os/hal/platforms/STM32/DMAv1/stm32_dma.h @@ -95,6 +95,7 @@ #define STM32_DMA_CR_PL_MASK DMA_CCR1_PL
#define STM32_DMA_CR_PL(n) ((n) << 12)
/** @} */
+
/**
* @name CR register constants only found in enhanced DMA
*/
diff --git a/os/hal/platforms/STM32/DMAv2/stm32_dma.c b/os/hal/platforms/STM32/DMAv2/stm32_dma.c index 5d320dab3..05d6100c0 100644 --- a/os/hal/platforms/STM32/DMAv2/stm32_dma.c +++ b/os/hal/platforms/STM32/DMAv2/stm32_dma.c @@ -54,6 +54,16 @@ */
#define STM32_DMA2_STREAMS_MASK 0x0000FF00
+/**
+ * @brief Post-reset value of the stream CR register.
+ */
+#define STM32_DMA_CR_RESET_VALUE 0x00000000
+
+/**
+ * @brief Post-reset value of the stream FCR register.
+ */
+#define STM32_DMA_FCR_RESET_VALUE 0x00000021
+
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@@ -428,13 +438,15 @@ void dmaInit(void) { /**
* @brief Allocates a DMA stream.
* @details The stream is allocated and, if required, the DMA clock enabled.
- * Trying to allocate a stream already allocated is an illegal
- * operation and is trapped if assertions are enabled.
- * @pre The stream must not be already in use.
+ * The function also enables the IRQ vector associated to the stream
+ * and initializes its priority.
+ * @pre The stream must not be already in use or an error is returned.
* @post The stream is allocated and the default ISR handler redirected
* to the specified function.
- * @post The stream must be freed using @p dmaRelease() before it can
+ * @post The stream ISR vector is enabled and its priority configured.
+ * @post The stream must be freed using @p dmaStreamRelease() before it can
* be reused with another peripheral.
+ * @post The stream is in its post-reset state.
* @note This function can be invoked in both ISR or thread context.
*
* @param[in] dmastp pointer to a stm32_dma_stream_t structure
@@ -446,8 +458,10 @@ void dmaInit(void) { *
* @special
*/
-bool_t dmaAllocate(const stm32_dma_stream_t *dmastp,
- stm32_dmaisr_t func, void *param) {
+bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
+ uint32_t priority,
+ stm32_dmaisr_t func,
+ void *param) {
chDbgCheck(dmastp != NULL, "dmaAllocate");
@@ -470,8 +484,15 @@ bool_t dmaAllocate(const stm32_dma_stream_t *dmastp, RCC->AHB1LPENR |= RCC_AHB1LPENR_DMA2LPEN;
}
- /* Making sure there are no spurious interrupts flags pending.*/
+ /* Putting the stream in a safe state.*/
+ dmaStreamDisable(dmastp);
dmaStreamClearInterrupt(dmastp);
+ dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE;
+
+ /* Enables the associated IRQ vector if a callback is defined.*/
+ if (func != NULL)
+ NVICEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));
+
return FALSE;
}
@@ -480,7 +501,7 @@ bool_t dmaAllocate(const stm32_dma_stream_t *dmastp, * @details The stream is freed and, if required, the DMA clock disabled.
* Trying to release a unallocated stream is an illegal operation
* and is trapped if assertions are enabled.
- * @pre The stream must have been allocated using @p dmaRequest().
+ * @pre The stream must have been allocated using @p dmaStreamAllocate().
* @post The stream is again available.
* @note This function can be invoked in both ISR or thread context.
*
@@ -488,7 +509,7 @@ bool_t dmaAllocate(const stm32_dma_stream_t *dmastp, *
* @special
*/
-void dmaRelease(const stm32_dma_stream_t *dmastp) {
+void dmaStreamRelease(const stm32_dma_stream_t *dmastp) {
chDbgCheck(dmastp != NULL, "dmaRelease");
@@ -496,6 +517,9 @@ void dmaRelease(const stm32_dma_stream_t *dmastp) { chDbgAssert((dma_streams_mask & dmastp->mask) != 0,
"dmaRelease(), #1", "not allocated");
+ /* Disables the associated IRQ vector.*/
+ NVICDisableVector(dmastp->vector);
+
/* Marks the stream as not allocated.*/
dma_streams_mask &= ~(1 << dmastp->selfindex);
diff --git a/os/hal/platforms/STM32/DMAv2/stm32_dma.h b/os/hal/platforms/STM32/DMAv2/stm32_dma.h index 88f594eec..af18497fc 100644 --- a/os/hal/platforms/STM32/DMAv2/stm32_dma.h +++ b/os/hal/platforms/STM32/DMAv2/stm32_dma.h @@ -155,13 +155,12 @@ * @brief STM32 DMA stream descriptor structure.
*/
typedef struct {
- uint32_t selfindex; /**< @brief Index to self in array. */
- DMA_TypeDef *dma; /**< @brief Associated DMA unit. */
- DMA_Stream_TypeDef *stream; /**< @brief Associated DMA stream. */
- volatile uint32_t *isr; /**< @brief Associated xISR reg. */
- volatile uint32_t *ifcr; /**< @brief Associated xIFCR reg. */
- uint32_t ishift; /**< @brief Bits offset in xIFCR
- registers. */
+ DMA_Channel_TypeDef *channel; /**< @brief Associated DMA channel. */
+ volatile uint32_t *ifcr; /**< @brief Associated IFCR reg. */
+ uint8_t ishift; /**< @brief Bits offset in xIFCR
+ register. */
+ uint8_t selfindex; /**< @brief Index to self in array. */
+ uint8_t vector; /**< @brief Associated IRQ vector. */
} stm32_dma_stream_t;
/**
@@ -250,7 +249,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); * @special
*/
#define dmaStreamSetMode(dmastp, mode) { \
- (dmastp)->stream->CR = (uint32_t)(mode2); \
+ (dmastp)->stream->CR = (uint32_t)(mode); \
}
/**
@@ -314,9 +313,11 @@ extern const stm32_dma_stream_t _stm32_dma_streams[STM32_DMA_STREAMS]; extern "C" {
#endif
void dmaInit(void);
- bool_t dmaAllocate(const stm32_dma_stream_t *dmastp,
- stm32_dmaisr_t func, void *param);
- void dmaRelease(const stm32_dma_stream_t *dmastp);
+ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
+ uint32_t priority,
+ stm32_dmaisr_t func,
+ void *param);
+ void dmaStreamRelease(const stm32_dma_stream_t *dmastp);
#ifdef __cplusplus
}
#endif
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