aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal
diff options
context:
space:
mode:
Diffstat (limited to 'os/hal')
-rw-r--r--os/hal/platforms/AT91SAM7/mac_lld.h8
-rw-r--r--os/hal/platforms/AT91SAM7/serial_lld.h8
-rw-r--r--os/hal/platforms/LPC214x/serial_lld.c58
-rw-r--r--os/hal/platforms/LPC214x/serial_lld.h40
-rw-r--r--os/hal/platforms/LPC214x/spi_lld.h11
5 files changed, 57 insertions, 68 deletions
diff --git a/os/hal/platforms/AT91SAM7/mac_lld.h b/os/hal/platforms/AT91SAM7/mac_lld.h
index ea52c4560..88f85adc2 100644
--- a/os/hal/platforms/AT91SAM7/mac_lld.h
+++ b/os/hal/platforms/AT91SAM7/mac_lld.h
@@ -84,28 +84,28 @@
* @brief Number of available transmit buffers.
*/
#if !defined(MAC_TRANSMIT_BUFFERS) || defined(__DOXYGEN__)
-#define MAC_TRANSMIT_BUFFERS 2
+#define MAC_TRANSMIT_BUFFERS 2
#endif
/**
* @brief Number of available receive buffers.
*/
#if !defined(MAC_RECEIVE_BUFFERS) || defined(__DOXYGEN__)
-#define MAC_RECEIVE_BUFFERS 2
+#define MAC_RECEIVE_BUFFERS 2
#endif
/**
* @brief Maximum supported frame size.
*/
#if !defined(MAC_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define MAC_BUFFERS_SIZE 1518
+#define MAC_BUFFERS_SIZE 1518
#endif
/**
* @brief Interrupt priority level for the EMAC device.
*/
#if !defined(EMAC_INTERRUPT_PRIORITY) || defined(__DOXYGEN__)
-#define EMAC_INTERRUPT_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 3)
+#define EMAC_INTERRUPT_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 3)
#endif
/*===========================================================================*/
diff --git a/os/hal/platforms/AT91SAM7/serial_lld.h b/os/hal/platforms/AT91SAM7/serial_lld.h
index b79439c04..3b7b009ab 100644
--- a/os/hal/platforms/AT91SAM7/serial_lld.h
+++ b/os/hal/platforms/AT91SAM7/serial_lld.h
@@ -43,7 +43,7 @@
* @note The default is @p TRUE.
*/
#if !defined(USE_SAM7_USART0) || defined(__DOXYGEN__)
-#define USE_SAM7_USART0 TRUE
+#define USE_SAM7_USART0 TRUE
#endif
/**
@@ -52,21 +52,21 @@
* @note The default is @p TRUE.
*/
#if !defined(USE_SAM7_USART1) || defined(__DOXYGEN__)
-#define USE_SAM7_USART1 TRUE
+#define USE_SAM7_USART1 TRUE
#endif
/**
* @brief UART1 interrupt priority level setting.
*/
#if !defined(SAM7_USART0_PRIORITY) || defined(__DOXYGEN__)
-#define SAM7_USART0_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
+#define SAM7_USART0_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
#endif
/**
* @brief UART2 interrupt priority level setting.
*/
#if !defined(SAM7_USART1_PRIORITY) || defined(__DOXYGEN__)
-#define SAM7_USART1_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
+#define SAM7_USART1_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
#endif
/*===========================================================================*/
diff --git a/os/hal/platforms/LPC214x/serial_lld.c b/os/hal/platforms/LPC214x/serial_lld.c
index 80d828155..ea198fd5c 100644
--- a/os/hal/platforms/LPC214x/serial_lld.c
+++ b/os/hal/platforms/LPC214x/serial_lld.c
@@ -131,8 +131,6 @@ static void serve_interrupt(SerialDriver *sdp) {
UART *u = sdp->sd.uart;
while (TRUE) {
- int i;
-
switch (u->UART_IIR & IIR_SRC_MASK) {
case IIR_SRC_NONE:
return;
@@ -153,32 +151,34 @@ static void serve_interrupt(SerialDriver *sdp) {
}
break;
case IIR_SRC_TX:
-#if UART_FIFO_PRELOAD > 0
- i = UART_FIFO_PRELOAD;
- do {
- msg_t b;
+ {
+#if LPC214x_UART_FIFO_PRELOAD > 0
+ int i = LPC214x_UART_FIFO_PRELOAD;
+ do {
+ msg_t b;
- chSysLockFromIsr();
- b = chOQGetI(&sdp->sd.oqueue);
- chSysUnlockFromIsr();
- if (b < Q_OK) {
- u->UART_IER &= ~IER_THRE;
chSysLockFromIsr();
- chEvtBroadcastI(&sdp->bac.oevent);
+ b = chOQGetI(&sdp->sd.oqueue);
chSysUnlockFromIsr();
- break;
- }
- u->UART_THR = b;
- } while (--i);
+ if (b < Q_OK) {
+ u->UART_IER &= ~IER_THRE;
+ chSysLockFromIsr();
+ chEvtBroadcastI(&sdp->bac.oevent);
+ chSysUnlockFromIsr();
+ break;
+ }
+ u->UART_THR = b;
+ } while (--i);
#else
- chSysLockFromIsr();
- msg_t b = sdRequestDataI(sdp);
- chSysUnlockFromIsr();
- if (b < Q_OK)
- u->UART_IER &= ~IER_THRE;
- else
- u->UART_THR = b;
+ chSysLockFromIsr();
+ msg_t b = sdRequestDataI(sdp);
+ chSysUnlockFromIsr();
+ if (b < Q_OK)
+ u->UART_IER &= ~IER_THRE;
+ else
+ u->UART_THR = b;
#endif
+ }
break;
default:
(void) u->UART_THR;
@@ -187,12 +187,12 @@ static void serve_interrupt(SerialDriver *sdp) {
}
}
-#if UART_FIFO_PRELOAD > 0
+#if LPC214x_UART_FIFO_PRELOAD > 0
static void preload(SerialDriver *sdp) {
UART *u = sdp->sd.uart;
if (u->UART_LSR & LSR_THRE) {
- int i = UART_FIFO_PRELOAD;
+ int i = LPC214x_UART_FIFO_PRELOAD;
do {
chSysLockFromIsr();
msg_t b = chOQGetI(&sdp->sd.oqueue);
@@ -212,7 +212,7 @@ static void preload(SerialDriver *sdp) {
#if USE_LPC214x_UART0 || defined(__DOXYGEN__)
static void notify1(void) {
-#if UART_FIFO_PRELOAD > 0
+#if LPC214x_UART_FIFO_PRELOAD > 0
preload(&SD1);
#else
@@ -220,7 +220,7 @@ static void notify1(void) {
if (u->UART_LSR & LSR_THRE) {
chSysLockFromIsr();
- u->UART_THR = chOQGetI(&SD1.sd_oqueue);
+ u->UART_THR = chOQGetI(&SD1.sd.oqueue);
chSysUnlockFromIsr();
}
u->UART_IER |= IER_THRE;
@@ -230,14 +230,14 @@ static void notify1(void) {
#if USE_LPC214x_UART1 || defined(__DOXYGEN__)
static void notify2(void) {
-#if UART_FIFO_PRELOAD > 0
+#if LPC214x_UART_FIFO_PRELOAD > 0
preload(&SD2);
#else
UART *u = U1Base;
if (u->UART_LSR & LSR_THRE)
- u->UART_THR = chOQGetI(&SD2.sd_oqueue);
+ u->UART_THR = chOQGetI(&SD2.sd.oqueue);
u->UART_IER |= IER_THRE;
#endif
}
diff --git a/os/hal/platforms/LPC214x/serial_lld.h b/os/hal/platforms/LPC214x/serial_lld.h
index e8371104a..034a707fb 100644
--- a/os/hal/platforms/LPC214x/serial_lld.h
+++ b/os/hal/platforms/LPC214x/serial_lld.h
@@ -38,28 +38,12 @@
/*===========================================================================*/
/**
- * @brief FIFO preload parameter.
- * @details Configuration parameter, this values defines how many bytes are
- * preloaded in the HW transmit FIFO for each interrupt, the maximum value is
- * 16 the minimum is 2, the value 0 disables the feature.
- * @note An high value reduces the number of interrupts generated but can
- * also increase the worst case interrupt response time because the
- * preload loops.
- * @note The value zero disables the feature and reverts to a simpler code
- * that will generate an interrupt for each output byte but is much
- * smaller and simpler.
- */
-#if !defined(UART_FIFO_PRELOAD) || defined(__DOXYGEN__)
-#define UART_FIFO_PRELOAD 16
-#endif
-
-/**
* @brief UART0 driver enable switch.
* @details If set to @p TRUE the support for USART1 is included.
* @note The default is @p TRUE .
*/
#if !defined(USE_LPC214x_UART0) || defined(__DOXYGEN__)
-#define USE_LPC214x_UART0 TRUE
+#define USE_LPC214x_UART0 TRUE
#endif
/**
@@ -68,21 +52,37 @@
* @note The default is @p TRUE.
*/
#if !defined(USE_LPC214x_UART1) || defined(__DOXYGEN__)
-#define USE_LPC214x_UART1 TRUE
+#define USE_LPC214x_UART1 TRUE
+#endif
+
+/**
+ * @brief FIFO preload parameter.
+ * @details Configuration parameter, this values defines how many bytes are
+ * preloaded in the HW transmit FIFO for each interrupt, the maximum value is
+ * 16 the minimum is 2, the value 0 disables the feature.
+ * @note An high value reduces the number of interrupts generated but can
+ * also increase the worst case interrupt response time because the
+ * preload loops.
+ * @note The value zero disables the feature and reverts to a simpler code
+ * that will generate an interrupt for each output byte but is much
+ * smaller and simpler.
+ */
+#if !defined(UART_FIFO_PRELOAD) || defined(__DOXYGEN__)
+#define LPC214x_UART_FIFO_PRELOAD 16
#endif
/**
* @brief UART1 interrupt priority level setting.
*/
#if !defined(LPC214x_UART1_PRIORITY) || defined(__DOXYGEN__)
-#define LPC214x_UART1_PRIORITY 1
+#define LPC214x_UART1_PRIORITY 1
#endif
/**
* @brief UART2 interrupt priority level setting.
*/
#if !defined(LPC214x_UART2_PRIORITY) || defined(__DOXYGEN__)
-#define LPC214x_UART2_PRIORITY 2
+#define LPC214x_UART2_PRIORITY 2
#endif
/*===========================================================================*/
diff --git a/os/hal/platforms/LPC214x/spi_lld.h b/os/hal/platforms/LPC214x/spi_lld.h
index 6f3527171..c1fec8e02 100644
--- a/os/hal/platforms/LPC214x/spi_lld.h
+++ b/os/hal/platforms/LPC214x/spi_lld.h
@@ -38,13 +38,6 @@
/*===========================================================================*/
/**
- * @brief Enables the mutual exclusion APIs on the SPI bus.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION TRUE
-#endif
-
-/**
* @brief SPI1 (SSP) driver enable switch.
* @details If set to @p TRUE the support for SPI0 is included.
* @note The default is @p TRUE.
@@ -57,10 +50,6 @@
/* Derived constants and error checks. */
/*===========================================================================*/
-#if SPI_USE_MUTUAL_EXCLUSION && !CH_USE_MUTEXES && !CH_USE_SEMAPHORES
-#error "SPI_USE_MUTUAL_EXCLUSION requires CH_USE_MUTEXES and/or CH_USE_SEMAPHORES"
-#endif
-
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-14 03:42:14 +0000