diff options
Diffstat (limited to 'os/hal')
22 files changed, 926 insertions, 1672 deletions
diff --git a/os/hal/ports/STM32/STM32F37x/stm32_isr.c b/os/hal/ports/STM32/STM32F37x/stm32_isr.c index cd794e494..bfb969ce0 100644 --- a/os/hal/ports/STM32/STM32F37x/stm32_isr.c +++ b/os/hal/ports/STM32/STM32F37x/stm32_isr.c @@ -52,6 +52,7 @@ /*===========================================================================*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
+#if !defined(STM32_DISABLE_EXTI0_HANDLER)
/**
* @brief EXTI[0] interrupt handler.
*
@@ -70,7 +71,9 @@ OSAL_IRQ_HANDLER(Vector58) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI1_HANDLER)
/**
* @brief EXTI[1] interrupt handler.
*
@@ -89,7 +92,9 @@ OSAL_IRQ_HANDLER(Vector5C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI2_HANDLER)
/**
* @brief EXTI[2] interrupt handler.
*
@@ -108,7 +113,9 @@ OSAL_IRQ_HANDLER(Vector60) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI3_HANDLER)
/**
* @brief EXTI[3] interrupt handler.
*
@@ -127,7 +134,9 @@ OSAL_IRQ_HANDLER(Vector64) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI4_HANDLER)
/**
* @brief EXTI[4] interrupt handler.
*
@@ -146,7 +155,9 @@ OSAL_IRQ_HANDLER(Vector68) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
/**
* @brief EXTI[5]...EXTI[9] interrupt handler.
*
@@ -170,7 +181,9 @@ OSAL_IRQ_HANDLER(Vector9C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
/**
* @brief EXTI[10]...EXTI[15] interrupt handler.
*
@@ -195,6 +208,7 @@ OSAL_IRQ_HANDLER(VectorE0) { OSAL_IRQ_EPILOGUE();
}
+#endif
#endif /* HAL_USE_PAL */
diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_isr.c b/os/hal/ports/STM32/STM32F3xx/stm32_isr.c index 5220ca9f2..bfb969ce0 100644 --- a/os/hal/ports/STM32/STM32F3xx/stm32_isr.c +++ b/os/hal/ports/STM32/STM32F3xx/stm32_isr.c @@ -40,27 +40,19 @@ /* Driver local functions. */
/*===========================================================================*/
-#if HAL_USE_EXT
-#define exti_serve_irq(pr, channel) { \
- \
- if ((pr) & (1U << (channel))) { \
- EXTD1.config->channels[channel].cb(&EXTD1, channel); \
- } \
-}
-#elif HAL_USE_PAL
#define exti_serve_irq(pr, channel) { \
\
if ((pr) & (1U << (channel))) { \
_pal_isr_code(channel); \
} \
}
-#endif
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
-#if HAL_USE_PAL || HAL_USE_EXT || defined(__DOXYGEN__)
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+#if !defined(STM32_DISABLE_EXTI0_HANDLER)
/**
* @brief EXTI[0] interrupt handler.
*
@@ -79,7 +71,9 @@ OSAL_IRQ_HANDLER(Vector58) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI1_HANDLER)
/**
* @brief EXTI[1] interrupt handler.
*
@@ -98,7 +92,9 @@ OSAL_IRQ_HANDLER(Vector5C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI2_HANDLER)
/**
* @brief EXTI[2] interrupt handler.
*
@@ -117,7 +113,9 @@ OSAL_IRQ_HANDLER(Vector60) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI3_HANDLER)
/**
* @brief EXTI[3] interrupt handler.
*
@@ -136,7 +134,9 @@ OSAL_IRQ_HANDLER(Vector64) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI4_HANDLER)
/**
* @brief EXTI[4] interrupt handler.
*
@@ -155,7 +155,9 @@ OSAL_IRQ_HANDLER(Vector68) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
/**
* @brief EXTI[5]...EXTI[9] interrupt handler.
*
@@ -179,7 +181,9 @@ OSAL_IRQ_HANDLER(Vector9C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
/**
* @brief EXTI[10]...EXTI[15] interrupt handler.
*
@@ -204,189 +208,9 @@ OSAL_IRQ_HANDLER(VectorE0) { OSAL_IRQ_EPILOGUE();
}
-
-#if HAL_USE_EXT || defined(__DOXYGEN__)
-#if !defined(STM32_DISABLE_EXTI16_HANDLER)
-/**
- * @brief EXTI[16] interrupt handler (PVD).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector44) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 16);
- EXTI->PR = pr;
- if (pr & (1U << 16))
- EXTD1.config->channels[16].cb(&EXTD1, 16);
-
- OSAL_IRQ_EPILOGUE();
-}
#endif
-#if !defined(STM32_DISABLE_EXTI17_HANDLER)
-/**
- * @brief EXTI[17] interrupt handler (RTC Alarm).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE4) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 17);
- EXTI->PR = pr;
- if (pr & (1U << 17))
- EXTD1.config->channels[17].cb(&EXTD1, 17);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI18_HANDLER) && STM32_HAS_USB
-/**
- * @brief EXTI[18] interrupt handler (USB Wakeup).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE8) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 18);
- EXTI->PR = pr;
- if (pr & (1U << 18))
- EXTD1.config->channels[18].cb(&EXTD1, 18);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI19_HANDLER)
-/**
- * @brief EXTI[19] interrupt handler (Tamper TimeStamp).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector48) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 19);
- EXTI->PR = pr;
- if (pr & (1U << 19))
- EXTD1.config->channels[19].cb(&EXTD1, 19);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI20_HANDLER)
-/**
- * @brief EXTI[20] interrupt handler (RTC Wakeup).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector4C) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 20);
- EXTI->PR = pr;
- if (pr & (1U << 20))
- EXTD1.config->channels[20].cb(&EXTD1, 20);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI21_22_29_HANDLER)
-/**
- * @brief EXTI[21],EXTI[22],EXTI[29] interrupt handler (COMP1, COMP2, COMP3).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector140) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 21) | (1U << 22) | (1U << 29));
- EXTI->PR = pr;
- if (pr & (1U << 21))
- EXTD1.config->channels[21].cb(&EXTD1, 21);
- if (pr & (1U << 22))
- EXTD1.config->channels[22].cb(&EXTD1, 22);
- if (pr & (1U << 29))
- EXTD1.config->channels[29].cb(&EXTD1, 29);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI30_32_HANDLER)
-/**
- * @brief EXTI[30]...EXTI[32] interrupt handler (COMP4, COMP5, COMP6).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector144) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 30) | (1U << 31));
- EXTI->PR = pr;
- if (pr & (1U << 30))
- EXTD1.config->channels[30].cb(&EXTD1, 30);
- if (pr & (1U << 31))
- EXTD1.config->channels[31].cb(&EXTD1, 31);
-
- pr = EXTI->PR2 & EXTI->IMR2 & (1U << 0);
- EXTI->PR2 = pr;
- if (pr & (1U << 0))
- EXTD1.config->channels[32].cb(&EXTD1, 32);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI33_HANDLER)
-/**
- * @brief EXTI[33] interrupt handler (COMP7).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector148) {
- uint32_t pr2;
-
- OSAL_IRQ_PROLOGUE();
-
- pr2 = EXTI->PR2;
- pr2 = EXTI->IMR & (1U << 1);
- EXTI->PR2 = pr2;
- if (pr2 & (1U << 1))
- EXTD1.config->channels[33].cb(&EXTD1, 33);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-#endif /* HAL_USE_EXT */
-
-#endif /* HAL_USE_PAL || HAL_USE_EXT */
+#endif /* HAL_USE_PAL */
/*===========================================================================*/
/* Driver exported functions. */
@@ -399,7 +223,7 @@ OSAL_IRQ_HANDLER(Vector148) { */
void irqInit(void) {
-#if HAL_USE_PAL || HAL_USE_EXT
+#if HAL_USE_PAL
nvicEnableVector(EXTI0_IRQn, STM32_IRQ_EXTI0_PRIORITY);
nvicEnableVector(EXTI1_IRQn, STM32_IRQ_EXTI1_PRIORITY);
nvicEnableVector(EXTI2_TSC_IRQn, STM32_IRQ_EXTI2_PRIORITY);
@@ -407,13 +231,6 @@ void irqInit(void) { nvicEnableVector(EXTI4_IRQn, STM32_IRQ_EXTI4_PRIORITY);
nvicEnableVector(EXTI9_5_IRQn, STM32_IRQ_EXTI5_9_PRIORITY);
nvicEnableVector(EXTI15_10_IRQn, STM32_IRQ_EXTI10_15_PRIORITY);
-#if HAL_USE_EXT
- nvicEnableVector(PVD_PVM_IRQn, STM32_IRQ_EXTI1635_38_PRIORITY);
- nvicEnableVector(RTC_Alarm_IRQn, STM32_IRQ_EXTI18_PRIORITY);
- nvicEnableVector(TAMP_STAMP_IRQn, STM32_IRQ_EXTI19_PRIORITY);
- nvicEnableVector(RTC_WKUP_IRQn, STM32_IRQ_EXTI20_PRIORITY);
- nvicEnableVector(COMP_IRQn, STM32_IRQ_EXTI21_22_PRIORITY);
-#endif
#endif
}
@@ -424,7 +241,7 @@ void irqInit(void) { */
void irqDeinit(void) {
-#if HAL_USE_PAL || HAL_USE_EXT
+#if HAL_USE_PAL
nvicDisableVector(EXTI0_IRQn);
nvicDisableVector(EXTI1_IRQn);
nvicDisableVector(EXTI2_TSC_IRQn);
@@ -432,20 +249,6 @@ void irqDeinit(void) { nvicDisableVector(EXTI4_IRQn);
nvicDisableVector(EXTI9_5_IRQn);
nvicDisableVector(EXTI15_10_IRQn);
-#if HAL_USE_EXT
- nvicEnableVector(PVD_IRQn, STM32_IRQ_EXTI16_PRIORITY);
- nvicEnableVector(RTC_Alarm_IRQn, STM32_IRQ_EXTI17_PRIORITY);
-#if STM32_HAS_USB
- nvicEnableVector(USBWakeUp_IRQn, STM32_IRQ_EXTI18_PRIORITY);
-#endif
- nvicEnableVector(TAMP_STAMP_IRQn, STM32_IRQ_EXTI19_PRIORITY);
- nvicEnableVector(RTC_WKUP_IRQn, STM32_IRQ_EXTI20_PRIORITY);
- nvicEnableVector(COMP1_2_3_IRQn, STM32_IRQ_EXTI21_22_29_PRIORITY);
- nvicEnableVector(COMP4_5_6_IRQn, STM32_IRQ_EXTI30_32_PRIORITY);
-#if STM32_EXTI_NUM_LINES >= 34
- nvicEnableVector(COMP7_IRQn, STM32_IRQ_EXTI33_PRIORITY);
-#endif
-#endif
#endif
}
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_isr.c b/os/hal/ports/STM32/STM32F4xx/stm32_isr.c index 7f70e02a7..9ee6ea16e 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_isr.c +++ b/os/hal/ports/STM32/STM32F4xx/stm32_isr.c @@ -52,6 +52,7 @@ /*===========================================================================*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
+#if !defined(STM32_DISABLE_EXTI0_HANDLER)
/**
* @brief EXTI[0] interrupt handler.
*
@@ -70,7 +71,9 @@ OSAL_IRQ_HANDLER(Vector58) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI1_HANDLER)
/**
* @brief EXTI[1] interrupt handler.
*
@@ -89,7 +92,9 @@ OSAL_IRQ_HANDLER(Vector5C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI2_HANDLER)
/**
* @brief EXTI[2] interrupt handler.
*
@@ -108,7 +113,9 @@ OSAL_IRQ_HANDLER(Vector60) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI3_HANDLER)
/**
* @brief EXTI[3] interrupt handler.
*
@@ -127,7 +134,9 @@ OSAL_IRQ_HANDLER(Vector64) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI4_HANDLER)
/**
* @brief EXTI[4] interrupt handler.
*
@@ -146,7 +155,9 @@ OSAL_IRQ_HANDLER(Vector68) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
/**
* @brief EXTI[5]...EXTI[9] interrupt handler.
*
@@ -170,7 +181,9 @@ OSAL_IRQ_HANDLER(Vector9C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
/**
* @brief EXTI[10]...EXTI[15] interrupt handler.
*
@@ -195,6 +208,7 @@ OSAL_IRQ_HANDLER(VectorE0) { OSAL_IRQ_EPILOGUE();
}
+#endif
#endif /* HAL_USE_PAL */
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_ext_lld_isr.c b/os/hal/ports/STM32/STM32F7xx/hal_ext_lld_isr.c deleted file mode 100644 index 4e108384f..000000000 --- a/os/hal/ports/STM32/STM32F7xx/hal_ext_lld_isr.c +++ /dev/null @@ -1,391 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file STM32F7xx/hal_ext_lld_isr.c
- * @brief STM32F7xx EXT subsystem low level driver ISR code.
- *
- * @addtogroup EXT
- * @{
- */
-
-#include "hal.h"
-
-#if HAL_USE_EXT || defined(__DOXYGEN__)
-
-#include "hal_ext_lld_isr.h"
-
-/*===========================================================================*/
-/* Driver local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/**
- * @brief EXTI[0] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector58) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 0);
- EXTI->PR = pr;
- if (pr & (1U << 0))
- EXTD1.config->channels[0].cb(&EXTD1, 0);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[1] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector5C) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 1);
- EXTI->PR = pr;
- if (pr & (1U << 1))
- EXTD1.config->channels[1].cb(&EXTD1, 1);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[2] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector60) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 2);
- EXTI->PR = pr;
- if (pr & (1U << 2))
- EXTD1.config->channels[2].cb(&EXTD1, 2);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[3] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector64) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 3);
- EXTI->PR = pr;
- if (pr & (1U << 3))
- EXTD1.config->channels[3].cb(&EXTD1, 3);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[4] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector68) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 4);
- EXTI->PR = pr;
- if (pr & (1U << 4))
- EXTD1.config->channels[4].cb(&EXTD1, 4);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[5]...EXTI[9] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector9C) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) |
- (1U << 9));
- EXTI->PR = pr;
- if (pr & (1U << 5))
- EXTD1.config->channels[5].cb(&EXTD1, 5);
- if (pr & (1U << 6))
- EXTD1.config->channels[6].cb(&EXTD1, 6);
- if (pr & (1U << 7))
- EXTD1.config->channels[7].cb(&EXTD1, 7);
- if (pr & (1U << 8))
- EXTD1.config->channels[8].cb(&EXTD1, 8);
- if (pr & (1U << 9))
- EXTD1.config->channels[9].cb(&EXTD1, 9);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[10]...EXTI[15] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE0) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) |
- (1U << 14) | (1U << 15));
- EXTI->PR = pr;
- if (pr & (1U << 10))
- EXTD1.config->channels[10].cb(&EXTD1, 10);
- if (pr & (1U << 11))
- EXTD1.config->channels[11].cb(&EXTD1, 11);
- if (pr & (1U << 12))
- EXTD1.config->channels[12].cb(&EXTD1, 12);
- if (pr & (1U << 13))
- EXTD1.config->channels[13].cb(&EXTD1, 13);
- if (pr & (1U << 14))
- EXTD1.config->channels[14].cb(&EXTD1, 14);
- if (pr & (1U << 15))
- EXTD1.config->channels[15].cb(&EXTD1, 15);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[16] interrupt handler (PVD).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector44) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 16);
- EXTI->PR = pr;
- if (pr & (1U << 16))
- EXTD1.config->channels[16].cb(&EXTD1, 16);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[17] interrupt handler (RTC_ALARM).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE4) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 17);
- EXTI->PR = pr;
- if (pr & (1U << 17))
- EXTD1.config->channels[17].cb(&EXTD1, 17);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[18] interrupt handler (OTG_FS_WKUP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE8) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 18);
- EXTI->PR = pr;
- if (pr & (1U << 18))
- EXTD1.config->channels[18].cb(&EXTD1, 18);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[19] interrupt handler (ETH_WKUP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector138) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 19);
- EXTI->PR = pr;
- if (pr & (1U << 19))
- EXTD1.config->channels[19].cb(&EXTD1, 19);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[20] interrupt handler (OTG_HS_WKUP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector170) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 20);
- EXTI->PR = pr;
- if (pr & (1U << 20))
- EXTD1.config->channels[20].cb(&EXTD1, 20);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[21] interrupt handler (TAMPER_STAMP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector48) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 21);
- EXTI->PR = pr;
- if (pr & (1U << 21))
- EXTD1.config->channels[21].cb(&EXTD1, 21);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[22] interrupt handler (RTC_WKUP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector4C) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 22);
- EXTI->PR = pr;
- if (pr & (1U << 22))
- EXTD1.config->channels[22].cb(&EXTD1, 22);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Enables EXTI IRQ sources.
- *
- * @notapi
- */
-void ext_lld_exti_irq_enable(void) {
-
- nvicEnableVector(EXTI0_IRQn, STM32_EXT_EXTI0_IRQ_PRIORITY);
- nvicEnableVector(EXTI1_IRQn, STM32_EXT_EXTI1_IRQ_PRIORITY);
- nvicEnableVector(EXTI2_IRQn, STM32_EXT_EXTI2_IRQ_PRIORITY);
- nvicEnableVector(EXTI3_IRQn, STM32_EXT_EXTI3_IRQ_PRIORITY);
- nvicEnableVector(EXTI4_IRQn, STM32_EXT_EXTI4_IRQ_PRIORITY);
- nvicEnableVector(EXTI9_5_IRQn, STM32_EXT_EXTI5_9_IRQ_PRIORITY);
- nvicEnableVector(EXTI15_10_IRQn, STM32_EXT_EXTI10_15_IRQ_PRIORITY);
- nvicEnableVector(PVD_IRQn, STM32_EXT_EXTI16_IRQ_PRIORITY);
- nvicEnableVector(RTC_Alarm_IRQn, STM32_EXT_EXTI17_IRQ_PRIORITY);
- nvicEnableVector(OTG_FS_WKUP_IRQn, STM32_EXT_EXTI18_IRQ_PRIORITY);
- nvicEnableVector(ETH_WKUP_IRQn, STM32_EXT_EXTI19_IRQ_PRIORITY);
- nvicEnableVector(OTG_HS_WKUP_IRQn, STM32_EXT_EXTI20_IRQ_PRIORITY);
- nvicEnableVector(TAMP_STAMP_IRQn, STM32_EXT_EXTI21_IRQ_PRIORITY);
- nvicEnableVector(RTC_WKUP_IRQn, STM32_EXT_EXTI22_IRQ_PRIORITY);
- nvicEnableVector(LPTIM1_IRQn, STM32_EXT_EXTI23_IRQ_PRIORITY);
-}
-
-/**
- * @brief Disables EXTI IRQ sources.
- *
- * @notapi
- */
-void ext_lld_exti_irq_disable(void) {
-
- nvicDisableVector(EXTI0_IRQn);
- nvicDisableVector(EXTI1_IRQn);
- nvicDisableVector(EXTI2_IRQn);
- nvicDisableVector(EXTI3_IRQn);
- nvicDisableVector(EXTI4_IRQn);
- nvicDisableVector(EXTI9_5_IRQn);
- nvicDisableVector(EXTI15_10_IRQn);
- nvicDisableVector(PVD_IRQn);
- nvicDisableVector(RTC_Alarm_IRQn);
- nvicDisableVector(OTG_FS_WKUP_IRQn);
- nvicDisableVector(ETH_WKUP_IRQn);
- nvicDisableVector(OTG_HS_WKUP_IRQn);
- nvicDisableVector(TAMP_STAMP_IRQn);
- nvicDisableVector(RTC_WKUP_IRQn);
- nvicDisableVector(LPTIM1_IRQn);
-}
-
-#endif /* HAL_USE_EXT */
-
-/** @} */
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c index 09bb780a6..8f5645b88 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c @@ -123,10 +123,14 @@ void hal_lld_init(void) { /* Initializes the backup domain.*/
hal_lld_backup_domain_init();
+ /* DMA subsystems initialization.*/
#if defined(STM32_DMA_REQUIRED)
dmaInit();
#endif
+ /* IRQ subsystem initialization.*/
+ irqInit();
+
#if STM32_SRAM2_NOCACHE
/* The SRAM2 bank can optionally made a non cache-able area for use by
DMA engines.*/
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.h b/os/hal/ports/STM32/STM32F7xx/hal_lld.h index 904617a64..812000adf 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.h @@ -2037,6 +2037,7 @@ /* Various helpers.*/
#include "nvic.h"
#include "mpu.h"
+#include "stm32_isr.h"
#include "stm32_dma.h"
#include "stm32_rcc.h"
diff --git a/os/hal/ports/STM32/STM32F7xx/platform.mk b/os/hal/ports/STM32/STM32F7xx/platform.mk index c1cffcbbf..542099329 100644 --- a/os/hal/ports/STM32/STM32F7xx/platform.mk +++ b/os/hal/ports/STM32/STM32F7xx/platform.mk @@ -1,5 +1,6 @@ # Required platform files.
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
+ $(CHIBIOS)/os/hal/ports/STM32/STM32F7xx/stm32_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32F7xx/hal_lld.c
# Required include directories.
@@ -16,11 +17,7 @@ endif HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h | egrep -e "\#define"))
-ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
-PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F7xx/hal_ext_lld_isr.c
-endif
else
-PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F7xx/hal_ext_lld_isr.c
endif
# Drivers compatible with the platform.
diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_isr.c b/os/hal/ports/STM32/STM32F7xx/stm32_isr.c new file mode 100644 index 000000000..447d389db --- /dev/null +++ b/os/hal/ports/STM32/STM32F7xx/stm32_isr.c @@ -0,0 +1,255 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file STM32F7xx/stm32_isr.h
+ * @brief STM32F7xx ISR handler code.
+ *
+ * @addtogroup SRM32F7xx_ISR
+ * @{
+ */
+
+#include "hal.h"
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+#define exti_serve_irq(pr, channel) { \
+ \
+ if ((pr) & (1U << (channel))) { \
+ _pal_isr_code(channel); \
+ } \
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+#if !defined(STM32_DISABLE_EXTI0_HANDLER)
+/**
+ * @brief EXTI[0] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector58) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 0);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 0);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI1_HANDLER)
+/**
+ * @brief EXTI[1] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector5C) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 1);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 1);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI2_HANDLER)
+/**
+ * @brief EXTI[2] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector60) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 2);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 2);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI3_HANDLER)
+/**
+ * @brief EXTI[3] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector64) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 3);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 3);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI4_HANDLER)
+/**
+ * @brief EXTI[4] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector68) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 4);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 4);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
+/**
+ * @brief EXTI[5]...EXTI[9] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector9C) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & ((1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) |
+ (1U << 9));
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 5);
+ exti_serve_irq(pr, 6);
+ exti_serve_irq(pr, 7);
+ exti_serve_irq(pr, 8);
+ exti_serve_irq(pr, 9);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
+/**
+ * @brief EXTI[10]...EXTI[15] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(VectorE0) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & ((1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) |
+ (1U << 14) | (1U << 15));
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 10);
+ exti_serve_irq(pr, 11);
+ exti_serve_irq(pr, 12);
+ exti_serve_irq(pr, 13);
+ exti_serve_irq(pr, 14);
+ exti_serve_irq(pr, 15);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#endif /* HAL_USE_PAL */
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables IRQ sources.
+ *
+ * @notapi
+ */
+void irqInit(void) {
+
+#if HAL_USE_PAL
+ nvicEnableVector(EXTI0_IRQn, STM32_IRQ_EXTI0_PRIORITY);
+ nvicEnableVector(EXTI1_IRQn, STM32_IRQ_EXTI1_PRIORITY);
+ nvicEnableVector(EXTI2_IRQn, STM32_IRQ_EXTI2_PRIORITY);
+ nvicEnableVector(EXTI3_IRQn, STM32_IRQ_EXTI3_PRIORITY);
+ nvicEnableVector(EXTI4_IRQn, STM32_IRQ_EXTI4_PRIORITY);
+ nvicEnableVector(EXTI9_5_IRQn, STM32_IRQ_EXTI5_9_PRIORITY);
+ nvicEnableVector(EXTI15_10_IRQn, STM32_IRQ_EXTI10_15_PRIORITY);
+#endif
+}
+
+/**
+ * @brief Disables IRQ sources.
+ *
+ * @notapi
+ */
+void irqDeinit(void) {
+
+#if HAL_USE_PAL
+ nvicDisableVector(EXTI0_IRQn);
+ nvicDisableVector(EXTI1_IRQn);
+ nvicDisableVector(EXTI2_IRQn);
+ nvicDisableVector(EXTI3_IRQn);
+ nvicDisableVector(EXTI4_IRQn);
+ nvicDisableVector(EXTI9_5_IRQn);
+ nvicDisableVector(EXTI15_10_IRQn);
+#endif
+}
+
+/** @} */
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_ext_lld_isr.h b/os/hal/ports/STM32/STM32F7xx/stm32_isr.h index 98b0aeb9a..22b16e677 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_ext_lld_isr.h +++ b/os/hal/ports/STM32/STM32F7xx/stm32_isr.h @@ -15,17 +15,15 @@ */
/**
- * @file STM32F7xx/hal_ext_lld_isr.h
- * @brief STM32F7xx EXT subsystem low level driver ISR header.
+ * @file STM32F7xx/stm32_isr.h
+ * @brief STM32F7xx ISR handler header.
*
- * @addtogroup EXT
+ * @addtogroup STM32F7xx_ISR
* @{
*/
-#ifndef HAL_EXT_LLD_ISR_H
-#define HAL_EXT_LLD_ISR_H
-
-#if HAL_USE_EXT || defined(__DOXYGEN__)
+#ifndef STM32_ISR_H
+#define STM32_ISR_H
/*===========================================================================*/
/* Driver constants. */
@@ -42,106 +40,106 @@ /**
* @brief EXTI0 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI0_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI0_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI0_PRIORITY 6
#endif
/**
* @brief EXTI1 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI1_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI1_PRIORITY 6
#endif
/**
* @brief EXTI2 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI2_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI2_PRIORITY 6
#endif
/**
* @brief EXTI3 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI3_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI3_PRIORITY 6
#endif
/**
* @brief EXTI4 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI4_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI4_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI4_PRIORITY 6
#endif
/**
* @brief EXTI9..5 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI5_9_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI5_9_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI5_9_PRIORITY 6
#endif
/**
* @brief EXTI15..10 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI10_15_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI10_15_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI10_15_PRIORITY 6
#endif
/**
* @brief EXTI16 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI16_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI16_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI16_PRIORITY 6
#endif
/**
* @brief EXTI17 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI17_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI17_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI17_PRIORITY 6
#endif
/**
* @brief EXTI18 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI18_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI18_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI18_PRIORITY 6
#endif
/**
* @brief EXTI19 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI19_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI19_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI19_PRIORITY 6
#endif
/**
* @brief EXTI20 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI20_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI20_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI20_PRIORITY 6
#endif
/**
* @brief EXTI21 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI21_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI21_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI21_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI21_PRIORITY 6
#endif
/**
* @brief EXTI22 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI22_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI22_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI22_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI22_PRIORITY 6
#endif
/**
* @brief EXTI23 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI23_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI23_IRQ_PRIORITY 6
+#if !defined(STM32_IRQ_EXTI23_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI23_PRIORITY 6
#endif
/** @} */
@@ -164,14 +162,12 @@ #ifdef __cplusplus
extern "C" {
#endif
- void ext_lld_exti_irq_enable(void);
- void ext_lld_exti_irq_disable(void);
+ void irqInit(void);
+ void irqDeinit(void);
#ifdef __cplusplus
}
#endif
-#endif /* HAL_USE_EXT */
-
-#endif /* HAL_EXT_LLD_ISR_H */
+#endif /* STM32_ISR_H */
/** @} */
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_ext_lld_isr.c b/os/hal/ports/STM32/STM32L0xx/hal_ext_lld_isr.c deleted file mode 100644 index 8bea63dcb..000000000 --- a/os/hal/ports/STM32/STM32L0xx/hal_ext_lld_isr.c +++ /dev/null @@ -1,283 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file STM32L0xx/hal_ext_lld_isr.c
- * @brief STM32L0xx EXT subsystem low level driver ISR code.
- *
- * @addtogroup EXT
- * @{
- */
-
-#include "hal.h"
-
-#if HAL_USE_EXT || defined(__DOXYGEN__)
-
-#include "hal_ext_lld_isr.h"
-
-/*===========================================================================*/
-/* Driver local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-#if !defined(STM32_DISABLE_EXTI01_HANDLER)
-/**
- * @brief EXTI[0]...EXTI[1] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(STM32_EXTI_LINE01_HANDLER) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 0) | (1U << 1));
- EXTI->PR = pr;
- if (pr & (1U << 0))
- EXTD1.config->channels[0].cb(&EXTD1, 0);
- if (pr & (1U << 1))
- EXTD1.config->channels[1].cb(&EXTD1, 1);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI23_HANDLER)
-/**
- * @brief EXTI[2]...EXTI[3] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(STM32_EXTI_LINE23_HANDLER) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 2) | (1U << 3));
- EXTI->PR = pr;
- if (pr & (1U << 2))
- EXTD1.config->channels[2].cb(&EXTD1, 2);
- if (pr & (1U << 3))
- EXTD1.config->channels[3].cb(&EXTD1, 3);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI4_15_HANDLER)
-/**
- * @brief EXTI[4]...EXTI[15] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(STM32_EXTI_LINE4_15_HANDLER) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 4) | (1U << 5) | (1U << 6) | (1U << 7) |
- (1U << 8) | (1U << 9) | (1U << 10) | (1U << 11) |
- (1U << 12) | (1U << 13) | (1U << 14) | (1U << 15));
- EXTI->PR = pr;
- if (pr & (1U << 4))
- EXTD1.config->channels[4].cb(&EXTD1, 4);
- if (pr & (1U << 5))
- EXTD1.config->channels[5].cb(&EXTD1, 5);
- if (pr & (1U << 6))
- EXTD1.config->channels[6].cb(&EXTD1, 6);
- if (pr & (1U << 7))
- EXTD1.config->channels[7].cb(&EXTD1, 7);
- if (pr & (1U << 8))
- EXTD1.config->channels[8].cb(&EXTD1, 8);
- if (pr & (1U << 9))
- EXTD1.config->channels[9].cb(&EXTD1, 9);
- if (pr & (1U << 10))
- EXTD1.config->channels[10].cb(&EXTD1, 10);
- if (pr & (1U << 11))
- EXTD1.config->channels[11].cb(&EXTD1, 11);
- if (pr & (1U << 12))
- EXTD1.config->channels[12].cb(&EXTD1, 12);
- if (pr & (1U << 13))
- EXTD1.config->channels[13].cb(&EXTD1, 13);
- if (pr & (1U << 14))
- EXTD1.config->channels[14].cb(&EXTD1, 14);
- if (pr & (1U << 15))
- EXTD1.config->channels[15].cb(&EXTD1, 15);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI16_HANDLER)
-/**
- * @brief EXTI[16] interrupt handler (PVD).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(STM32_EXTI_LINE16_HANDLER) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 16);
- EXTI->PR = pr;
- if (pr & (1U << 16))
- EXTD1.config->channels[16].cb(&EXTD1, 16);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if !defined(STM32_DISABLE_EXTI171920_HANDLER)
-/**
- * @brief EXTI[17],EXTI[19],EXTI[20] interrupt handler (RTC, CSS).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(STM32_EXTI_LINE171920_HANDLER) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 17) | (1U << 19) | (1U << 20));
- EXTI->PR = pr;
- if (pr & (1U << 17))
- EXTD1.config->channels[17].cb(&EXTD1, 17);
- if (pr & (1U << 19))
- EXTD1.config->channels[19].cb(&EXTD1, 19);
- if (pr & (1U << 20))
- EXTD1.config->channels[20].cb(&EXTD1, 20);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-#endif /* HAL_USE_EXT */
-
-#if (HAL_USE_EXT || HAL_USE_ADC) || defined(__DOXYGEN__)
-#if !defined(STM32_DISABLE_EXTI2122_HANDLER)
-/**
- * @brief EXTI[21],EXTI[22] interrupt handler (ADC, COMP).
- * @note This handler is shared with the ADC so it is handled
- * a bit differently.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(STM32_EXTI_LINE2122_HANDLER) {
-
- OSAL_IRQ_PROLOGUE();
-
-#if HAL_USE_EXT
- {
- uint32_t pr;
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 21) | (1U << 22));
- EXTI->PR = pr;
- if (pr & (1U << 21))
- EXTD1.config->channels[21].cb(&EXTD1, 21);
- if (pr & (1U << 22))
- EXTD1.config->channels[21].cb(&EXTD1, 22);
- }
-#endif
-#if HAL_USE_ADC
- adc_lld_serve_interrupt(&ADCD1);
-#endif
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-#endif /* HAL_USE_EXT || HAL_USE_ADC */
-
-#if HAL_USE_EXT || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Enables EXTI IRQ sources.
- *
- * @notapi
- */
-void ext_lld_exti_irq_enable(void) {
-
- nvicEnableVector(STM32_EXTI_LINE01_NUMBER,
- STM32_EXT_EXTI0_1_IRQ_PRIORITY);
- nvicEnableVector(STM32_EXTI_LINE23_NUMBER,
- STM32_EXT_EXTI2_3_IRQ_PRIORITY);
- nvicEnableVector(STM32_EXTI_LINE4_15_NUMBER,
- STM32_EXT_EXTI4_15_IRQ_PRIORITY);
- nvicEnableVector(STM32_EXTI_LINE16_NUMBER,
- STM32_EXT_EXTI16_IRQ_PRIORITY);
- nvicEnableVector(STM32_EXTI_LINE171920_NUMBER,
- STM32_EXT_EXTI17_20_IRQ_PRIORITY);
-#if HAL_USE_ADC
- /* If the ADC is not working then the vector can be enabled.*/
- if (ADCD1.state == ADC_STOP) {
- nvicEnableVector(STM32_EXTI_LINE2122_NUMBER,
- STM32_EXT_EXTI21_22_IRQ_PRIORITY);
- }
-#else
- nvicEnableVector(STM32_EXTI_LINE2122_NUMBER,
- STM32_EXT_EXTI21_22_IRQ_PRIORITY);
-#endif
-}
-
-/**
- * @brief Disables EXTI IRQ sources.
- *
- * @notapi
- */
-void ext_lld_exti_irq_disable(void) {
-
- nvicDisableVector(STM32_EXTI_LINE01_NUMBER);
- nvicDisableVector(STM32_EXTI_LINE23_NUMBER);
- nvicDisableVector(STM32_EXTI_LINE4_15_NUMBER);
- nvicDisableVector(STM32_EXTI_LINE16_NUMBER);
- nvicDisableVector(STM32_EXTI_LINE2122_NUMBER);
-#if HAL_USE_ADC
- /* If the ADC is not working then the vector can be disabled.*/
- if (ADCD1.state == ADC_STOP) {
- nvicDisableVector(STM32_EXTI_LINE171920_NUMBER);
- }
-#else
- nvicDisableVector(STM32_EXTI_LINE171920_NUMBER);
-#endif
-}
-
-#endif /* HAL_USE_EXT */
-
-/** @} */
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.c b/os/hal/ports/STM32/STM32L0xx/hal_lld.c index a3577d5c9..a0766c9a0 100644 --- a/os/hal/ports/STM32/STM32L0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.c @@ -161,10 +161,14 @@ void hal_lld_init(void) { /* Initializes the backup domain.*/
hal_lld_backup_domain_init();
+ /* DMA subsystems initialization.*/
#if defined(STM32_DMA_REQUIRED)
dmaInit();
#endif
+ /* IRQ subsystem initialization.*/
+ irqInit();
+
/* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.h b/os/hal/ports/STM32/STM32L0xx/hal_lld.h index 94d28c565..46b104218 100644 --- a/os/hal/ports/STM32/STM32L0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.h @@ -1188,6 +1188,7 @@ /* Various helpers.*/
#include "nvic.h"
+#include "stm32_isr.h"
#include "stm32_dma.h"
#include "stm32_rcc.h"
diff --git a/os/hal/ports/STM32/STM32L0xx/platform.mk b/os/hal/ports/STM32/STM32L0xx/platform.mk index 3cbacdd85..1f516efc7 100644 --- a/os/hal/ports/STM32/STM32L0xx/platform.mk +++ b/os/hal/ports/STM32/STM32L0xx/platform.mk @@ -1,5 +1,6 @@ # Required platform files.
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
+ $(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/stm32_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/hal_lld.c
# Required include directories.
@@ -16,11 +17,7 @@ endif HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h | egrep -e "\#define"))
-ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
-PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/hal_ext_lld_isr.c
-endif
else
-PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/hal_ext_lld_isr.c
endif
# Drivers compatible with the platform.
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_isr.c b/os/hal/ports/STM32/STM32L0xx/stm32_isr.c new file mode 100644 index 000000000..04c73d850 --- /dev/null +++ b/os/hal/ports/STM32/STM32L0xx/stm32_isr.c @@ -0,0 +1,164 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file STM32L0xx/stm32_isr.h
+ * @brief STM32L0xx ISR handler code.
+ *
+ * @addtogroup SRM32L0xx_ISR
+ * @{
+ */
+
+#include "hal.h"
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+#define exti_serve_irq(pr, channel) { \
+ \
+ if ((pr) & (1U << (channel))) { \
+ _pal_isr_code(channel); \
+ } \
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief EXTI[0]...EXTI[1] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector54) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= ((1U << 0) | (1U << 1));
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 0);
+ exti_serve_irq(pr, 1);
+
+ OSAL_IRQ_EPILOGUE();
+}
+
+/**
+ * @brief EXTI[2]...EXTI[3] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector58) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= ((1U << 2) | (1U << 3));
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 2);
+ exti_serve_irq(pr, 3);
+
+ OSAL_IRQ_EPILOGUE();
+}
+
+/**
+ * @brief EXTI[4]...EXTI[15] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector5C) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= ((1U << 4) | (1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) |
+ (1U << 9) | (1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) |
+ (1U << 14) | (1U << 15));
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 4);
+ exti_serve_irq(pr, 5);
+ exti_serve_irq(pr, 6);
+ exti_serve_irq(pr, 7);
+ exti_serve_irq(pr, 8);
+ exti_serve_irq(pr, 9);
+ exti_serve_irq(pr, 10);
+ exti_serve_irq(pr, 11);
+ exti_serve_irq(pr, 12);
+ exti_serve_irq(pr, 13);
+ exti_serve_irq(pr, 14);
+ exti_serve_irq(pr, 15);
+
+ OSAL_IRQ_EPILOGUE();
+}
+
+#endif /* HAL_USE_PAL */
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables IRQ sources.
+ *
+ * @notapi
+ */
+void irqInit(void) {
+
+#if HAL_USE_PAL
+ nvicEnableVector(STM32_EXTI_LINE01_NUMBER, STM32_IRQ_EXTI0_1_PRIORITY);
+ nvicEnableVector(STM32_EXTI_LINE23_NUMBER, STM32_IRQ_EXTI2_3_PRIORITY);
+ nvicEnableVector(STM32_EXTI_LINE4_15_NUMBER, STM32_IRQ_EXTI4_15_PRIORITY);
+ nvicEnableVector(STM32_EXTI_LINE16_NUMBER, STM32_IRQ_EXTI16_PRIORITY);
+#endif
+}
+
+/**
+ * @brief Disables IRQ sources.
+ *
+ * @notapi
+ */
+void irqDeinit(void) {
+
+#if HAL_USE_PAL
+ nvicDisableVector(STM32_EXTI_LINE01_NUMBER);
+ nvicDisableVector(STM32_EXTI_LINE23_NUMBER);
+ nvicDisableVector(STM32_EXTI_LINE4_15_NUMBER);
+ nvicDisableVector(STM32_EXTI_LINE16_NUMBER);
+ nvicDisableVector(STM32_EXTI_LINE2122_NUMBER);
+#endif
+}
+
+/** @} */
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_ext_lld_isr.h b/os/hal/ports/STM32/STM32L0xx/stm32_isr.h index e7465b00a..830334dff 100644 --- a/os/hal/ports/STM32/STM32L0xx/hal_ext_lld_isr.h +++ b/os/hal/ports/STM32/STM32L0xx/stm32_isr.h @@ -15,17 +15,15 @@ */
/**
- * @file STM32L0xx/hal_ext_lld_isr.h
- * @brief STM32L0xx EXT subsystem low level driver ISR header.
+ * @file STM32L0xx/stm32_isr.h
+ * @brief STM32L0xx ISR handler header.
*
- * @addtogroup EXT
+ * @addtogroup STM32L0xx_ISR
* @{
*/
-#ifndef HAL_EXT_LLD_ISR_H
-#define HAL_EXT_LLD_ISR_H
-
-#if HAL_USE_EXT || defined(__DOXYGEN__)
+#ifndef STM32_ISR_H
+#define STM32_ISR_H
/*===========================================================================*/
/* Driver constants. */
@@ -42,43 +40,43 @@ /**
* @brief EXTI0..1 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI0_1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
+#if !defined(STM32_IRQ_EXTI0_1_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI0_1_PRIORITY 3
#endif
/**
* @brief EXTI2..3 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI2_3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
+#if !defined(STM32_IRQ_EXTI2_3_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI2_3_PRIORITY 3
#endif
/**
* @brief EXTI4..15 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI4_15_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
+#if !defined(STM32_IRQ_EXTI4_15_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI4_15_PRIORITY 3
#endif
/**
* @brief EXTI16 (PVD) interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI16_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
+#if !defined(STM32_IRQ_EXTI16_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI16_PRIORITY 3
#endif
/**
* @brief EXTI17,19,20 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI17_20_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI17_20_IRQ_PRIORITY 3
+#if !defined(STM32_IRQ_EXTI17_20_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI17_20_PRIORITY 3
#endif
/**
* @brief EXTI21,22 interrupt priority level setting.
*/
-#if !defined(STM32_EXT_EXTI21_22_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3
+#if !defined(STM32_IRQ_EXTI21_22_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI21_22_PRIORITY 3
#endif
/** @} */
@@ -101,14 +99,12 @@ #ifdef __cplusplus
extern "C" {
#endif
- void ext_lld_exti_irq_enable(void);
- void ext_lld_exti_irq_disable(void);
+ void irqInit(void);
+ void irqDeinit(void);
#ifdef __cplusplus
}
#endif
-#endif /* HAL_USE_EXT */
-
-#endif /* HAL_EXT_LLD_ISR_H */
+#endif /* STM32_ISR_H */
/** @} */
diff --git a/os/hal/ports/STM32/STM32L1xx/hal_ext_lld_isr.c b/os/hal/ports/STM32/STM32L1xx/hal_ext_lld_isr.c deleted file mode 100644 index 65aba949a..000000000 --- a/os/hal/ports/STM32/STM32L1xx/hal_ext_lld_isr.c +++ /dev/null @@ -1,396 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file STM32L1xx/hal_ext_lld_isr.c
- * @brief STM32L1xx EXT subsystem low level driver ISR code.
- *
- * @addtogroup EXT
- * @{
- */
-
-#include "hal.h"
-
-#if HAL_USE_EXT || defined(__DOXYGEN__)
-
-#include "hal_ext_lld_isr.h"
-
-/*===========================================================================*/
-/* Driver local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/**
- * @brief EXTI[0] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector58) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 0);
- EXTI->PR = pr;
- if (pr & (1U << 0))
- EXTD1.config->channels[0].cb(&EXTD1, 0);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[1] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector5C) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 1);
- EXTI->PR = pr;
- if (pr & (1U << 1))
- EXTD1.config->channels[1].cb(&EXTD1, 1);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[2] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector60) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 2);
- EXTI->PR = pr;
- if (pr & (1U << 2))
- EXTD1.config->channels[2].cb(&EXTD1, 2);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[3] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector64) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 3);
- EXTI->PR = pr;
- if (pr & (1U << 3))
- EXTD1.config->channels[3].cb(&EXTD1, 3);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[4] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector68) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 4);
- EXTI->PR = pr;
- if (pr & (1U << 4))
- EXTD1.config->channels[4].cb(&EXTD1, 4);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[5]...EXTI[9] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector9C) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) |
- (1U << 9));
- EXTI->PR = pr;
- if (pr & (1U << 5))
- EXTD1.config->channels[5].cb(&EXTD1, 5);
- if (pr & (1U << 6))
- EXTD1.config->channels[6].cb(&EXTD1, 6);
- if (pr & (1U << 7))
- EXTD1.config->channels[7].cb(&EXTD1, 7);
- if (pr & (1U << 8))
- EXTD1.config->channels[8].cb(&EXTD1, 8);
- if (pr & (1U << 9))
- EXTD1.config->channels[9].cb(&EXTD1, 9);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[10]...EXTI[15] interrupt handler.
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE0) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) |
- (1U << 14) | (1U << 15));
- EXTI->PR = pr;
- if (pr & (1U << 10))
- EXTD1.config->channels[10].cb(&EXTD1, 10);
- if (pr & (1U << 11))
- EXTD1.config->channels[11].cb(&EXTD1, 11);
- if (pr & (1U << 12))
- EXTD1.config->channels[12].cb(&EXTD1, 12);
- if (pr & (1U << 13))
- EXTD1.config->channels[13].cb(&EXTD1, 13);
- if (pr & (1U << 14))
- EXTD1.config->channels[14].cb(&EXTD1, 14);
- if (pr & (1U << 15))
- EXTD1.config->channels[15].cb(&EXTD1, 15);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[16] interrupt handler (PVD).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector44) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 16);
- EXTI->PR = pr;
- if (pr & (1U << 16))
- EXTD1.config->channels[16].cb(&EXTD1, 16);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[17] interrupt handler (RTC).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE4) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 17);
- EXTI->PR = pr;
- if (pr & (1U << 17))
- EXTD1.config->channels[17].cb(&EXTD1, 17);
-
- OSAL_IRQ_EPILOGUE();
-}
-/**
- * @brief EXTI[18] interrupt handler (USB_FS_WKUP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE8) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 18);
- EXTI->PR = pr;
- if (pr & (1U << 18))
- EXTD1.config->channels[18].cb(&EXTD1, 18);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[19] interrupt handler (TAMPER_STAMP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector48) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 19);
- EXTI->PR = pr;
- if (pr & (1U << 19))
- EXTD1.config->channels[19].cb(&EXTD1, 19);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[20] interrupt handler (RTC_WKUP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector4C) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 20);
- EXTI->PR = pr;
- if (pr & (1U << 20))
- EXTD1.config->channels[20].cb(&EXTD1, 20);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[21]...EXTI[22] interrupt handler (COMP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector98) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & ((1U << 21) | (1U << 22));
- EXTI->PR = pr;
- if (pr & (1U << 21))
- EXTD1.config->channels[21].cb(&EXTD1, 21);
- if (pr & (1U << 22))
- EXTD1.config->channels[22].cb(&EXTD1, 22);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-#if (STM32_EXTI_NUM_LINES > 23) || defined(__DOXYGEN__)
-/**
- * @brief EXTI[23] interrupt handler (Channel Acquisition).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector120) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR;
- pr &= EXTI->IMR & (1U << 23);
- EXTI->PR = pr;
- if (pr & (1U << 23))
- EXTD1.config->channels[23].cb(&EXTD1, 23);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Enables EXTI IRQ sources.
- *
- * @notapi
- */
-void ext_lld_exti_irq_enable(void) {
-
- nvicEnableVector(EXTI0_IRQn, STM32_EXT_EXTI0_IRQ_PRIORITY);
- nvicEnableVector(EXTI1_IRQn, STM32_EXT_EXTI1_IRQ_PRIORITY);
- nvicEnableVector(EXTI2_IRQn, STM32_EXT_EXTI2_IRQ_PRIORITY);
- nvicEnableVector(EXTI3_IRQn, STM32_EXT_EXTI3_IRQ_PRIORITY);
- nvicEnableVector(EXTI4_IRQn, STM32_EXT_EXTI4_IRQ_PRIORITY);
- nvicEnableVector(EXTI9_5_IRQn, STM32_EXT_EXTI5_9_IRQ_PRIORITY);
- nvicEnableVector(EXTI15_10_IRQn, STM32_EXT_EXTI10_15_IRQ_PRIORITY);
- nvicEnableVector(PVD_IRQn, STM32_EXT_EXTI16_IRQ_PRIORITY);
- nvicEnableVector(RTC_Alarm_IRQn, STM32_EXT_EXTI17_IRQ_PRIORITY);
- nvicEnableVector(USB_FS_WKUP_IRQn, STM32_EXT_EXTI18_IRQ_PRIORITY);
- nvicEnableVector(TAMPER_STAMP_IRQn, STM32_EXT_EXTI19_IRQ_PRIORITY);
- nvicEnableVector(RTC_WKUP_IRQn, STM32_EXT_EXTI20_IRQ_PRIORITY);
- nvicEnableVector(COMP_IRQn, STM32_EXT_EXTI21_22_IRQ_PRIORITY);
-#if STM32_EXTI_NUM_LINES > 23
- nvicEnableVector(COMP_ACQ_IRQn, STM32_EXT_EXTI23_IRQ_PRIORITY);
-#endif
-}
-
-/**
- * @brief Disables EXTI IRQ sources.
- *
- * @notapi
- */
-void ext_lld_exti_irq_disable(void) {
-
- nvicDisableVector(EXTI0_IRQn);
- nvicDisableVector(EXTI1_IRQn);
- nvicDisableVector(EXTI2_IRQn);
- nvicDisableVector(EXTI3_IRQn);
- nvicDisableVector(EXTI4_IRQn);
- nvicDisableVector(EXTI9_5_IRQn);
- nvicDisableVector(EXTI15_10_IRQn);
- nvicDisableVector(PVD_IRQn);
- nvicDisableVector(RTC_Alarm_IRQn);
- nvicDisableVector(USB_FS_WKUP_IRQn);
- nvicDisableVector(TAMPER_STAMP_IRQn);
- nvicDisableVector(RTC_WKUP_IRQn);
- nvicDisableVector(COMP_IRQn);
-#if STM32_EXTI_NUM_LINES > 23
- nvicDisableVector(COMP_ACQ_IRQn);
-#endif
-}
-
-#endif /* HAL_USE_EXT */
-
-/** @} */
diff --git a/os/hal/ports/STM32/STM32L1xx/hal_ext_lld_isr.h b/os/hal/ports/STM32/STM32L1xx/hal_ext_lld_isr.h deleted file mode 100644 index 224bd6087..000000000 --- a/os/hal/ports/STM32/STM32L1xx/hal_ext_lld_isr.h +++ /dev/null @@ -1,170 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file STM32L1xx/hal_ext_lld_isr.h
- * @brief STM32L1xx EXT subsystem low level driver ISR header.
- *
- * @addtogroup EXT
- * @{
- */
-
-#ifndef HAL_EXT_LLD_ISR_H
-#define HAL_EXT_LLD_ISR_H
-
-#if HAL_USE_EXT || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver constants. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver pre-compile time settings. */
-/*===========================================================================*/
-
-/**
- * @name Configuration options
- * @{
- */
-/**
- * @brief EXTI0 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI0_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI1 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI2 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI3 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI4 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI4_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI9..5 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI5_9_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI15..10 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI10_15_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI16 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI16_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI17 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI17_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI18 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI18_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI19 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI19_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI20 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI20_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI21..22 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI21_22_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6
-#endif
-
-/**
- * @brief EXTI23 interrupt priority level setting.
- */
-#if !defined(STM32_EXT_EXTI23_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_EXT_EXTI23_IRQ_PRIORITY 6
-#endif
-/** @} */
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void ext_lld_exti_irq_enable(void);
- void ext_lld_exti_irq_disable(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* HAL_USE_EXT */
-
-#endif /* HAL_EXT_LLD_ISR_H */
-
-/** @} */
diff --git a/os/hal/ports/STM32/STM32L1xx/hal_lld.c b/os/hal/ports/STM32/STM32L1xx/hal_lld.c index 2f5681d5e..78559a2b1 100644 --- a/os/hal/ports/STM32/STM32L1xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32L1xx/hal_lld.c @@ -109,10 +109,14 @@ void hal_lld_init(void) { /* Initializes the backup domain.*/
hal_lld_backup_domain_init();
+ /* DMA subsystems initialization.*/
#if defined(STM32_DMA_REQUIRED)
dmaInit();
#endif
+ /* IRQ subsystem initialization.*/
+ irqInit();
+
/* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
diff --git a/os/hal/ports/STM32/STM32L1xx/platform.mk b/os/hal/ports/STM32/STM32L1xx/platform.mk index 23c6bbaae..981b1dbbb 100644 --- a/os/hal/ports/STM32/STM32L1xx/platform.mk +++ b/os/hal/ports/STM32/STM32L1xx/platform.mk @@ -1,5 +1,6 @@ # Required platform files.
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
+ $(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/stm32_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/hal_lld.c
# Required include directories.
@@ -16,15 +17,11 @@ endif HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h | egrep -e "\#define"))
-ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
-PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/hal_ext_lld_isr.c
-endif
ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c
endif
else
- $(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c
-PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/hal_ext_lld_isr.c
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c
endif
# Drivers compatible with the platform.
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_isr.c b/os/hal/ports/STM32/STM32L1xx/stm32_isr.c new file mode 100644 index 000000000..3682c5a8a --- /dev/null +++ b/os/hal/ports/STM32/STM32L1xx/stm32_isr.c @@ -0,0 +1,255 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file STM32L1xx/stm32_isr.h
+ * @brief STM32L1xx ISR handler code.
+ *
+ * @addtogroup SRM32L1xx_ISR
+ * @{
+ */
+
+#include "hal.h"
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+#define exti_serve_irq(pr, channel) { \
+ \
+ if ((pr) & (1U << (channel))) { \
+ _pal_isr_code(channel); \
+ } \
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+#if !defined(STM32_DISABLE_EXTI0_HANDLER)
+/**
+ * @brief EXTI[0] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector58) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 0);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 0);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI1_HANDLER)
+/**
+ * @brief EXTI[1] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector5C) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 1);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 1);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI2_HANDLER)
+/**
+ * @brief EXTI[2] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector60) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 2);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 2);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI3_HANDLER)
+/**
+ * @brief EXTI[3] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector64) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 3);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 3);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI4_HANDLER)
+/**
+ * @brief EXTI[4] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector68) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & (1U << 4);
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 4);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
+/**
+ * @brief EXTI[5]...EXTI[9] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector9C) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & ((1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) |
+ (1U << 9));
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 5);
+ exti_serve_irq(pr, 6);
+ exti_serve_irq(pr, 7);
+ exti_serve_irq(pr, 8);
+ exti_serve_irq(pr, 9);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
+/**
+ * @brief EXTI[10]...EXTI[15] interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(VectorE0) {
+ uint32_t pr;
+
+ OSAL_IRQ_PROLOGUE();
+
+ pr = EXTI->PR;
+ pr &= EXTI->IMR & ((1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) |
+ (1U << 14) | (1U << 15));
+ EXTI->PR = pr;
+
+ exti_serve_irq(pr, 10);
+ exti_serve_irq(pr, 11);
+ exti_serve_irq(pr, 12);
+ exti_serve_irq(pr, 13);
+ exti_serve_irq(pr, 14);
+ exti_serve_irq(pr, 15);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#endif /* HAL_USE_PAL */
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables IRQ sources.
+ *
+ * @notapi
+ */
+void irqInit(void) {
+
+#if HAL_USE_PAL
+ nvicEnableVector(EXTI0_IRQn, STM32_IRQ_EXTI0_PRIORITY);
+ nvicEnableVector(EXTI1_IRQn, STM32_IRQ_EXTI1_PRIORITY);
+ nvicEnableVector(EXTI2_IRQn, STM32_IRQ_EXTI2_PRIORITY);
+ nvicEnableVector(EXTI3_IRQn, STM32_IRQ_EXTI3_PRIORITY);
+ nvicEnableVector(EXTI4_IRQn, STM32_IRQ_EXTI4_PRIORITY);
+ nvicEnableVector(EXTI9_5_IRQn, STM32_IRQ_EXTI5_9_PRIORITY);
+ nvicEnableVector(EXTI15_10_IRQn, STM32_IRQ_EXTI10_15_PRIORITY);
+#endif
+}
+
+/**
+ * @brief Disables IRQ sources.
+ *
+ * @notapi
+ */
+void irqDeinit(void) {
+
+#if HAL_USE_PAL
+ nvicDisableVector(EXTI0_IRQn);
+ nvicDisableVector(EXTI1_IRQn);
+ nvicDisableVector(EXTI2_IRQn);
+ nvicDisableVector(EXTI3_IRQn);
+ nvicDisableVector(EXTI4_IRQn);
+ nvicDisableVector(EXTI9_5_IRQn);
+ nvicDisableVector(EXTI15_10_IRQn);
+#endif
+}
+
+/** @} */
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_isr.h b/os/hal/ports/STM32/STM32L1xx/stm32_isr.h index 8c803d093..9d9d1f425 100644 --- a/os/hal/ports/STM32/STM32L1xx/stm32_isr.h +++ b/os/hal/ports/STM32/STM32L1xx/stm32_isr.h @@ -16,7 +16,7 @@ /**
* @file STM32L1xx/stm32_isr.h
- * @brief ISR remapper driver header.
+ * @brief STM32L1xx ISR handler header.
*
* @addtogroup STM32L1xx_ISR
* @{
@@ -97,6 +97,109 @@ /* Driver pre-compile time settings. */
/*===========================================================================*/
+/**
+ * @name Configuration options
+ * @{
+ */
+/**
+ * @brief EXTI0 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI0_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI0_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI1 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI1_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI1_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI2 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI2_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI2_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI3 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI3_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI3_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI4 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI4_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI4_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI9..5 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI5_9_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI5_9_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI15..10 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI10_15_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI10_15_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI16 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI16_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI16_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI17 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI17_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI17_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI18 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI18_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI18_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI19 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI19_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI19_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI20 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI20_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI20_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI21..22 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI21_22_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI21_22_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI23 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI23_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI23_PRIORITY 6
+#endif
+/** @} */
+
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@@ -113,6 +216,15 @@ /* External declarations. */
/*===========================================================================*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void irqInit(void);
+ void irqDeinit(void);
+#ifdef __cplusplus
+}
+#endif
+
#endif /* STM32_ISR_H */
/** @} */
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_isr.c b/os/hal/ports/STM32/STM32L4xx/stm32_isr.c index 71907f00c..f10a7dd9d 100644 --- a/os/hal/ports/STM32/STM32L4xx/stm32_isr.c +++ b/os/hal/ports/STM32/STM32L4xx/stm32_isr.c @@ -40,27 +40,19 @@ /* Driver local functions. */
/*===========================================================================*/
-#if HAL_USE_EXT
-#define exti_serve_irq(pr, channel) { \
- \
- if ((pr) & (1U << (channel))) { \
- EXTD1.config->channels[channel].cb(&EXTD1, channel); \
- } \
-}
-#elif HAL_USE_PAL
#define exti_serve_irq(pr, channel) { \
\
if ((pr) & (1U << (channel))) { \
_pal_isr_code(channel); \
} \
}
-#endif
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
-#if HAL_USE_PAL || HAL_USE_EXT || defined(__DOXYGEN__)
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+#if !defined(STM32_DISABLE_EXTI0_HANDLER)
/**
* @brief EXTI[0] interrupt handler.
*
@@ -79,7 +71,9 @@ OSAL_IRQ_HANDLER(Vector58) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI1_HANDLER)
/**
* @brief EXTI[1] interrupt handler.
*
@@ -98,7 +92,9 @@ OSAL_IRQ_HANDLER(Vector5C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI2_HANDLER)
/**
* @brief EXTI[2] interrupt handler.
*
@@ -117,7 +113,9 @@ OSAL_IRQ_HANDLER(Vector60) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI3_HANDLER)
/**
* @brief EXTI[3] interrupt handler.
*
@@ -136,7 +134,9 @@ OSAL_IRQ_HANDLER(Vector64) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI4_HANDLER)
/**
* @brief EXTI[4] interrupt handler.
*
@@ -155,7 +155,9 @@ OSAL_IRQ_HANDLER(Vector68) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
/**
* @brief EXTI[5]...EXTI[9] interrupt handler.
*
@@ -179,7 +181,9 @@ OSAL_IRQ_HANDLER(Vector9C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
/**
* @brief EXTI[10]...EXTI[15] interrupt handler.
*
@@ -204,119 +208,9 @@ OSAL_IRQ_HANDLER(VectorE0) { OSAL_IRQ_EPILOGUE();
}
+#endif
-#if HAL_USE_EXT || defined(__DOXYGEN__)
-/**
- * @brief EXTI[16/35/36/37/38] interrupt handler (PVD/PVM1/PVM2/PVM3/PVM4)
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector44) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR1;
- pr &= EXTI->IMR1 & (1U << 16);
- EXTI->PR1 = pr;
- if (pr & (1U << 16))
- EXTD1.config->channels[16].cb(&EXTD1, 16);
-
- pr = EXTI->PR2 & EXTI->IMR2 & ( (1U << (35-32)) | (1U << (36-32)) |
- (1U << (37-32)) | (1U << (38-32)) );
- EXTI->PR2 = pr;
- if (pr & (1U << (35-32)))
- EXTD1.config->channels[35].cb(&EXTD1, 35);
- if (pr & (1U << (36-32)))
- EXTD1.config->channels[36].cb(&EXTD1, 36);
- if (pr & (1U << (37-32)))
- EXTD1.config->channels[37].cb(&EXTD1, 37);
- if (pr & (1U << (38-32)))
- EXTD1.config->channels[38].cb(&EXTD1, 38);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[18] interrupt handler (RTC_ALARM).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(VectorE4) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR1;
- pr &= EXTI->IMR1 & (1U << 18);
- EXTI->PR1 = pr;
- if (pr & (1U << 18))
- EXTD1.config->channels[18].cb(&EXTD1, 18);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[19] interrupt handler (RTC_TAMP_STAMP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector48) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR1;
- pr &= EXTI->IMR1 & (1U << 19);
- EXTI->PR1 = pr;
- if (pr & (1U << 19))
- EXTD1.config->channels[19].cb(&EXTD1, 19);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[20] interrupt handler (RTC_WKUP).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector4C) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR1;
- pr &= EXTI->IMR1 & (1U << 20);
- EXTI->PR1 = pr;
- if (pr & (1U << 20))
- EXTD1.config->channels[20].cb(&EXTD1, 20);
-
- OSAL_IRQ_EPILOGUE();
-}
-
-/**
- * @brief EXTI[21/22] interrupt handler (COMP1,COMP2).
- *
- * @isr
- */
-OSAL_IRQ_HANDLER(Vector140) {
- uint32_t pr;
-
- OSAL_IRQ_PROLOGUE();
-
- pr = EXTI->PR1;
- pr &= EXTI->IMR1 & ( (1U << 21) | ( 1U << 22 ) );
- EXTI->PR1 = pr;
- if (pr & (1U << 21))
- EXTD1.config->channels[21].cb(&EXTD1, 21);
- if (pr & (1U << 22))
- EXTD1.config->channels[22].cb(&EXTD1, 22);
-
- OSAL_IRQ_EPILOGUE();
-}
-#endif /* HAL_USE_EXT */
-
-#endif /* HAL_USE_PAL || HAL_USE_EXT */
+#endif /* HAL_USE_PAL */
/*===========================================================================*/
/* Driver exported functions. */
@@ -329,7 +223,7 @@ OSAL_IRQ_HANDLER(Vector140) { */
void irqInit(void) {
-#if HAL_USE_PAL || HAL_USE_EXT
+#if HAL_USE_PAL
nvicEnableVector(EXTI0_IRQn, STM32_IRQ_EXTI0_PRIORITY);
nvicEnableVector(EXTI1_IRQn, STM32_IRQ_EXTI1_PRIORITY);
nvicEnableVector(EXTI2_IRQn, STM32_IRQ_EXTI2_PRIORITY);
@@ -337,13 +231,6 @@ void irqInit(void) { nvicEnableVector(EXTI4_IRQn, STM32_IRQ_EXTI4_PRIORITY);
nvicEnableVector(EXTI9_5_IRQn, STM32_IRQ_EXTI5_9_PRIORITY);
nvicEnableVector(EXTI15_10_IRQn, STM32_IRQ_EXTI10_15_PRIORITY);
-#if HAL_USE_EXT
- nvicEnableVector(PVD_PVM_IRQn, STM32_IRQ_EXTI1635_38_PRIORITY);
- nvicEnableVector(RTC_Alarm_IRQn, STM32_IRQ_EXTI18_PRIORITY);
- nvicEnableVector(TAMP_STAMP_IRQn, STM32_IRQ_EXTI19_PRIORITY);
- nvicEnableVector(RTC_WKUP_IRQn, STM32_IRQ_EXTI20_PRIORITY);
- nvicEnableVector(COMP_IRQn, STM32_IRQ_EXTI21_22_PRIORITY);
-#endif
#endif
}
@@ -354,7 +241,7 @@ void irqInit(void) { */
void irqDeinit(void) {
-#if HAL_USE_PAL || HAL_USE_EXT
+#if HAL_USE_PAL
nvicDisableVector(EXTI0_IRQn);
nvicDisableVector(EXTI1_IRQn);
nvicDisableVector(EXTI2_IRQn);
@@ -362,13 +249,6 @@ void irqDeinit(void) { nvicDisableVector(EXTI4_IRQn);
nvicDisableVector(EXTI9_5_IRQn);
nvicDisableVector(EXTI15_10_IRQn);
-#if HAL_USE_EXT
- nvicDisableVector(PVD_PVM_IRQn);
- nvicDisableVector(RTC_Alarm_IRQn);
- nvicDisableVector(TAMP_STAMP_IRQn);
- nvicDisableVector(RTC_WKUP_IRQn);
- nvicDisableVector(COMP_IRQn);
-#endif
#endif
}
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