diff options
Diffstat (limited to 'os/hal/ports/STM32F1xx/hal_lld_f103.h')
| -rw-r--r-- | os/hal/ports/STM32F1xx/hal_lld_f103.h | 700 |
1 files changed, 0 insertions, 700 deletions
diff --git a/os/hal/ports/STM32F1xx/hal_lld_f103.h b/os/hal/ports/STM32F1xx/hal_lld_f103.h index 813970305..280d9e5fb 100644 --- a/os/hal/ports/STM32F1xx/hal_lld_f103.h +++ b/os/hal/ports/STM32F1xx/hal_lld_f103.h @@ -37,30 +37,6 @@ /*===========================================================================*/
/**
- * @name Platform identification
- * @{
- */
-#if defined(__DOXYGEN__)
-#define PLATFORM_NAME "STM32F10x Performance Line"
-
-#elif defined(STM32F10X_LD)
-#define PLATFORM_NAME "STM32F10x Performance Line Low Density"
-
-#elif defined(STM32F10X_MD)
-#define PLATFORM_NAME "STM32F10x Performance Line Medium Density"
-
-#elif defined(STM32F10X_HD)
-#define PLATFORM_NAME "STM32F10x Performance Line High Density"
-
-#elif defined(STM32F10X_XL)
-#define PLATFORM_NAME "STM32F10x Performance Line eXtra Density"
-
-#else
-#error "unsupported STM32 Performance Line member"
-#endif
-/** @} */
-
-/**
* @name Absolute Maximum Ratings
* @{
*/
@@ -189,682 +165,6 @@ /** @} */
/*===========================================================================*/
-/* Platform capabilities. */
-/*===========================================================================*/
-
-#if defined(STM32F10X_LD) || defined(__DOXYGEN__)
-/**
- * @name STM32F103 LD capabilities
- * @{
- */
-/* ADC attributes.*/
-#define STM32_HAS_ADC1 TRUE
-#define STM32_HAS_ADC2 TRUE
-#define STM32_HAS_ADC3 FALSE
-#define STM32_HAS_ADC4 FALSE
-
-/* CAN attributes.*/
-#define STM32_HAS_CAN1 TRUE
-#define STM32_HAS_CAN2 FALSE
-#define STM32_CAN_MAX_FILTERS 14
-
-/* DAC attributes.*/
-#define STM32_HAS_DAC FALSE
-
-/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
-#define STM32_HAS_DMA1 TRUE
-#define STM32_HAS_DMA2 FALSE
-
-/* ETH attributes.*/
-#define STM32_HAS_ETH FALSE
-
-/* EXTI attributes.*/
-#define STM32_EXTI_NUM_CHANNELS 19
-
-/* GPIO attributes.*/
-#define STM32_HAS_GPIOA TRUE
-#define STM32_HAS_GPIOB TRUE
-#define STM32_HAS_GPIOC TRUE
-#define STM32_HAS_GPIOD TRUE
-#define STM32_HAS_GPIOE FALSE
-#define STM32_HAS_GPIOF FALSE
-#define STM32_HAS_GPIOG FALSE
-#define STM32_HAS_GPIOH FALSE
-#define STM32_HAS_GPIOI FALSE
-
-/* I2C attributes.*/
-#define STM32_HAS_I2C1 TRUE
-#define STM32_I2C1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
-#define STM32_I2C1_RX_DMA_CHN 0x00000000
-#define STM32_I2C1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
-#define STM32_I2C1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_I2C2 FALSE
-#define STM32_I2C2_RX_DMA_MSK 0
-#define STM32_I2C2_RX_DMA_CHN 0x00000000
-#define STM32_I2C2_TX_DMA_MSK 0
-#define STM32_I2C2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_I2C3 FALSE
-#define STM32_SPI3_RX_DMA_MSK 0
-#define STM32_SPI3_RX_DMA_CHN 0x00000000
-#define STM32_SPI3_TX_DMA_MSK 0
-#define STM32_SPI3_TX_DMA_CHN 0x00000000
-
-/* SDIO attributes.*/
-#define STM32_HAS_SDIO FALSE
-
-/* SPI attributes.*/
-#define STM32_HAS_SPI1 TRUE
-#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
-#define STM32_SPI1_RX_DMA_CHN 0x00000000
-#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
-#define STM32_SPI1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_SPI2 FALSE
-#define STM32_SPI2_RX_DMA_MSK 0
-#define STM32_SPI2_RX_DMA_CHN 0x00000000
-#define STM32_SPI2_TX_DMA_MSK 0
-#define STM32_SPI2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_SPI3 FALSE
-#define STM32_SPI3_RX_DMA_MSK 0
-#define STM32_SPI3_RX_DMA_CHN 0x00000000
-#define STM32_SPI3_TX_DMA_MSK 0
-#define STM32_SPI3_TX_DMA_CHN 0x00000000
-
-/* TIM attributes.*/
-#define STM32_HAS_TIM1 TRUE
-#define STM32_HAS_TIM2 TRUE
-#define STM32_HAS_TIM3 TRUE
-#define STM32_HAS_TIM4 FALSE
-#define STM32_HAS_TIM5 FALSE
-#define STM32_HAS_TIM6 FALSE
-#define STM32_HAS_TIM7 FALSE
-#define STM32_HAS_TIM8 FALSE
-#define STM32_HAS_TIM9 FALSE
-#define STM32_HAS_TIM10 FALSE
-#define STM32_HAS_TIM11 FALSE
-#define STM32_HAS_TIM12 FALSE
-#define STM32_HAS_TIM13 FALSE
-#define STM32_HAS_TIM14 FALSE
-#define STM32_HAS_TIM15 FALSE
-#define STM32_HAS_TIM16 FALSE
-#define STM32_HAS_TIM17 FALSE
-#define STM32_HAS_TIM18 FALSE
-#define STM32_HAS_TIM19 FALSE
-
-/* USART attributes.*/
-#define STM32_HAS_USART1 TRUE
-#define STM32_USART1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
-#define STM32_USART1_RX_DMA_CHN 0x00000000
-#define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
-#define STM32_USART1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART2 TRUE
-#define STM32_USART2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
-#define STM32_USART2_RX_DMA_CHN 0x00000000
-#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
-#define STM32_USART2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART3 FALSE
-#define STM32_USART3_RX_DMA_MSK 0
-#define STM32_USART3_RX_DMA_CHN 0x00000000
-#define STM32_USART3_TX_DMA_MSK 0
-#define STM32_USART3_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_UART4 FALSE
-#define STM32_UART4_RX_DMA_MSK 0
-#define STM32_UART4_RX_DMA_CHN 0x00000000
-#define STM32_UART4_TX_DMA_MSK 0
-#define STM32_UART4_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_UART5 FALSE
-#define STM32_UART5_RX_DMA_MSK 0
-#define STM32_UART5_RX_DMA_CHN 0x00000000
-#define STM32_UART5_TX_DMA_MSK 0
-#define STM32_UART5_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART6 FALSE
-#define STM32_USART6_RX_DMA_MSK 0
-#define STM32_USART6_RX_DMA_CHN 0x00000000
-#define STM32_USART6_TX_DMA_MSK 0
-#define STM32_USART6_TX_DMA_CHN 0x00000000
-
-/* USB attributes.*/
-#define STM32_HAS_USB FALSE
-#define STM32_HAS_OTG1 FALSE
-#define STM32_HAS_OTG2 FALSE
-/** @} */
-#endif /* defined(STM32F10X_LD) */
-
-#if defined(STM32F10X_MD) || defined(__DOXYGEN__)
-/**
- * @name STM32F103 MD capabilities
- * @{
- */
-/* ADC attributes.*/
-#define STM32_HAS_ADC1 TRUE
-#define STM32_HAS_ADC2 TRUE
-#define STM32_HAS_ADC3 FALSE
-
-/* CAN attributes.*/
-#define STM32_HAS_CAN1 TRUE
-#define STM32_HAS_CAN2 FALSE
-#define STM32_CAN_MAX_FILTERS 14
-
-/* DAC attributes.*/
-#define STM32_HAS_DAC FALSE
-
-/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
-#define STM32_HAS_DMA1 TRUE
-#define STM32_HAS_DMA2 FALSE
-
-/* ETH attributes.*/
-#define STM32_HAS_ETH FALSE
-
-/* EXTI attributes.*/
-#define STM32_EXTI_NUM_CHANNELS 19
-
-/* GPIO attributes.*/
-#define STM32_HAS_GPIOA TRUE
-#define STM32_HAS_GPIOB TRUE
-#define STM32_HAS_GPIOC TRUE
-#define STM32_HAS_GPIOD TRUE
-#define STM32_HAS_GPIOE TRUE
-#define STM32_HAS_GPIOF FALSE
-#define STM32_HAS_GPIOG FALSE
-#define STM32_HAS_GPIOH FALSE
-#define STM32_HAS_GPIOI FALSE
-
-/* I2C attributes.*/
-#define STM32_HAS_I2C1 TRUE
-#define STM32_I2C1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
-#define STM32_I2C1_RX_DMA_CHN 0x00000000
-#define STM32_I2C1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
-#define STM32_I2C1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_I2C2 TRUE
-#define STM32_I2C2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
-#define STM32_I2C2_RX_DMA_CHN 0x00000000
-#define STM32_I2C2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
-#define STM32_I2C2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_I2C3 FALSE
-#define STM32_I2C3_RX_DMA_MSK 0
-#define STM32_I2C3_RX_DMA_CHN 0x00000000
-#define STM32_I2C3_TX_DMA_MSK 0
-#define STM32_I2C3_TX_DMA_CHN 0x00000000
-
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTCSEL_HAS_SUBSECONDS TRUE
-
-/* SDIO attributes.*/
-#define STM32_HAS_SDIO FALSE
-
-/* SPI attributes.*/
-#define STM32_HAS_SPI1 TRUE
-#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
-#define STM32_SPI1_RX_DMA_CHN 0x00000000
-#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
-#define STM32_SPI1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_SPI2 TRUE
-#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
-#define STM32_SPI2_RX_DMA_CHN 0x00000000
-#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
-#define STM32_SPI2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_SPI3 FALSE
-#define STM32_SPI3_RX_DMA_MSK 0
-#define STM32_SPI3_RX_DMA_CHN 0x00000000
-#define STM32_SPI3_TX_DMA_MSK 0
-#define STM32_SPI3_TX_DMA_CHN 0x00000000
-
-/* TIM attributes.*/
-#define STM32_HAS_TIM1 TRUE
-#define STM32_HAS_TIM2 TRUE
-#define STM32_HAS_TIM3 TRUE
-#define STM32_HAS_TIM4 TRUE
-#define STM32_HAS_TIM5 FALSE
-#define STM32_HAS_TIM6 FALSE
-#define STM32_HAS_TIM7 FALSE
-#define STM32_HAS_TIM8 FALSE
-#define STM32_HAS_TIM9 FALSE
-#define STM32_HAS_TIM10 FALSE
-#define STM32_HAS_TIM11 FALSE
-#define STM32_HAS_TIM12 FALSE
-#define STM32_HAS_TIM13 FALSE
-#define STM32_HAS_TIM14 FALSE
-#define STM32_HAS_TIM15 FALSE
-#define STM32_HAS_TIM16 FALSE
-#define STM32_HAS_TIM17 FALSE
-#define STM32_HAS_TIM18 FALSE
-#define STM32_HAS_TIM19 FALSE
-
-/* USART attributes.*/
-#define STM32_HAS_USART1 TRUE
-#define STM32_USART1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
-#define STM32_USART1_RX_DMA_CHN 0x00000000
-#define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
-#define STM32_USART1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART2 TRUE
-#define STM32_USART2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
-#define STM32_USART2_RX_DMA_CHN 0x00000000
-#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
-#define STM32_USART2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART3 TRUE
-#define STM32_USART3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3))
-#define STM32_USART3_RX_DMA_CHN 0x00000000
-#define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2))
-#define STM32_USART3_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_UART4 FALSE
-#define STM32_UART4_RX_DMA_MSK 0
-#define STM32_UART4_RX_DMA_CHN 0x00000000
-#define STM32_UART4_TX_DMA_MSK 0
-#define STM32_UART4_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_UART5 FALSE
-#define STM32_UART5_RX_DMA_MSK 0
-#define STM32_UART5_RX_DMA_CHN 0x00000000
-#define STM32_UART5_TX_DMA_MSK 0
-#define STM32_UART5_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART6 FALSE
-#define STM32_USART6_RX_DMA_MSK 0
-#define STM32_USART6_RX_DMA_CHN 0x00000000
-#define STM32_USART6_TX_DMA_MSK 0
-#define STM32_USART6_TX_DMA_CHN 0x00000000
-
-/* USB attributes.*/
-#define STM32_HAS_USB TRUE
-#define STM32_HAS_OTG1 FALSE
-#define STM32_HAS_OTG2 FALSE
-/** @} */
-#endif /* defined(STM32F10X_MD) */
-
-#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
-/**
- * @name STM32F103 HD capabilities
- * @{
- */
-/* ADC attributes.*/
-#define STM32_HAS_ADC1 TRUE
-#define STM32_HAS_ADC2 TRUE
-#define STM32_HAS_ADC3 TRUE
-
-/* CAN attributes.*/
-#define STM32_HAS_CAN1 TRUE
-#define STM32_HAS_CAN2 FALSE
-#define STM32_CAN_MAX_FILTERS 14
-
-/* DAC attributes.*/
-#define STM32_HAS_DAC TRUE
-
-/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
-#define STM32_HAS_DMA1 TRUE
-#define STM32_HAS_DMA2 TRUE
-
-/* ETH attributes.*/
-#define STM32_HAS_ETH FALSE
-
-/* EXTI attributes.*/
-#define STM32_EXTI_NUM_CHANNELS 19
-
-/* GPIO attributes.*/
-#define STM32_HAS_GPIOA TRUE
-#define STM32_HAS_GPIOB TRUE
-#define STM32_HAS_GPIOC TRUE
-#define STM32_HAS_GPIOD TRUE
-#define STM32_HAS_GPIOE TRUE
-#define STM32_HAS_GPIOF TRUE
-#define STM32_HAS_GPIOG TRUE
-#define STM32_HAS_GPIOH FALSE
-#define STM32_HAS_GPIOI FALSE
-
-/* I2C attributes.*/
-#define STM32_HAS_I2C1 TRUE
-#define STM32_I2C1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
-#define STM32_I2C1_RX_DMA_CHN 0x00000000
-#define STM32_I2C1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
-#define STM32_I2C1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_I2C2 TRUE
-#define STM32_I2C2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
-#define STM32_I2C2_RX_DMA_CHN 0x00000000
-#define STM32_I2C2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
-#define STM32_I2C2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_I2C3 FALSE
-#define STM32_I2C3_RX_DMA_MSK 0
-#define STM32_I2C3_RX_DMA_CHN 0x00000000
-#define STM32_I2C3_TX_DMA_MSK 0
-#define STM32_I2C3_TX_DMA_CHN 0x00000000
-
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTCSEL_HAS_SUBSECONDS TRUE
-
-/* SDIO attributes.*/
-#define STM32_HAS_SDIO TRUE
-
-/* SPI attributes.*/
-#define STM32_HAS_SPI1 TRUE
-#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
-#define STM32_SPI1_RX_DMA_CHN 0x00000000
-#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
-#define STM32_SPI1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_SPI2 TRUE
-#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
-#define STM32_SPI2_RX_DMA_CHN 0x00000000
-#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
-#define STM32_SPI2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_SPI3 TRUE
-#define STM32_SPI3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 1)
-#define STM32_SPI3_RX_DMA_CHN 0x00000000
-#define STM32_SPI3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 2)
-#define STM32_SPI3_TX_DMA_CHN 0x00000000
-
-/* TIM attributes.*/
-#define STM32_HAS_TIM1 TRUE
-#define STM32_HAS_TIM2 TRUE
-#define STM32_HAS_TIM3 TRUE
-#define STM32_HAS_TIM4 TRUE
-#define STM32_HAS_TIM5 TRUE
-#define STM32_HAS_TIM6 TRUE
-#define STM32_HAS_TIM7 TRUE
-#define STM32_HAS_TIM8 TRUE
-#define STM32_HAS_TIM9 TRUE
-#define STM32_HAS_TIM10 TRUE
-#define STM32_HAS_TIM11 TRUE
-#define STM32_HAS_TIM12 TRUE
-#define STM32_HAS_TIM13 TRUE
-#define STM32_HAS_TIM14 TRUE
-#define STM32_HAS_TIM15 FALSE
-#define STM32_HAS_TIM16 FALSE
-#define STM32_HAS_TIM17 FALSE
-#define STM32_HAS_TIM18 FALSE
-#define STM32_HAS_TIM19 FALSE
-
-/* USART attributes.*/
-#define STM32_HAS_USART1 TRUE
-#define STM32_USART1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
-#define STM32_USART1_RX_DMA_CHN 0x00000000
-#define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
-#define STM32_USART1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART2 TRUE
-#define STM32_USART2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
-#define STM32_USART2_RX_DMA_CHN 0x00000000
-#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
-#define STM32_USART2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART3 TRUE
-#define STM32_USART3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3))
-#define STM32_USART3_RX_DMA_CHN 0x00000000
-#define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2))
-#define STM32_USART3_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_UART4 TRUE
-#define STM32_UART4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3))
-#define STM32_UART4_RX_DMA_CHN 0x00000000
-#define STM32_UART4_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 5))
-#define STM32_UART4_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_UART5 TRUE
-#define STM32_UART5_RX_DMA_MSK 0
-#define STM32_UART5_RX_DMA_CHN 0x00000000
-#define STM32_UART5_TX_DMA_MSK 0
-#define STM32_UART5_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART6 FALSE
-#define STM32_USART6_RX_DMA_MSK 0
-#define STM32_USART6_RX_DMA_CHN 0x00000000
-#define STM32_USART6_TX_DMA_MSK 0
-#define STM32_USART6_TX_DMA_CHN 0x00000000
-
-/* USB attributes.*/
-#define STM32_HAS_USB TRUE
-#define STM32_HAS_OTG1 FALSE
-#define STM32_HAS_OTG2 FALSE
-/** @} */
-#endif /* defined(STM32F10X_HD) */
-
-#if defined(STM32F10X_XL) || defined(__DOXYGEN__)
-/**
- * @name STM32F103 XL capabilities
- * @{
- */
-/* ADC attributes.*/
-#define STM32_HAS_ADC1 TRUE
-#define STM32_HAS_ADC2 TRUE
-#define STM32_HAS_ADC3 TRUE
-
-/* CAN attributes.*/
-#define STM32_HAS_CAN1 TRUE
-#define STM32_HAS_CAN2 FALSE
-#define STM32_CAN_MAX_FILTERS 14
-
-/* DAC attributes.*/
-#define STM32_HAS_DAC TRUE
-
-/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
-#define STM32_HAS_DMA1 TRUE
-#define STM32_HAS_DMA2 TRUE
-
-/* ETH attributes.*/
-#define STM32_HAS_ETH FALSE
-
-/* EXTI attributes.*/
-#define STM32_EXTI_NUM_CHANNELS 19
-
-/* GPIO attributes.*/
-#define STM32_HAS_GPIOA TRUE
-#define STM32_HAS_GPIOB TRUE
-#define STM32_HAS_GPIOC TRUE
-#define STM32_HAS_GPIOD TRUE
-#define STM32_HAS_GPIOE TRUE
-#define STM32_HAS_GPIOF TRUE
-#define STM32_HAS_GPIOG TRUE
-#define STM32_HAS_GPIOH FALSE
-#define STM32_HAS_GPIOI FALSE
-
-/* I2C attributes.*/
-#define STM32_HAS_I2C1 TRUE
-#define STM32_I2C1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
-#define STM32_I2C1_RX_DMA_CHN 0x00000000
-#define STM32_I2C1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
-#define STM32_I2C1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_I2C2 TRUE
-#define STM32_I2C2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
-#define STM32_I2C2_RX_DMA_CHN 0x00000000
-#define STM32_I2C2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
-#define STM32_I2C2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_I2C3 FALSE
-#define STM32_I2C3_RX_DMA_MSK 0
-#define STM32_I2C3_RX_DMA_CHN 0x00000000
-#define STM32_I2C3_TX_DMA_MSK 0
-#define STM32_I2C3_TX_DMA_CHN 0x00000000
-
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTCSEL_HAS_SUBSECONDS TRUE
-
-/* SDIO attributes.*/
-#define STM32_HAS_SDIO TRUE
-
-/* SPI attributes.*/
-#define STM32_HAS_SPI1 TRUE
-#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
-#define STM32_SPI1_RX_DMA_CHN 0x00000000
-#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
-#define STM32_SPI1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_SPI2 TRUE
-#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
-#define STM32_SPI2_RX_DMA_CHN 0x00000000
-#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
-#define STM32_SPI2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_SPI3 TRUE
-#define STM32_SPI3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 1)
-#define STM32_SPI3_RX_DMA_CHN 0x00000000
-#define STM32_SPI3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 2)
-#define STM32_SPI3_TX_DMA_CHN 0x00000000
-
-/* TIM attributes.*/
-#define STM32_HAS_TIM1 TRUE
-#define STM32_HAS_TIM2 TRUE
-#define STM32_HAS_TIM3 TRUE
-#define STM32_HAS_TIM4 TRUE
-#define STM32_HAS_TIM5 TRUE
-#define STM32_HAS_TIM6 TRUE
-#define STM32_HAS_TIM7 TRUE
-#define STM32_HAS_TIM8 TRUE
-#define STM32_HAS_TIM9 FALSE
-#define STM32_HAS_TIM10 FALSE
-#define STM32_HAS_TIM11 FALSE
-#define STM32_HAS_TIM12 FALSE
-#define STM32_HAS_TIM13 FALSE
-#define STM32_HAS_TIM14 FALSE
-#define STM32_HAS_TIM15 FALSE
-#define STM32_HAS_TIM16 FALSE
-#define STM32_HAS_TIM17 FALSE
-#define STM32_HAS_TIM18 FALSE
-#define STM32_HAS_TIM19 FALSE
-
-/* USART attributes.*/
-#define STM32_HAS_USART1 TRUE
-#define STM32_USART1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
-#define STM32_USART1_RX_DMA_CHN 0x00000000
-#define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
-#define STM32_USART1_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART2 TRUE
-#define STM32_USART2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
-#define STM32_USART2_RX_DMA_CHN 0x00000000
-#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
-#define STM32_USART2_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART3 TRUE
-#define STM32_USART3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3))
-#define STM32_USART3_RX_DMA_CHN 0x00000000
-#define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2))
-#define STM32_USART3_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_UART4 TRUE
-#define STM32_UART4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3))
-#define STM32_UART4_RX_DMA_CHN 0x00000000
-#define STM32_UART4_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 5))
-#define STM32_UART4_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_UART5 TRUE
-#define STM32_UART5_RX_DMA_MSK 0
-#define STM32_UART5_RX_DMA_CHN 0x00000000
-#define STM32_UART5_TX_DMA_MSK 0
-#define STM32_UART5_TX_DMA_CHN 0x00000000
-
-#define STM32_HAS_USART6 FALSE
-#define STM32_USART6_RX_DMA_MSK 0
-#define STM32_USART6_RX_DMA_CHN 0x00000000
-#define STM32_USART6_TX_DMA_MSK 0
-#define STM32_USART6_TX_DMA_CHN 0x00000000
-
-/* USB attributes.*/
-#define STM32_HAS_USB TRUE
-#define STM32_HAS_OTG1 FALSE
-#define STM32_HAS_OTG2 FALSE
-/** @} */
-#endif /* defined(STM32F10X_XL) */
-
-/*===========================================================================*/
-/* Platform specific friendly IRQ names. */
-/*===========================================================================*/
-
-/**
- * @name IRQ VECTOR names
- * @{
- */
-#define WWDG_IRQHandler Vector40 /**< Window Watchdog. */
-#define PVD_IRQHandler Vector44 /**< PVD through EXTI Line
- detect. */
-#define TAMPER_IRQHandler Vector48 /**< Tamper. */
-#define RTC_IRQHandler Vector4C /**< RTC. */
-#define FLASH_IRQHandler Vector50 /**< Flash. */
-#define RCC_IRQHandler Vector54 /**< RCC. */
-#define EXTI0_IRQHandler Vector58 /**< EXTI Line 0. */
-#define EXTI1_IRQHandler Vector5C /**< EXTI Line 1. */
-#define EXTI2_IRQHandler Vector60 /**< EXTI Line 2. */
-#define EXTI3_IRQHandler Vector64 /**< EXTI Line 3. */
-#define EXTI4_IRQHandler Vector68 /**< EXTI Line 4. */
-#define DMA1_Ch1_IRQHandler Vector6C /**< DMA1 Channel 1. */
-#define DMA1_Ch2_IRQHandler Vector70 /**< DMA1 Channel 2. */
-#define DMA1_Ch3_IRQHandler Vector74 /**< DMA1 Channel 3. */
-#define DMA1_Ch4_IRQHandler Vector78 /**< DMA1 Channel 4. */
-#define DMA1_Ch5_IRQHandler Vector7C /**< DMA1 Channel 5. */
-#define DMA1_Ch6_IRQHandler Vector80 /**< DMA1 Channel 6. */
-#define DMA1_Ch7_IRQHandler Vector84 /**< DMA1 Channel 7. */
-#define ADC1_2_IRQHandler Vector88 /**< ADC1_2. */
-#define CAN1_TX_IRQHandler Vector8C /**< CAN1 TX. */
-#define USB_HP_IRQHandler Vector8C /**< USB High Priority, CAN1 TX.*/
-#define CAN1_RX0_IRQHandler Vector90 /**< CAN1 RX0. */
-#define USB_LP_IRQHandler Vector90 /**< USB Low Priority, CAN1 RX0.*/
-#define CAN1_RX1_IRQHandler Vector94 /**< CAN1 RX1. */
-#define CAN1_SCE_IRQHandler Vector98 /**< CAN1 SCE. */
-#define EXTI9_5_IRQHandler Vector9C /**< EXTI Line 9..5. */
-#define TIM1_BRK_IRQHandler VectorA0 /**< TIM1 Break. */
-#define TIM1_UP_IRQHandler VectorA4 /**< TIM1 Update. */
-#define TIM1_TRG_COM_IRQHandler VectorA8 /**< TIM1 Trigger and
- Commutation. */
-#define TIM1_CC_IRQHandler VectorAC /**< TIM1 Capture Compare. */
-#define TIM2_IRQHandler VectorB0 /**< TIM2. */
-#define TIM3_IRQHandler VectorB4 /**< TIM3. */
-#define TIM4_IRQHandler VectorB8 /**< TIM4. */
-#define I2C1_EV_IRQHandler VectorBC /**< I2C1 Event. */
-#define I2C1_ER_IRQHandler VectorC0 /**< I2C1 Error. */
-#define I2C2_EV_IRQHandler VectorC4 /**< I2C2 Event. */
-#define I2C2_ER_IRQHandler VectorC8 /**< I2C2 Error. */
-#define SPI1_IRQHandler VectorCC /**< SPI1. */
-#define SPI2_IRQHandler VectorD0 /**< SPI2. */
-#define USART1_IRQHandler VectorD4 /**< USART1. */
-#define USART2_IRQHandler VectorD8 /**< USART2. */
-#define USART3_IRQHandler VectorDC /**< USART3. */
-#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
-#define RTC_Alarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
-#define USB_FS_WKUP_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
-#define TIM8_BRK_IRQHandler VectorEC /**< TIM8 Break. */
-#define TIM8_UP_IRQHandler VectorF0 /**< TIM8 Update. */
-#define TIM8_TRG_COM_IRQHandler VectorF4 /**< TIM8 Trigger and
- Commutation. */
-#define TIM8_CC_IRQHandler VectorF8 /**< TIM8 Capture Compare. */
-#define ADC3_IRQHandler VectorFC /**< ADC3. */
-#define FSMC_IRQHandler Vector100 /**< FSMC. */
-#define SDIO_IRQHandler Vector104 /**< SDIO. */
-#define TIM5_IRQHandler Vector108 /**< TIM5. */
-#define SPI3_IRQHandler Vector10C /**< SPI3. */
-#define UART4_IRQHandler Vector110 /**< UART4. */
-#define UART5_IRQHandler Vector114 /**< UART5. */
-#define TIM6_IRQHandler Vector118 /**< TIM6. */
-#define TIM7_IRQHandler Vector11C /**< TIM7. */
-#define DMA2_Ch1_IRQHandler Vector120 /**< DMA2 Channel1. */
-#define DMA2_Ch2_IRQHandler Vector124 /**< DMA2 Channel2. */
-#define DMA2_Ch3_IRQHandler Vector128 /**< DMA2 Channel3. */
-#define DMA2_Ch4_5_IRQHandler Vector12C /**< DMA2 Channel4 & Channel5. */
-/** @} */
-
-/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
|