diff options
Diffstat (limited to 'os/hal/ports/STM32')
| -rw-r--r-- | os/hal/ports/STM32/STM32F30x/hal_lld.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/os/hal/ports/STM32/STM32F30x/hal_lld.h b/os/hal/ports/STM32/STM32F30x/hal_lld.h index 81f7bf288..97e564724 100644 --- a/os/hal/ports/STM32/STM32F30x/hal_lld.h +++ b/os/hal/ports/STM32/STM32F30x/hal_lld.h @@ -247,10 +247,10 @@ #define STM32_I2C2SW_SYSCLK (1 << 5) /**< I2C2 clock is SYSCLK. */
#define STM32_TIM1SW_MASK (1 << 8) /**< TIM1 clock source mask. */
#define STM32_TIM1SW_PCLK2 (0 << 8) /**< TIM1 clock is PCLK2. */
-#define STM32_TIM1SW_PLLX2 (1 << 10) /**< TIM1 clock is PLL*2. */
-#define STM32_TIM8SW_MASK (1 << 10) /**< TIM8 clock source mask. */
-#define STM32_TIM8SW_PCLK2 (0 << 10) /**< TIM8 clock is PCLK2. */
-#define STM32_TIM8SW_PLLX2 (1 << 10) /**< TIM8 clock is PLL*2. */
+#define STM32_TIM1SW_PLLX2 (1 << 8) /**< TIM1 clock is PLL*2. */
+#define STM32_TIM8SW_MASK (1 << 9) /**< TIM8 clock source mask. */
+#define STM32_TIM8SW_PCLK2 (0 << 9) /**< TIM8 clock is PCLK2. */
+#define STM32_TIM8SW_PLLX2 (1 << 9) /**< TIM8 clock is PLL*2. */
#define STM32_USART2SW_MASK (3 << 16) /**< USART2 clock source mask. */
#define STM32_USART2SW_PCLK (0 << 16) /**< USART2 clock is PCLK. */
#define STM32_USART2SW_SYSCLK (1 << 16) /**< USART2 clock is SYSCLK. */
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