diff options
Diffstat (limited to 'os/hal/ports/STM32/STM32L1xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c | 2 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32L1xx/hal_lld.c | 4 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32L1xx/stm32_rcc.h | 9 |
3 files changed, 9 insertions, 6 deletions
diff --git a/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c b/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c index 7b6c61a3a..072b196e1 100644 --- a/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c +++ b/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c @@ -155,7 +155,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp);
osalDbgAssert(!b, "stream already allocated");
dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR);
- rccEnableADC1(false);
+ rccEnableADC1(true);
}
#endif /* STM32_ADC_USE_ADC1 */
diff --git a/os/hal/ports/STM32/STM32L1xx/hal_lld.c b/os/hal/ports/STM32/STM32L1xx/hal_lld.c index 3f4c04329..cdbdf3992 100644 --- a/os/hal/ports/STM32/STM32L1xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32L1xx/hal_lld.c @@ -106,7 +106,7 @@ void hal_lld_init(void) { rccResetAPB2(~0);
/* PWR clock enabled.*/
- rccEnablePWRInterface(FALSE);
+ rccEnablePWRInterface(true);
/* Initializes the backup domain.*/
hal_lld_backup_domain_init();
@@ -225,7 +225,7 @@ void stm32_clock_init(void) { /* SYSCFG clock enabled here because it is a multi-functional unit shared
among multiple drivers.*/
- rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, TRUE);
+ rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, true);
}
/** @} */
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h index 989735afd..8593aca9d 100644 --- a/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h @@ -63,6 +63,8 @@ RCC->APB1ENR |= (mask); \
if (lp) \
RCC->APB1LPENR |= (mask); \
+ else \
+ RCC->APB1LPENR &= ~(mask); \
}
/**
@@ -74,7 +76,6 @@ */
#define rccDisableAPB1(mask) { \
RCC->APB1ENR &= ~(mask); \
- RCC->APB1LPENR &= ~(mask); \
}
/**
@@ -101,6 +102,8 @@ RCC->APB2ENR |= (mask); \
if (lp) \
RCC->APB2LPENR |= (mask); \
+ else \
+ RCC->APB2LPENR &= ~(mask); \
}
/**
@@ -112,7 +115,6 @@ */
#define rccDisableAPB2(mask) { \
RCC->APB2ENR &= ~(mask); \
- RCC->APB2LPENR &= ~(mask); \
}
/**
@@ -139,6 +141,8 @@ RCC->AHBENR |= (mask); \
if (lp) \
RCC->AHBLPENR |= (mask); \
+ else \
+ RCC->AHBLPENR &= ~(mask); \
}
/**
@@ -150,7 +154,6 @@ */
#define rccDisableAHB(mask) { \
RCC->AHBENR &= ~(mask); \
- RCC->AHBLPENR &= ~(mask); \
}
/**
|